Stay up-to-date on the latest news, research and resources. This month's edition covers the Princeton GPU Hackathon, OpenACC at SC22, updates from GNU Tools Cauldron, the upcoming UK DPU Hackathon, relevant research and more!

1. September 2022
OPENACC AND
OPEN HACKATHONS
MONTHLY HIGHLIGHTS

2. 2
WHAT IS OPENACC?
main()
{
<serial code>
#pragma acc kernels
{
<parallel code>
}
}
Add Simple Compiler Directive
POWERFUL & PORTABLE
Directives-based
programming model for
parallel
computing
Designed for
performance and
portability on
CPUs and GPUs
SIMPLE
Open Specification Developed by OpenACC Organization

3. 3
silica IFPEN, RMM-DIIS on P100
OPENACC SPECIFICATION MOMENTUM
Wide Adoption Across Key HPC Codes
ANSYS Fluent
Gaussian
VASP
LSDalton
MPAS
GAMERA
GTC
XGC
ACME
FLASH
COSMO
Numeca
400+ APPS* USING OPENACC
Prof. Georg Kresse
Computational Materials Physics
University of Vienna
For VASP, OpenACC is the way forward for GPU
acceleration. Performance is similar to CUDA, and
OpenACC dramatically decreases GPU
development and maintenance efforts. We’re
excited to collaborate with NVIDIA and PGI as an
early adopter of Unified Memory.
“ “
VASP
Top Quantum Chemistry and Material Science Code
* Applications in production and development

4. 4
READ BLOG
The fourth annual GPU Hackathon at Princeton University
paired experts from NVIDIA, Princeton, Oak Ridge National
Laboratory, Boston College, and the Institute of Electrical and
Electronics Engineers ​​with scientists to help them speed up
their code.
2022 PRINCETON GPU HACKATHON
Pairing Industry Mentors with Researchers
“They all saw performance gains and increased their
knowledge of GPU computing. It's an incredibly valuable
resource. It's free, and you basically get two experts who are
willing to devote themselves to improving your code.”
Jonathan Halverson
Research Software and Computing Training Lead
Princeton Institute for Computational Science & Engineering
(PICSciE)

5. 5
UPCOMING OPEN HACKATHONS & BOOTCAMPS
COMPLETE LIST OF EVENTS
Event Call Closes Event Date
KMA and NOAA Workshop on AI for Weather and Climate October 10, 2022 October 21, 2022
NVIDIA/HLRS SciML GPU Bootcamp October 5, 2022 October 24-25, 2022
TWCC Open Hackathon 2022 October 12, 2022 November 29-30,
December 1-2, 2022
Westlake University GPU Hackathon 2022 October 12, 2022 November 29, December 7-9, 2022
Digital in 2022: Our virtual events continue to offer the same high-touch training and mentorship without the
hassle of travel!

6. 6
REGISTER NOW
The SC Conference brings together thousands of attendees
from the international high-performance computing
community. This year’s theme “HPC Accelerates” explores
how supercomputing is continuously changing the world, by
accelerating the process of reaching solutions – for
corporations, governments, and other organizations eager for
ASAP computing.
Join the OpenACC and Hackathons conversation at SC22
by attending one of our two Birds-of-a-Feather interactive
discussions or any of the talks and workshops to learn about
the research, roadmaps and latest developments.
SAVE THE DATE FOR SC22!
November 13-18, 2022 | Dallas, TX

7. 7
READ ARTICLE
At the recent GNU Tools Cauldron, Siemens presented a
status update on the work around GPU accelerator
offloading for the GNU Compiler Collection (GCC) and the
work being done around OpenMP and OpenACC support.
Development discussed included initial AMD Instinct MI200
support, unified shared memory, more SIMD functionality,
CUDA 11+ support, OpenACC worker parallelism for AMD
GPUs, code generation optimizations and more.
GCC IMPROVEMENTS CONTINUE
Updates from GNU Tools Cauldron

8. 8
REGISTER NOW
Passionate about advancing accelerating computing?
Join the HPC-AI Advisory Council UK DPU (Data
Processing Unit) Hackathon and be part of the next
evolution in accelerating supercomputing and HPC Cloud
infrastructures. Take part in supercharging capabilities for
AI, networking, storage, and security by familiarizing
yourself with DPUs and their software framework and
building an innovative accelerated application. You and
your team will be part of the DPU innovation space, build
your network, meet experts, and show what you can
accomplish.
HPC-AI ADVISORY COUNCIL UK DPU HACKATHON
October 10-20, 2022 | Digital Event

9. 9
RESOURCES
The complexity of heterogeneous computing architectures, as well as the
demand for productive and portable parallel application development, have
driven the evolution of parallel programming models to become more
comprehensive and complex than before. Enhancing the conventional
compilation technologies and software infrastructure to be parallelism-aware
has become one of the main goals of recent compiler development. In this
paper, we propose the design of unified parallel intermediate representation
(UPIR) for multiple parallel programming models and for enabling unified
compiler transformation for the models. UPIR specifies three commonly used
parallelism patterns (SPMD, data and task parallelism), data attributes and
explicit data movement and memory management, and synchronization
operations used in parallel programming. We demonstrate UPIR via a prototype
implementation in the ROSE compiler for unifying IR for both OpenMP and
OpenACC and in both C/C++ and Fortran, for unifying the transformation that
lowers both OpenMP and OpenACC code to LLVM runtime, and for exporting
UPIR to LLVM MLIR dialect.
READ PAPER
Paper: UPIR: Toward the Design of Unified
Parallel Intermediate Representation for Parallel
Programming Models
Anita Wang, Xinyao Yi, and Yonghong Yan

10. 10
RESOURCES
In the present paper, an efficient General Purpose Graphical
Processing Unit (GPGPU)-based implementation of sparse grid
Particle-In-Cell (PIC) methods is proposed. The parallelization,
implementing novel strategies specific to SparsePIC methods and
tailored to GPU architectures, provides speed-ups* as large as 100 on
a single Tesla V100 GPU with respect to sequential Computing
Processing unit (CPU) execution; and a four order of magnitude
reduction of the computational time in comparison with a standard PIC
sequential CPU simulation. In addition, the simple implementation of
the parallelization with the OpenACC framework offers portability to a
large class of accelerators.
READ PAPER
Paper: Efficient Parallelization for 3D-3V Sparse Grid
Particle-In-Cell
Fabrice Deluzet, G. Fubiani, Laurent Garrigues,
Clément Guillet, and Jacek Narski
Figure 5. DRAM and L2 cache roof-line performance of the Tesla
V100 and Quadro T2000. Kernel with arithmetic intensity below the
theoretical instruction throughput peak are memory bounded.

11. 11
RESOURCES
Website: OpenHackathons.org
Technical Resources
VISIT SITE
Explore a wealth of resources for parallelization and
accelerated computing across HPC, AI and Big Data.
Review a collection of videos, presentations, GitHub
repos, tutorials, libraries, and more to help you advance
your skills and expand your knowledge.

12. 12
STAY IN THE KNOW: JOIN THE COMMUNITY
OPENACC AND HACKATHON UPDATES
JOIN TODAY
The OpenACC Organization is dedicated to
helping the research and developer community
advance science by expanding their accelerated
and parallel computing skills.
Take an active role in influencing the future of both
the OpenACC specification and the organization
itself by becoming a member of the community.
Keep abreast of the new tools, latest resources,
recent research, and upcoming events.

13. WWW.OPENACC.ORG
Learn more at