Personal Information
Entreprise/Lieu de travail
Bengaluru Area, India India
Profession
Sr. Manager - Design Engg at AMD
Secteur d’activité
Electronics / Computer Hardware
À propos
MBA, Southern Methodist University.SMU Dallas,Texas,99-01
M.S.E.E, University of South Florida. Tampa, Florida. 95-97
B.E. in electronics, REC(NIT). Bhopal University, India.89-93
IP , full chip SoC design, project/program mgmt, Design flow (R2G,functional+system verification, software infrastr.), lead global cross site SoC verification teams.
Specialties: Seasoned semiconductor professional; 19 years of industry experience with startups and large US,European MNC's.
Management experience includes building team from scratch, motivating and managing multiple teams/project mgr to excel and meet customer expectations; Managing customer interface/program mgmt of complex SoC’s,IP development..
Mots-clés
iso26262
serdes
fmeda
verification
soc
heterogeneous computing
apu
soc verification challenges
hsa
eye diagram
signal impairments
frequency-dependent schematic behavior
performance simulation
jtol
real number modelling
real number model
mixed signal design
performance verification
random fault
p2427
analog fault injection
fusa
asil
lpddr4
safety verification
memory subsystem
virtual prototype
fault injection
fmea
autonomous driving
software
audio
synthesis filterbank
mp3
mixed radix fht
imdct
fht
dct
safety
adas
she
security
autosar
hsm
statistical fault
automotive
indian ip scenario
platform coherency
ip verification
power reduction
always on
power domain
edt
bist
fuse
jtag
dft
tlm rtl co simulation
ip integration
noc
3d stacking
Tout plus
Présentations
(11)Documents
(1)Personal Information
Entreprise/Lieu de travail
Bengaluru Area, India India
Profession
Sr. Manager - Design Engg at AMD
Secteur d’activité
Electronics / Computer Hardware
À propos
MBA, Southern Methodist University.SMU Dallas,Texas,99-01
M.S.E.E, University of South Florida. Tampa, Florida. 95-97
B.E. in electronics, REC(NIT). Bhopal University, India.89-93
IP , full chip SoC design, project/program mgmt, Design flow (R2G,functional+system verification, software infrastr.), lead global cross site SoC verification teams.
Specialties: Seasoned semiconductor professional; 19 years of industry experience with startups and large US,European MNC's.
Management experience includes building team from scratch, motivating and managing multiple teams/project mgr to excel and meet customer expectations; Managing customer interface/program mgmt of complex SoC’s,IP development..
Mots-clés
iso26262
serdes
fmeda
verification
soc
heterogeneous computing
apu
soc verification challenges
hsa
eye diagram
signal impairments
frequency-dependent schematic behavior
performance simulation
jtol
real number modelling
real number model
mixed signal design
performance verification
random fault
p2427
analog fault injection
fusa
asil
lpddr4
safety verification
memory subsystem
virtual prototype
fault injection
fmea
autonomous driving
software
audio
synthesis filterbank
mp3
mixed radix fht
imdct
fht
dct
safety
adas
she
security
autosar
hsm
statistical fault
automotive
indian ip scenario
platform coherency
ip verification
power reduction
always on
power domain
edt
bist
fuse
jtag
dft
tlm rtl co simulation
ip integration
noc
3d stacking
Tout plus