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LED電源回路アプリケーションガイド
NJM2377–Boost DC/DC Converter
2017年12月13日
マルツエレック株式会社
Copyright (C)Marutsuelec Co.,Ltd. 2017
Contents
Slide #
1. NJM2377 – Boost DC/DC Converter Circuit...........................................................................
2. PWM – Boost DC/DC Converter Basic Operation and Design................................................
2.1 Boost DC/DC Converter – VOUT........................................................................................
2.2 Boost DC/DC Converter – tON /tOFF....................................................................................
2.3 Boost DC/DC Converter – Inductor Selection...................................................................
2.4 Boost DC/DC Converter – Inductor Peak Current.............................................................
2.5 Boost DC/DC Converter – COUT Selection........................................................................
3. NJM2377 – Application Circuit Configuration..........................................................................
3.1 NJM2377 – Soft Start Time Setting...................................................................................
3.2 NJM2377 – Oscillation Frequency Setting........................................................................
3.3 Error Amp Feed Back Loop Setting..................................................................................
4. Performance Characteristics……………………………...........................................................
4.1 Output Start-Up Voltage and Current................................................................................
4.2 Output Ripple Voltage.......................................................................................................
4.3 Efficiency..........................................................................................................................
4.4 Step-Load Response…….................................................................................................
5. Voltage and Current Simulation Result...................................................................................
6. Losses
6.1 Bipolar Junction Transistor Losses...................................................................................
6.2 Schottky Barrier Diode Losses..........................................................................................
7. Waveforms
7.1 Start-Up Sequencing Waveforms......................................................................................
7.2 Switching Waveform at Load 50mA..................................................................................
7.3 Switching Waveform at Load 10mA..................................................................................
Simulations index.........................................................................................................................
Simulations Settings....................................................................................................................
3
4
5
6
7
8
9
10
11-12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27-28
2Copyright (C)Marutsuelec Co.,Ltd. 2017
1. NJM2377 – Boost DC/DC Converter Circuit
3
CLP
100pF
Rf
560k
ESR
0.103
Cin
220uF
L
150u
1 2
Rload
180
R1
9.1k
R2
150k
Q1
Q2SD2623
OUT
R3
0.8
U1
NJM2377
-IN
FB
GND
OUTV+
CS
CT
REF
Rt
24k
Ct
470pF
IC = 0
D1
HRU0302A
0
V+
5V
0
IN
Cout
220uF
Rsf
160k
CS
4.7uF
IC = 0
0
Rsr
180k
0
5V to 9V at 50mA Boost DC/DC Converter (fOSC=150kHz, Vripple=30mVp-p)
U1: New Japan Radio NJM2377 Control IC
Q1: Panasonic 2SD2623 NPN
D1: Renesas HRU0302A Schottky Barrier Diode
Copyright (C)Marutsuelec Co.,Ltd. 2017
2. PWM – Boost DC/DC Converter Basic Operation and Design
ESR
IN
L
1 2
Rload
OUT
R1
R2
Q1
QN_SW
V+
0
Cout
D1
PWM Control
Circuit
4
PWM output
pulse
VOUT=9V
tON tOFF
VIN=5V L: IL
• VOUT is monitored by R1 and R2 then compared to reference voltage VB in NJM2377.
• Error voltage is pulse width modulated with sawtooth waveform.
• PWM output pulse width is proportional to the error level. This signal will control the
switch ON/OFF(tON /tOFF).
• Therefore VOUT, which is proportional to tON /tOFF, is controlled to the desired voltage.
2.1)
2.5)
2.2)
2.3),
2.4)
Copyright (C)Marutsuelec Co.,Ltd. 2017
2.1 Boost DC/DC Converter – VOUT
• VOUT is determined by R1 and R2, without considering I(IN-) of NJM2377 VOUT is calculated as
below.
• For VOUT=9V, R1=9.1kΩ, R2=150kΩ are selected.
5
9.09V0.521
9.1k
150k
1
1
2













 REFOUT V
R
R
V
Copyright (C)Marutsuelec Co.,Ltd. 2017
2.2 Boost DC/DC Converter – tON /tOFF
• If the circuit works in continuous conduction mode (CCM), output voltage (VOUT) and ON/OFF
time (tON /tOFF) follow the equation below.
then
• From VIN =5V, VOUT =9V and fOSC =150kHz, these result as tON /tOFF are tON=2.96μs, tOFF=3.71μs,
and duty=45%.
6
IN
OFF
OFFON
OUT V
t
tt
V 




 

OSCOUT
INOUT
ON
fV
VV
t



Copyright (C)Marutsuelec Co.,Ltd. 2017
2.3 Boost DC/DC Converter – Inductor Selection
• LMIN value for the convertor to work in continuous conduction mode (CCM), is calculated as
below.
• From VIN =5V, VOUT =9V, IOUT =50mA and tON=2.96μs, these result as LMIN=82.2μH.
• A larger value will be used to increase the available output current, but limit it to around
twice the LMIN value. L =150μH is selected.
7
ON
OUTOUT
IN
MIN t
IV
V
L 


2
2
MINMIN LLL  2
Copyright (C)Marutsuelec Co.,Ltd. 2017
Time
86.810ms 86.816ms 86.822ms 86.828ms
I(L)
0A
50mA
100mA
150mA
200mA
(86.818m,140.985m)
(86.821m,40.531m)
• PSpice is used to verify the circuit design.
• IL, PK=140.985mA and IL,PK=140.985m-
40.531m=100.454mA
2.4 Boost DC/DC Converter – Inductor Peak
Current
• IL, PK is calculated as below.
• And the current ripple - IL, PK is calculated
as below
8
140mA2.96μ
150μ2
5
5
0.059
2









 ON
IN
IN
OUTOUT
L,PK t
L
V
V
IV
I
mA992.96μ
150μ
5

 ON
IN
L,PK t
L
V
ΔI
• Add trace I(L)
• Zoom to check the peak value.
IL, PK
Copyright (C)Marutsuelec Co.,Ltd. 2017
• PSpice is used to verify the circuit design.
• IL,PK=101.168mA, ton=3μs.
• Vripple =14.8mVp-p
• Irms
*=53.856mArms.
 Irms is larger than calculated value due to feedback loop
response ripple current.
Time
87.5484ms 87.5684ms
V(OUT)
9.06V
9.07V
9.08V
9.09V
SEL>>
(87.556m,9.0792)
(87.553m,9.0644)
I(L) rms(I(Cout))
0A
100mA
200mA
(87.556m,141.564m)
(87.553m,40.396m)
• COUT is determined from the Vripple Spec
(30mVp-p).
• If COUT >> IOUTton/Vripple
(50m2.96μ/30m=4.933μF), Vripple will
mainly caused by ESR.
• Select the capacitor that can handle the
ripple current Irms.
• COUT=220μF, ESR=103m is selected.




m103
99m
30m
)(
L
ppripple
I
V
ESR
2.5 Boost DC/DC Converter – COUT Selection
9
IL, PK
13mArms
6.67μ
2.96μ
32
99m
32




t
tonI
I
L
rms
Irms
Vripple
Copyright (C)Marutsuelec Co.,Ltd. 2017
CLP
100pF
Rf
560k
ESR
0.103
Cin
220uF
L
150u
1 2
Rload
180
R1
9.1k
R2
150k
Q1
Q2SD2623
OUT
R3
0.8
U1
NJM2377
-IN
FB
GND
OUTV+
CS
CT
REF
Rt
24k
Ct
470pF
IC = 0
D1
HRU0302A
0
V+
5V
0
IN
Cout
220uF
Rsf
160k
CS
4.7uF
IC = 0
0
Rsr
180k
0
3. NJM2377 – Application Circuit Configuration
10
5V to 9V at 50mA Boost DC/DC Converter (fOSC=150kHz)
U1: New Japan Radio NJM2377 Control IC
Q1: Panasonic 2SD2623 NPN
D1: Renesas HRU0302A Schottky Barrier Diode
3.1)
3.2)
3.3)
Copyright (C)Marutsuelec Co.,Ltd. 2017
• First, caculate Rsr by
Rsr>VTHLA(max.)/ICHG(min.)
(1.8V/10μA=180k)
• During steady state operation,
I(CS)=IBCS=250ns. Maximum duty cycle is
determined by V(CS). Set
V(CS)=VTHCS(max.)=0.8V, Rsf is calculated by
160k ΩRsf
1.5
Rsf180k
180k
0.8
.)(max






 REFTHCS V
RsfRsr
Rsr
V
• Soft-start time or tduty(max.) is time needed for
V(CS) to reach VTHCS(max.) by charging capacitor
Cs.
• CS is charged by current Ics, calculated by:
then
3.1 NJM2377 – Soft Start Time Setting
11
NJM2377 soft-start time is determined by Rsr, CS and Rsf
4.41uA
160k180k
1.5





RsfRsr
V
I
REF
CS
109ms
30μ4.41μ
4.7μ0.8
.)(max
.)(max







CHGCS
THCS
duty
II
CsV
t
Copyright (C)Marutsuelec Co.,Ltd. 2017
3.1 NJM2377 – Soft Start Time Setting (Simulation)
12
NJM2377 soft-start time is determined by Rsr, Rsf and CS
• Select Rsr, Rsf, and CS then check tduty(max.) by
simulation.
• tduty(max.)=109.170ms. for CS=4.7uF
• tduty(max.)=76.653ms for CS=3.3uF and
tduty(max.)=157.953ms for CS=6.8uF.
CS
{CS}
IC = 0
PARAMETERS:
CS = 4.7u
CLP
100pF
Rf
560k
Cin
220uF
U1
NJM2377
-IN
FB
GND
OUTV+
CS
CT
REF
Rt
10MEG
Ct
10nF
IC = 0
0 CS
V+
5V
IN
REF
0
Rsf
160k
0
Rsr
180k
0
R1
1MEG
.TRAN 0 500ms 0 Time
0s 250ms 500ms
V(CS)
0V
0.5V
1.0V
1.5V
(109.170m,800.000m)
(76.653m,800.000m)
(157.953m,800.000m)
Copyright (C)Marutsuelec Co.,Ltd. 2017
3.2 NJM2377 – Oscillation Frequency Setting
• CT = 470pF and RT = 24kΩ to set an oscillation frequency to be 150kHz.
13
V
CLP
100pF
Rf
560k
Cin
220uF
U1
NJM2377
-IN
FB
GND
OUTV+
CS
CT
REF
Rt
24k
Ct
470pF
IC = 0
0
V+
5V
IN
0
Rsf
160k
CS
4.7uF
IC = 0
0
Rsr
180k
0
R1
1MEG
NJM2377 oscillation frequency fOSC is determined by CT and RT
fosc=150kHz
RT=24k
Copyright (C)Marutsuelec Co.,Ltd. 2017
3.3 Error Amp Feed Back Loop Setting
• For F.B loop gain G > 100, Rf is calculated
as:
• CLP is suggested to use value between
100pF~1,000pF
• Inappropriate F.B loop design can cause an
oscillation. PSpice is used to verify the
ripple voltage vs. Rf and CLP values.
• Simulation result shows Vripple of the circuit with
RF=1000k  compare to the circuit with
RF=560k.
• Changing RF to be 560k  can reduce Vripple from
34mVp-p to less than 20mVp-p.
14
1000kRf
177
150k//9.1k
1,000k
2//1



RR
Rf
G
Error Amp Feed Back Loop is determined by R1, R2, Rf and CLP
Time
79.00ms 79.25ms 79.50ms 79.75ms 80.00ms
V(OUT)
9.04V
9.06V
9.08V
9.10V
9.12V
RF=1000k, CLP=100pF
RF=560k, CLP=100pF
Copyright (C)Marutsuelec Co.,Ltd. 2017
4. Performance Characteristics
CLP
100pF
Rf
560k
ESR
0.103
Cin
220uF
L
150u
1 2
Rload
180
R1
9.1k
R2
150k
Q1
Q2SD2623
OUT
R3
0.8
U1
NJM2377
-IN
FB
GND
OUTV+
CS
CT
REF
Rt
24k
Ct
470pF
IC = 0
D1
HRU0302A
0
V+
5V
0
IN
Cout
220uF
Rsf
160k
CS
4.7uF
IC = 0
0
Rsr
180k
0
15
• VIN=5V
• VOUT=9V
• IOUT=50mA
• Vripple(P-P)= less than 30mV
• Efficiency= 75% at IOUT=50mA
U1: New Japan Radio NJM2377 Control IC
Q1: Panasonic 2SD2623 NPN
D1: Renesas HRU0302A Schottky Barrier Diode
Copyright (C)Marutsuelec Co.,Ltd. 2017
4.1 Output Start-Up Voltage and Current
• Simulation result shows output start-up time of the circuit. This circuit needs
55ms to reach steady state.
16
Time
0s 20ms 40ms 60ms 80ms 90ms
V(OUT)
4V
5V
6V
7V
8V
9V
10V
I(Rload)
20mA
30mA
40mA
50mA
SEL>>
V(OUT)
I(Rload)
Copyright (C)Marutsuelec Co.,Ltd. 2017
Time
60ms 65ms 70ms 75ms 80ms 85ms 90ms
V(OUT)
9.05V
9.06V
9.07V
9.08V
9.09V
9.10V
SEL>>
Time
89.90ms 89.91ms 89.92ms 89.93ms 89.94ms 89.95ms 89.96ms 89.97ms 89.98ms 89.99ms
V(OUT)
9.060V
9.065V
9.070V
9.075V
9.080V
4.2 Output Ripple Voltage
• Simulation result shows output ripple voltage caused by switching(18mVP-P) and
F.B loop oscillation(25mVP-P).
17
V(OUT)
V(OUT)
[ZOOM] 18mVP-P
25mVP-P
Copyright (C)Marutsuelec Co.,Ltd. 2017
4.3 Efficiency
• Efficiency of the converter at load IOUT=50mA is 75.5%.
18
Time
70ms 75ms 80ms 85ms 90ms
100*W(Rload)/rms(-W(V+))
0
25
50
75
100
(90.000m,75.500)
Efficiency
Copyright (C)Marutsuelec Co.,Ltd. 2017
4.4 Step-Load Response
• Simulation result shows the transient response of the circuit, when load currents are 50mA to
10mA to 50mA steps .
19
V(OUT)
I(L)
I(Load)
Time
60ms 65ms 70ms 75ms 80ms 85ms 90ms
V(OUT)
9.050V
9.075V
9.100V
9.125V
I(L)
0A
100mA
200mA
I(I1)
0A
20mA
30mA
40mA
50mA
SEL>>
Copyright (C)Marutsuelec Co.,Ltd. 2017
5. Voltage and Current Simulation Result
• Simulation result shows voltage and current of the devices.
• Select L and Cout that can handle their Irms value.
• The absolute maximum value of Q1 and D1 are compared to simulation result for stress analysis.
20
Time
0s 20ms 40ms 60ms 80ms 90ms
1 V(Cout:1) 2 rms(I(Cout))
0V
5V
10V
1
0A
50mA
100mA
2
SEL>>SEL>>
1 V(D1:2)- V(D1:1) 2 I(D1) avg(I(D1))
0V
10V
20V
1
100mA
200mA
300mA
2
>>
1 V(Q1:c) 2 I(Q1:c)
0V
5V
10V
15V
20V
1
250mA
500mA
2
>>
I(L) rms(I(L))
0A
200mAI(L) peak,
rms
I(L) = 261.054mA(peak) , 94.1399mA(rms)
V(Q1:C),
I(Q1:C)
Q1 2SD2623: VCEO=20V, ICMAX=0.5A
V(D1:K,D1:A),
IF(D1)
D1 HRU0302A: VRRM=20V, IO=0.3A(avg), IFSM=3A
V(Cout),
I(Cout) rms
I(Cout) = 50.255mA(rms)
100% of Rated Value
100% of Rated Value
Copyright (C)Marutsuelec Co.,Ltd. 2017
Time
89.964ms 89.966ms 89.968ms 89.970ms 89.972ms 89.974ms
1 V(Q1:c) 2 I(Q1:c)
0V
5V
10V
15V
20V
1
>>
0A
100mA
200mA
300mA
2
1 V(Q1:c)*I(Q1:c) 2 avg(W(Q1))
0W
200mW
400mW
600mW
1
SEL>>
0W
50mW
100mW
150mW
2
SEL>>
6.1 Bipolar Junction Transistor Losses
• Simulation result shows waveforms of IC and VCE of transistor Q1.Loss in peak and
average values are also shown.
21
100% of Rated Value (PC, max.=150mW)
PC, avg.=17.254mW
turn-on loss
Conduction loss
turn-off loss
V(Q1:C),
I(Q1:C)
P(Q1)
peak, avg
Copyright (C)Marutsuelec Co.,Ltd. 2017
Time
89.964ms 89.965ms 89.966ms 89.967ms 89.968ms 89.969ms 89.970ms 89.971ms 89.972ms 89.973ms
1 V(D1:1,D1:2) 2 I(D1)
-10V
-5V
0V
5V
10V
1
-200mA
-100mA
0A
100mA
200mA
2
SEL>>SEL>>
W(D1) avg(W(D1))
-100mW
-50mW
0W
50mW
100mW
6.2 Schottky Barrier Diode Losses
• Simulation result shows waveforms of IF and VAK of diode D1.Loss in peak and
average values are also shown.
22
PD, avg.=18.45mW
Reverse
recovery loss
Conduction loss
V(D1:A,D1:K),
I(D1
P(D1)
peak, avg
Reverse
leakage loss
Reverse recovery
characteristic
Copyright (C)Marutsuelec Co.,Ltd. 2017
7.1 Start-Up Sequencing Waveforms
• Simulation result shows start-up sequencing waveforms, including V(OUT) and control signal
(VRAMP, VOSC, and VFB).
23
V(OUT)
V(FB)
VOSC: V(CT)
VRAMP: V(CS)
Time
0s 10ms 20ms 30ms 40ms 50ms 60ms 70ms 80ms 90ms
V(OUT)
5.0V
6.0V
7.0V
8.0V
9.0V
V(U1:CT) V(U1:CS) V(U1:FB)
0V
0.5V
1.0V
1.5V
2.0V
2.5V
SEL>>
Copyright (C)Marutsuelec Co.,Ltd. 2017
7.2 Switching Waveforms at Load 50 mA (RL=180)
• Simulation result shows boost converter switching waveforms at load 50mA, including IL,
VC(Q1), IC(Q1), I(D1) and V(OUT)
24
I(D1)
I(L)
VC(Q1)
IC(Q1)
V(OUT)
Time
89.950ms 89.960ms 89.970ms 89.980ms89.944ms
V(OUT)
9.050V
9.075V
9.100V
SEL>>
I(D1)
-50mA
0A
50mA
100mA
150mA
1 V(Q1:c) 2 I(Q1:c)
0V
2.5V
5.0V
7.5V
10.0V
1
0A
100mA
150mA
200mA
2
>>
I(L)
0A
50mA
100mA
150mA
200mA
Copyright (C)Marutsuelec Co.,Ltd. 2017
7.3 Switching Waveforms at Load 10 mA (RL=900)
• Simulation result shows boost converter switching waveforms at load 10mA, including IL,
VC(Q1), IC(Q1), I(D1) and V(OUT)
25
I(D1)
I(L)
VC(Q1)
IC(Q1)
V(OUT)
Time
89.944ms 89.952ms 89.960ms 89.968ms 89.976ms 89.984ms
V(OUT)
9.075V
9.100V
9.125V
I(D1)
-25mA
25mA
50mA
75mA
SEL>>
1 V(Q1:c) 2 I(Q1:c)
-4V
4V
8V
12V
1
>>
-25mA
0A
25mA
50mA
75mA
2
I(L)
-25mA
0A
25mA
50mA
75mA
Copyright (C)Marutsuelec Co.,Ltd. 2017
SIMULATION SETTINGS 1
• .TRAN 0 90ms 0.1ms 150n
• .OPTIONS ABSTOL= 10.0n
• .OPTIONS RELTOL= 0.01
• .OPTIONS VNTOL= 10.0u
26
These settings are for:
• Start-Up Transient Simulation (0~90ms.)
• Voltage and Current Simulation
• Step-Load Response
Copyright (C)Marutsuelec Co.,Ltd. 2017
SIMULATION SETTINGS 2
• .TRAN 0 90ms 70ms 100n
• .OPTIONS ABSTOL= 10.0n
• .OPTIONS RELTOL= 0.01
• .OPTIONS VNTOL= 10.0u
27
These settings are for:
• Efficiency and Losses
• Switching Waveforms
Copyright (C)Marutsuelec Co.,Ltd. 2017

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  • 2. Contents Slide # 1. NJM2377 – Boost DC/DC Converter Circuit........................................................................... 2. PWM – Boost DC/DC Converter Basic Operation and Design................................................ 2.1 Boost DC/DC Converter – VOUT........................................................................................ 2.2 Boost DC/DC Converter – tON /tOFF.................................................................................... 2.3 Boost DC/DC Converter – Inductor Selection................................................................... 2.4 Boost DC/DC Converter – Inductor Peak Current............................................................. 2.5 Boost DC/DC Converter – COUT Selection........................................................................ 3. NJM2377 – Application Circuit Configuration.......................................................................... 3.1 NJM2377 – Soft Start Time Setting................................................................................... 3.2 NJM2377 – Oscillation Frequency Setting........................................................................ 3.3 Error Amp Feed Back Loop Setting.................................................................................. 4. Performance Characteristics……………………………........................................................... 4.1 Output Start-Up Voltage and Current................................................................................ 4.2 Output Ripple Voltage....................................................................................................... 4.3 Efficiency.......................................................................................................................... 4.4 Step-Load Response……................................................................................................. 5. Voltage and Current Simulation Result................................................................................... 6. Losses 6.1 Bipolar Junction Transistor Losses................................................................................... 6.2 Schottky Barrier Diode Losses.......................................................................................... 7. Waveforms 7.1 Start-Up Sequencing Waveforms...................................................................................... 7.2 Switching Waveform at Load 50mA.................................................................................. 7.3 Switching Waveform at Load 10mA.................................................................................. Simulations index......................................................................................................................... Simulations Settings.................................................................................................................... 3 4 5 6 7 8 9 10 11-12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27-28 2Copyright (C)Marutsuelec Co.,Ltd. 2017
  • 3. 1. NJM2377 – Boost DC/DC Converter Circuit 3 CLP 100pF Rf 560k ESR 0.103 Cin 220uF L 150u 1 2 Rload 180 R1 9.1k R2 150k Q1 Q2SD2623 OUT R3 0.8 U1 NJM2377 -IN FB GND OUTV+ CS CT REF Rt 24k Ct 470pF IC = 0 D1 HRU0302A 0 V+ 5V 0 IN Cout 220uF Rsf 160k CS 4.7uF IC = 0 0 Rsr 180k 0 5V to 9V at 50mA Boost DC/DC Converter (fOSC=150kHz, Vripple=30mVp-p) U1: New Japan Radio NJM2377 Control IC Q1: Panasonic 2SD2623 NPN D1: Renesas HRU0302A Schottky Barrier Diode Copyright (C)Marutsuelec Co.,Ltd. 2017
  • 4. 2. PWM – Boost DC/DC Converter Basic Operation and Design ESR IN L 1 2 Rload OUT R1 R2 Q1 QN_SW V+ 0 Cout D1 PWM Control Circuit 4 PWM output pulse VOUT=9V tON tOFF VIN=5V L: IL • VOUT is monitored by R1 and R2 then compared to reference voltage VB in NJM2377. • Error voltage is pulse width modulated with sawtooth waveform. • PWM output pulse width is proportional to the error level. This signal will control the switch ON/OFF(tON /tOFF). • Therefore VOUT, which is proportional to tON /tOFF, is controlled to the desired voltage. 2.1) 2.5) 2.2) 2.3), 2.4) Copyright (C)Marutsuelec Co.,Ltd. 2017
  • 5. 2.1 Boost DC/DC Converter – VOUT • VOUT is determined by R1 and R2, without considering I(IN-) of NJM2377 VOUT is calculated as below. • For VOUT=9V, R1=9.1kΩ, R2=150kΩ are selected. 5 9.09V0.521 9.1k 150k 1 1 2               REFOUT V R R V Copyright (C)Marutsuelec Co.,Ltd. 2017
  • 6. 2.2 Boost DC/DC Converter – tON /tOFF • If the circuit works in continuous conduction mode (CCM), output voltage (VOUT) and ON/OFF time (tON /tOFF) follow the equation below. then • From VIN =5V, VOUT =9V and fOSC =150kHz, these result as tON /tOFF are tON=2.96μs, tOFF=3.71μs, and duty=45%. 6 IN OFF OFFON OUT V t tt V         OSCOUT INOUT ON fV VV t    Copyright (C)Marutsuelec Co.,Ltd. 2017
  • 7. 2.3 Boost DC/DC Converter – Inductor Selection • LMIN value for the convertor to work in continuous conduction mode (CCM), is calculated as below. • From VIN =5V, VOUT =9V, IOUT =50mA and tON=2.96μs, these result as LMIN=82.2μH. • A larger value will be used to increase the available output current, but limit it to around twice the LMIN value. L =150μH is selected. 7 ON OUTOUT IN MIN t IV V L    2 2 MINMIN LLL  2 Copyright (C)Marutsuelec Co.,Ltd. 2017
  • 8. Time 86.810ms 86.816ms 86.822ms 86.828ms I(L) 0A 50mA 100mA 150mA 200mA (86.818m,140.985m) (86.821m,40.531m) • PSpice is used to verify the circuit design. • IL, PK=140.985mA and IL,PK=140.985m- 40.531m=100.454mA 2.4 Boost DC/DC Converter – Inductor Peak Current • IL, PK is calculated as below. • And the current ripple - IL, PK is calculated as below 8 140mA2.96μ 150μ2 5 5 0.059 2           ON IN IN OUTOUT L,PK t L V V IV I mA992.96μ 150μ 5   ON IN L,PK t L V ΔI • Add trace I(L) • Zoom to check the peak value. IL, PK Copyright (C)Marutsuelec Co.,Ltd. 2017
  • 9. • PSpice is used to verify the circuit design. • IL,PK=101.168mA, ton=3μs. • Vripple =14.8mVp-p • Irms *=53.856mArms.  Irms is larger than calculated value due to feedback loop response ripple current. Time 87.5484ms 87.5684ms V(OUT) 9.06V 9.07V 9.08V 9.09V SEL>> (87.556m,9.0792) (87.553m,9.0644) I(L) rms(I(Cout)) 0A 100mA 200mA (87.556m,141.564m) (87.553m,40.396m) • COUT is determined from the Vripple Spec (30mVp-p). • If COUT >> IOUTton/Vripple (50m2.96μ/30m=4.933μF), Vripple will mainly caused by ESR. • Select the capacitor that can handle the ripple current Irms. • COUT=220μF, ESR=103m is selected.     m103 99m 30m )( L ppripple I V ESR 2.5 Boost DC/DC Converter – COUT Selection 9 IL, PK 13mArms 6.67μ 2.96μ 32 99m 32     t tonI I L rms Irms Vripple Copyright (C)Marutsuelec Co.,Ltd. 2017
  • 10. CLP 100pF Rf 560k ESR 0.103 Cin 220uF L 150u 1 2 Rload 180 R1 9.1k R2 150k Q1 Q2SD2623 OUT R3 0.8 U1 NJM2377 -IN FB GND OUTV+ CS CT REF Rt 24k Ct 470pF IC = 0 D1 HRU0302A 0 V+ 5V 0 IN Cout 220uF Rsf 160k CS 4.7uF IC = 0 0 Rsr 180k 0 3. NJM2377 – Application Circuit Configuration 10 5V to 9V at 50mA Boost DC/DC Converter (fOSC=150kHz) U1: New Japan Radio NJM2377 Control IC Q1: Panasonic 2SD2623 NPN D1: Renesas HRU0302A Schottky Barrier Diode 3.1) 3.2) 3.3) Copyright (C)Marutsuelec Co.,Ltd. 2017
  • 11. • First, caculate Rsr by Rsr>VTHLA(max.)/ICHG(min.) (1.8V/10μA=180k) • During steady state operation, I(CS)=IBCS=250ns. Maximum duty cycle is determined by V(CS). Set V(CS)=VTHCS(max.)=0.8V, Rsf is calculated by 160k ΩRsf 1.5 Rsf180k 180k 0.8 .)(max        REFTHCS V RsfRsr Rsr V • Soft-start time or tduty(max.) is time needed for V(CS) to reach VTHCS(max.) by charging capacitor Cs. • CS is charged by current Ics, calculated by: then 3.1 NJM2377 – Soft Start Time Setting 11 NJM2377 soft-start time is determined by Rsr, CS and Rsf 4.41uA 160k180k 1.5      RsfRsr V I REF CS 109ms 30μ4.41μ 4.7μ0.8 .)(max .)(max        CHGCS THCS duty II CsV t Copyright (C)Marutsuelec Co.,Ltd. 2017
  • 12. 3.1 NJM2377 – Soft Start Time Setting (Simulation) 12 NJM2377 soft-start time is determined by Rsr, Rsf and CS • Select Rsr, Rsf, and CS then check tduty(max.) by simulation. • tduty(max.)=109.170ms. for CS=4.7uF • tduty(max.)=76.653ms for CS=3.3uF and tduty(max.)=157.953ms for CS=6.8uF. CS {CS} IC = 0 PARAMETERS: CS = 4.7u CLP 100pF Rf 560k Cin 220uF U1 NJM2377 -IN FB GND OUTV+ CS CT REF Rt 10MEG Ct 10nF IC = 0 0 CS V+ 5V IN REF 0 Rsf 160k 0 Rsr 180k 0 R1 1MEG .TRAN 0 500ms 0 Time 0s 250ms 500ms V(CS) 0V 0.5V 1.0V 1.5V (109.170m,800.000m) (76.653m,800.000m) (157.953m,800.000m) Copyright (C)Marutsuelec Co.,Ltd. 2017
  • 13. 3.2 NJM2377 – Oscillation Frequency Setting • CT = 470pF and RT = 24kΩ to set an oscillation frequency to be 150kHz. 13 V CLP 100pF Rf 560k Cin 220uF U1 NJM2377 -IN FB GND OUTV+ CS CT REF Rt 24k Ct 470pF IC = 0 0 V+ 5V IN 0 Rsf 160k CS 4.7uF IC = 0 0 Rsr 180k 0 R1 1MEG NJM2377 oscillation frequency fOSC is determined by CT and RT fosc=150kHz RT=24k Copyright (C)Marutsuelec Co.,Ltd. 2017
  • 14. 3.3 Error Amp Feed Back Loop Setting • For F.B loop gain G > 100, Rf is calculated as: • CLP is suggested to use value between 100pF~1,000pF • Inappropriate F.B loop design can cause an oscillation. PSpice is used to verify the ripple voltage vs. Rf and CLP values. • Simulation result shows Vripple of the circuit with RF=1000k  compare to the circuit with RF=560k. • Changing RF to be 560k  can reduce Vripple from 34mVp-p to less than 20mVp-p. 14 1000kRf 177 150k//9.1k 1,000k 2//1    RR Rf G Error Amp Feed Back Loop is determined by R1, R2, Rf and CLP Time 79.00ms 79.25ms 79.50ms 79.75ms 80.00ms V(OUT) 9.04V 9.06V 9.08V 9.10V 9.12V RF=1000k, CLP=100pF RF=560k, CLP=100pF Copyright (C)Marutsuelec Co.,Ltd. 2017
  • 15. 4. Performance Characteristics CLP 100pF Rf 560k ESR 0.103 Cin 220uF L 150u 1 2 Rload 180 R1 9.1k R2 150k Q1 Q2SD2623 OUT R3 0.8 U1 NJM2377 -IN FB GND OUTV+ CS CT REF Rt 24k Ct 470pF IC = 0 D1 HRU0302A 0 V+ 5V 0 IN Cout 220uF Rsf 160k CS 4.7uF IC = 0 0 Rsr 180k 0 15 • VIN=5V • VOUT=9V • IOUT=50mA • Vripple(P-P)= less than 30mV • Efficiency= 75% at IOUT=50mA U1: New Japan Radio NJM2377 Control IC Q1: Panasonic 2SD2623 NPN D1: Renesas HRU0302A Schottky Barrier Diode Copyright (C)Marutsuelec Co.,Ltd. 2017
  • 16. 4.1 Output Start-Up Voltage and Current • Simulation result shows output start-up time of the circuit. This circuit needs 55ms to reach steady state. 16 Time 0s 20ms 40ms 60ms 80ms 90ms V(OUT) 4V 5V 6V 7V 8V 9V 10V I(Rload) 20mA 30mA 40mA 50mA SEL>> V(OUT) I(Rload) Copyright (C)Marutsuelec Co.,Ltd. 2017
  • 17. Time 60ms 65ms 70ms 75ms 80ms 85ms 90ms V(OUT) 9.05V 9.06V 9.07V 9.08V 9.09V 9.10V SEL>> Time 89.90ms 89.91ms 89.92ms 89.93ms 89.94ms 89.95ms 89.96ms 89.97ms 89.98ms 89.99ms V(OUT) 9.060V 9.065V 9.070V 9.075V 9.080V 4.2 Output Ripple Voltage • Simulation result shows output ripple voltage caused by switching(18mVP-P) and F.B loop oscillation(25mVP-P). 17 V(OUT) V(OUT) [ZOOM] 18mVP-P 25mVP-P Copyright (C)Marutsuelec Co.,Ltd. 2017
  • 18. 4.3 Efficiency • Efficiency of the converter at load IOUT=50mA is 75.5%. 18 Time 70ms 75ms 80ms 85ms 90ms 100*W(Rload)/rms(-W(V+)) 0 25 50 75 100 (90.000m,75.500) Efficiency Copyright (C)Marutsuelec Co.,Ltd. 2017
  • 19. 4.4 Step-Load Response • Simulation result shows the transient response of the circuit, when load currents are 50mA to 10mA to 50mA steps . 19 V(OUT) I(L) I(Load) Time 60ms 65ms 70ms 75ms 80ms 85ms 90ms V(OUT) 9.050V 9.075V 9.100V 9.125V I(L) 0A 100mA 200mA I(I1) 0A 20mA 30mA 40mA 50mA SEL>> Copyright (C)Marutsuelec Co.,Ltd. 2017
  • 20. 5. Voltage and Current Simulation Result • Simulation result shows voltage and current of the devices. • Select L and Cout that can handle their Irms value. • The absolute maximum value of Q1 and D1 are compared to simulation result for stress analysis. 20 Time 0s 20ms 40ms 60ms 80ms 90ms 1 V(Cout:1) 2 rms(I(Cout)) 0V 5V 10V 1 0A 50mA 100mA 2 SEL>>SEL>> 1 V(D1:2)- V(D1:1) 2 I(D1) avg(I(D1)) 0V 10V 20V 1 100mA 200mA 300mA 2 >> 1 V(Q1:c) 2 I(Q1:c) 0V 5V 10V 15V 20V 1 250mA 500mA 2 >> I(L) rms(I(L)) 0A 200mAI(L) peak, rms I(L) = 261.054mA(peak) , 94.1399mA(rms) V(Q1:C), I(Q1:C) Q1 2SD2623: VCEO=20V, ICMAX=0.5A V(D1:K,D1:A), IF(D1) D1 HRU0302A: VRRM=20V, IO=0.3A(avg), IFSM=3A V(Cout), I(Cout) rms I(Cout) = 50.255mA(rms) 100% of Rated Value 100% of Rated Value Copyright (C)Marutsuelec Co.,Ltd. 2017
  • 21. Time 89.964ms 89.966ms 89.968ms 89.970ms 89.972ms 89.974ms 1 V(Q1:c) 2 I(Q1:c) 0V 5V 10V 15V 20V 1 >> 0A 100mA 200mA 300mA 2 1 V(Q1:c)*I(Q1:c) 2 avg(W(Q1)) 0W 200mW 400mW 600mW 1 SEL>> 0W 50mW 100mW 150mW 2 SEL>> 6.1 Bipolar Junction Transistor Losses • Simulation result shows waveforms of IC and VCE of transistor Q1.Loss in peak and average values are also shown. 21 100% of Rated Value (PC, max.=150mW) PC, avg.=17.254mW turn-on loss Conduction loss turn-off loss V(Q1:C), I(Q1:C) P(Q1) peak, avg Copyright (C)Marutsuelec Co.,Ltd. 2017
  • 22. Time 89.964ms 89.965ms 89.966ms 89.967ms 89.968ms 89.969ms 89.970ms 89.971ms 89.972ms 89.973ms 1 V(D1:1,D1:2) 2 I(D1) -10V -5V 0V 5V 10V 1 -200mA -100mA 0A 100mA 200mA 2 SEL>>SEL>> W(D1) avg(W(D1)) -100mW -50mW 0W 50mW 100mW 6.2 Schottky Barrier Diode Losses • Simulation result shows waveforms of IF and VAK of diode D1.Loss in peak and average values are also shown. 22 PD, avg.=18.45mW Reverse recovery loss Conduction loss V(D1:A,D1:K), I(D1 P(D1) peak, avg Reverse leakage loss Reverse recovery characteristic Copyright (C)Marutsuelec Co.,Ltd. 2017
  • 23. 7.1 Start-Up Sequencing Waveforms • Simulation result shows start-up sequencing waveforms, including V(OUT) and control signal (VRAMP, VOSC, and VFB). 23 V(OUT) V(FB) VOSC: V(CT) VRAMP: V(CS) Time 0s 10ms 20ms 30ms 40ms 50ms 60ms 70ms 80ms 90ms V(OUT) 5.0V 6.0V 7.0V 8.0V 9.0V V(U1:CT) V(U1:CS) V(U1:FB) 0V 0.5V 1.0V 1.5V 2.0V 2.5V SEL>> Copyright (C)Marutsuelec Co.,Ltd. 2017
  • 24. 7.2 Switching Waveforms at Load 50 mA (RL=180) • Simulation result shows boost converter switching waveforms at load 50mA, including IL, VC(Q1), IC(Q1), I(D1) and V(OUT) 24 I(D1) I(L) VC(Q1) IC(Q1) V(OUT) Time 89.950ms 89.960ms 89.970ms 89.980ms89.944ms V(OUT) 9.050V 9.075V 9.100V SEL>> I(D1) -50mA 0A 50mA 100mA 150mA 1 V(Q1:c) 2 I(Q1:c) 0V 2.5V 5.0V 7.5V 10.0V 1 0A 100mA 150mA 200mA 2 >> I(L) 0A 50mA 100mA 150mA 200mA Copyright (C)Marutsuelec Co.,Ltd. 2017
  • 25. 7.3 Switching Waveforms at Load 10 mA (RL=900) • Simulation result shows boost converter switching waveforms at load 10mA, including IL, VC(Q1), IC(Q1), I(D1) and V(OUT) 25 I(D1) I(L) VC(Q1) IC(Q1) V(OUT) Time 89.944ms 89.952ms 89.960ms 89.968ms 89.976ms 89.984ms V(OUT) 9.075V 9.100V 9.125V I(D1) -25mA 25mA 50mA 75mA SEL>> 1 V(Q1:c) 2 I(Q1:c) -4V 4V 8V 12V 1 >> -25mA 0A 25mA 50mA 75mA 2 I(L) -25mA 0A 25mA 50mA 75mA Copyright (C)Marutsuelec Co.,Ltd. 2017
  • 26. SIMULATION SETTINGS 1 • .TRAN 0 90ms 0.1ms 150n • .OPTIONS ABSTOL= 10.0n • .OPTIONS RELTOL= 0.01 • .OPTIONS VNTOL= 10.0u 26 These settings are for: • Start-Up Transient Simulation (0~90ms.) • Voltage and Current Simulation • Step-Load Response Copyright (C)Marutsuelec Co.,Ltd. 2017
  • 27. SIMULATION SETTINGS 2 • .TRAN 0 90ms 70ms 100n • .OPTIONS ABSTOL= 10.0n • .OPTIONS RELTOL= 0.01 • .OPTIONS VNTOL= 10.0u 27 These settings are for: • Efficiency and Losses • Switching Waveforms Copyright (C)Marutsuelec Co.,Ltd. 2017