TPD7210Fのスパイスモデル(東芝セミコンダクター社&ストレージ社)

1. Device Modeling Report
COMPONENTS: Power MOSFET Gate Driver for 3-
Phase DC Motor
PART NUMBER: TPD7210F
MANUFACTURER: TOSHIBA
Bee Technologies Inc.
All Rights Reserved Copyright (c) Bee Technologies Inc. 2012
1

2. Symbol and Pin Layout
U1
TPD7210F
ENB COSC
ROSC CPV
IN1 WU
IN2 VU
IN3 UU
IN4 UB
IN5 PGND2
IN6 VB
SGND1 PGND1
CP1 WB
SGND2 FAULT
CP2 VDD
All Rights Reserved Copyright (c) Bee Technologies Inc. 2012
2

3. CP1 CP2 CPV
VDD
HUU UO UU
DD U
UUI I SS
U2
S1 S S3 S U1 CMPTPD7201F HVU UO VU
+ + + + CMPTPD7201F - -
DD U
H1 - - 0 - - 0 + + CMP2
VUI I SS
VDD OPR
Ref 1 Ref 2 HWU UO
SGND UVD WU
S2 S S4 S V(VDD)+14
REF2 DD U
+ + + +
UVD IN+ OUT+
OPR
- - 0 - - 0 IN- OUT- 32.5Vdc I SS
WUI
REF1
0 EVALUE
HUB BO
Model Equivalent Circuit
UB
OPR DD B
CMP1 UBI
O I SS
O Q
/O I HVB BO
/O VB
CPON
H4 DD B
DdT VBI
I SS
O
H3
CMP1
CMP2
HWB BO WB
OSC LGCKT
DD B
WBI
5V7 I SS
PGND1
IN+ OUT+
IN- OUT-
RPGND2
E5V7 1U PGND2
EVALUE
Limit( V(%IN+, %IN-), 0, 5.7 )
5V7 osc OPR
ROSC CLK
ROSC
HIN
COSC SGND I-Logic UVD
H2 OSC FLT0
OPR
IN1O
IN2O
IN3O
IN4O
IN5O
IN6O
COSC FLT0 FAULT
H5
FLT
SGND
IN1
IN2
IN3
IN4
IN5
IN6
ENB
NFLT D
I
S
RSGND2
1U
UF
NORLTPD7210F SGND1
All Rights Reserved Copyright (c) Bee Technologies Inc. 2012
SGND1 SGND2 IN1 IN2 IN3 IN4 IN5 IN6 ENB
3

4. Timing Chart and Truth Table
Circuit Simulation Result
7.0V
6.0V
5.0V
4.0V
V(VDD)
1 5.0V 2 10V
0V
5V
>>
0V
1 V(IN1) 2 V(IN4)
1 5.0V 2 2.0V
0V
-5.0V >>
-0.2V
1 V(ENB) 2 V(H4:CPON)
1 5V 2 15V
0V 10V
5V
>>
0V
1 V(UU) 2 V(UB)
10V
5V
SEL>>
0V
0s 2ms 4ms 6ms 8ms 10ms 12ms 14ms 16ms 18ms 20ms
V(FAULT)
Time
*Evaluation is made from the Sub-circuit inside the IC model
Simulation result
IN ENB VOUT FAULT STATE
L L L L
H L L L
Normal
L H L L
H H H L
L L L H
H L L H
VDD under-voltage detection
L H L H
H H H H
High-side H L L H Upper and lower short-
Low-side H H L H circuit input detection
All Rights Reserved Copyright (c) Bee Technologies Inc. 2012
4

5. INPUT Characteristics
Circuit Simulation Result
1.4V 50uA
1 2
1.2V
1.0V
0.8V
0.6V 25uA
0.4V
0.2V
0V
>>
-0.2V 0A
0V 0.5V 1.0V 1.5V 2.0V 2.5V 3.0V 3.5V 4.0V 4.5V 5.0V
1 V(HIN.IN101) 2 -I(V1)
V_V1
Evaluation circuit
OPR
UU
HIN
IN1O
IN2O
IN3O
IN4O
IN5O
IN6O
I-Logic
OPR
FLT0
SGND
ENB
IN1
IN2
IN3
IN4
IN5
IN6
V1
IN1 IN2 IN3 IN4 IN5 IN6 ENB
I
VENB
0 5
*Evaluation is made from the Sub-circuit inside the IC model
Simulation result
Parameter Condition Unit Measurement Simulation %Error
VIH 2.7 2.7 0
V
VIL 2.45 2.45 0
IIH VIN = 5V 50 50 0
uA
IIL VIN = 0V 0 0 0
All Rights Reserved Copyright (c) Bee Technologies Inc. 2012
5

6. Charge Pump Voltage Characteristics
Circuit Simulation Result
36V
34V
32V
30V
28V
26V
24V
22V
20V
18V
16V
1.60ms 1.64ms 1.68ms 1.72ms 1.76ms 1.80ms 1.84ms 1.88ms 1.92ms 1.96ms
V(CPV)
Time
Simulation result
Condition: CP1 = CP2 = 0.1F, ROSC = 62k, COSC = 270pF
Condition Unit Measurement Simulation %Error
Parameter
VDD = 7V
VIN1 to VIN6 = 0V
V 18.9 (VDD+11.9) 19.7 4.23
VDD = 13.5V
VCPV VIN1 to VIN6 = 0V
V 27.5 (VDD+14) 27.5 0
VDD = 18V
VIN1 to VIN6 = 0V
V 32 (VDD+14) 32.1 0.31
All Rights Reserved Copyright (c) Bee Technologies Inc. 2012
6

7. Charge Pump Voltage Characteristics
Evaluation circuit
U1
270p
Cosc
TPD7210F
COSC
ENB ENB COSC 0
C3
1u
Rosc ROSC CPV
ROSC CPV 0
62k
IN1 WU D3
IN1 WU
DCP
IN2 IN2 VU VU
0
IN3 IN3 UU UU
IN4 IN4 UB UB
IN5 IN5 PGND2
IN6 IN6 VB VB
SGND1 PGND1
0.1u
C1
CP1
CP1 WB WB
D2
CPV2
SGND2 FAULT VDD
0.1u
C2
D1 DCP
DCP CP2 RFLT
CP2 VDD 13.5k
FAULT
VDD
VDD
7
0
IN1 IN2 IN3 IN4 IN5 IN6 ENB
VIN1 VIN2 VIN3 VIN4 VIN5 VIN6 VENB
0V 0V 0V 0V 0V 0V 5V
0 0 0 0 0 0 0
All Rights Reserved Copyright (c) Bee Technologies Inc. 2012
7

8. High-Side Output Voltage Characteristics
Circuit Simulation Result
32V
VDD=18V
28V
VDD=13.5V
24V
20V
VOH(H), VDD=7V
16V
12V
V(UU)
200mV
150mV
VOL(H), VDD=7 – 18 V
100mV
50mV
SEL>>
0V
1.60ms 1.64ms 1.68ms 1.72ms 1.76ms 1.80ms 1.84ms 1.88ms 1.92ms 1.96ms
V(VU)
Time
Simulation result
Condition: CP1 = CP2 = 0.1F, ROSC = 62k, COSC = 270pF
Condition Unit Measurement Simulation %Error
Parameter
VDD = 7V,
VIN = 5V, V 16.9 (VDD+9.9) 17.4 2.96
IO = -10mA
VDD = 13.5V,
VOH(H) VIN = 5V, V 25.5 (VDD+12) 25.7 0.78
IO = -10mA
VDD = 18V,
VIN = 5V, V 30 (VDD+12) 30.1 0.33
IO = -10mA
VIN = 5V,
VDROP IO = -10mA, V 2 2.07 3.5
VDROP=VCPV-VOH
VDD = 7 to 18 V,
VOL(H) VIN = 0V, V 0.1 0.1 0
IO = 0mA
All Rights Reserved Copyright (c) Bee Technologies Inc. 2012
8

9. High-Side Output Voltage Characteristics
Evaluation circuit
U1
270p
Cosc
TPD7210F C3
COSC 10u
ENB ENB COSC 0 IC = 18.625
Rosc ROSC CPV
ROSC CPV IO -10mA
0
WU
62k
IN1 D3
IN1 WU
VU DCP
IN2 IN2 VU
0 UU
IN3 IN3 UU 0
IN4 IN4 UB UB
IN5 IN5 PGND2
IN6 IN6 VB VB
SGND1 PGND1
0.1u
C1
CP1
CP1 WB WB
D2
CPV2
SGND2 FAULT VDD
0.1u
C2
D1 DCP
DCP CP2 RFLT
CP2 VDD 13.5k
FAULT
VDD
VDD
7
0
IN1 IN2 IN3 IN4 IN5 IN6 ENB
VIN1 VIN2 VIN3 VIN4 VIN5 VIN6 VENB
5V 0V 0V 0V 0V 0V 5V
0 0 0 0 0 0 0
All Rights Reserved Copyright (c) Bee Technologies Inc. 2012
9

10. Low-Side Output Voltage Characteristics
Circuit Simulation Result
20V
VDD=18V
15V VDD=13.5V
10V
VOH(L), VDD=7V
5V
0V
V(UB)
200mV
150mV
VOL(L), VDD=7 – 18 V
100mV
50mV
SEL>>
0V
0s 40us 80us 120us 160us 200us 240us 280us 320us 360us
V(VB)
Time
Simulation result
Condition: CP1 = CP2 = 0.1F, ROSC = 62k, COSC = 270pF
Condition Unit Measurement Simulation %Error
Parameter
VDD = 7V,
VIN = 5V, V 6.9 (VDD-0.1) 6.93 0.43
IO = -10mA
VDD = 13.5V,
VOH(L) VIN = 5V, V 13.4 (VDD-0.1) 13.43 0.22
IO = -10mA
VDD = 18V,
VIN = 5V, V 17.9 (VDD-0.1) 17.93 0.17
IO = -10mA
VDD = 7 to 18 V,
VOL(L) VIN = 0V, V 0.1 0.1 0
IO = 0mA
All Rights Reserved Copyright (c) Bee Technologies Inc. 2012
10

11. Low-Side Output Voltage Characteristics
Evaluation circuit
U1
270p
Cosc
TPD7210F C3
COSC 10u
ENB ENB COSC 0 IC = 18.625
Rosc ROSC CPV
ROSC CPV 0
WU
62k
IN1 D3
IN1 WU
VU DCP
IN2 IN2 VU
0 UU
IN3 IN3 UU
UB IO -10mA
IN4 IN4 UB
IN5 IN5 PGND2
IN6 IN6 VB VB 0
SGND1 PGND1
0.1u
C1
CP1
CP1 WB WB
D2
CPV2
SGND2 FAULT VDD
0.1u
C2
D1 DCP
DCP CP2 RFLT
CP2 VDD 13.5k
FAULT
VDD
VDD
7
0
IN1 IN2 IN3 IN4 IN5 IN6 ENB
VIN1 VIN2 VIN3 VIN4 VIN5 VIN6 VENB
0V 0V 0V 5V 0V 0V 5V
0 0 0 0 0 0 0
All Rights Reserved Copyright (c) Bee Technologies Inc. 2012
11

12. Output ON Resistance Characteristics
Circuit Simulation Result
8.0
7.0
6.0
SEL>>
4.0
-50mA -100mA -1.0A
(13.43-V(UB))/I(IO)
-I_IO
5.0
4.5
4.0
50mA 100mA 1.0A
(V(VB)-0.1)/ I(IO)
I_IO
Evaluation circuit
VDD 1
VDD V1
13.5 1
VDD
HUB BO UB GAIN = -1
DD B 0 0
1 I SS F1
F
HVB BO VB
DD B 0
0 I SS IO
0Adc
0
*Evaluation is made from the Sub-circuit inside the IC model
Simulation result
Parameter Condition Unit Measurement Simulation %Error
VDD = 13.5 V,
RSOURCE VIN = 5 V, 7 6.857 -2.04
IO = -0.5 A

VDD = 13.5 V,
RSINK VIN = 0 V, 4.5 4.499 -0.02
IO = -0.5 A
All Rights Reserved Copyright (c) Bee Technologies Inc. 2012
12

13. Under Voltage Detection Characteristics
Circuit Simulation Result
1.5V
1.0V
0.5V
0V
-0.5V
0V 2V 4V 6V 8V 10V 12V
V(UVLO)
V(VDD)
Evaluation circuit
V1
VDD
T1 = 0 H1
V1 = 0
T2 = 1 VDD OPR
V2 = 30 SGND UVD
T3 = 2
Vsgnd V3 = 0 UVD
UVLO
OPR
0
0
*Evaluation is made from the Sub-circuit inside the IC model
Simulation result
Parameter Condition Unit Measurement Simulation %Error
VDDUV 5.5 5.5 0
V
VDDUV 0.5 0.5 0
All Rights Reserved Copyright (c) Bee Technologies Inc. 2012
13

14. Switching Time Characteristics
Circuit Simulation Result
5.5V
VIN
4.0V
50%
2.0V
0V
V(IN1)
14V
VOUT
10V
(VDD-3)90%
5V
(VDD-3)10%
SEL>>
-2V
0s 2us
td(ON) 4us 6us
td(OFF)
8us 10us
V(UU)
tON Time tOFF
Simulation result
Parameter Condition Unit Measurement Simulation %Error
td (ON) 0.25 0.251 0.4
VDD = 13.5V,
tON VCPV = 13.5V, 0.5 0.504 0.8
COUT = 12400 pF, s
td (OFF) 0.25 0.250 0
RG = 47 
tOFF 0.5 0.495 -1.0
VDD = 13 V,
tdead tdead = tOFF-td(on) s 0.25 0.244 -2.4
All Rights Reserved Copyright (c) Bee Technologies Inc. 2012
14

15. Switching Time Characteristics
Evaluation circuit
U1
270p
Cosc
TPD7210F
Rosc COSC
ENB ENB COSC 0
C3
2.2u
62k
ROSC CPV
0 ROSC CPV 0
WU
IN1 D3
IN1 WU
VU DCP
VIN1 IN2 VU
UU
TD = 2.45u IN3 UU
UB
TR = 100n
TF = 100n IN4 UB
PW = 4.9u
PER = 1 IN5 PGND2
VB
V1 = 0 RG1
V2 = 5 IN6 VB
47
SGND1 PGND1
C1
0.1u
WB
CP1 Ciss1
CP1 WB
12400p
D2
CPV2
SGND2 FAULT VDD
0.1u
C2
D1 DCP
DCP CP2 RFLT
CP2 VDD 13.5k
ENB FAULT VDD
VDD
VENB 13.5
5V
0 0
All Rights Reserved Copyright (c) Bee Technologies Inc. 2012
15

16. Oscillating Frequency Characteristics
Circuit Simulation Result
2.0V
1.5V V ROSC pin
1.0V
0.5V
SEL>> V COSC pin
0V
V(ROSC) V(COSC)
OSC clock (inside the IC)
1.0V
0.5V
0V
0s 10us 20us 30us 40us 50us 60us 70us 80us 90us
v(osc)
Time
Evaluation circuit
5V7
5V7 osc
ROSC CLK
ROSC
COSC SGND
COSC H2 OSC
Rosc
62k Cosc
270p
0
*Evaluation is made from the Sub-circuit inside the IC model
Simulation result
Parameter Condition Unit Measurement Simulation %Error
VDD = 7-18V,
fOSC ROSC = 62 k, kHz 100 99.82 -0.18
COSC = 270 pF
All Rights Reserved Copyright (c) Bee Technologies Inc. 2012
16

17. FAULT Output Characteristics
Circuit Simulation Result
1.0V
0.5V
SEL>>
V(VFLT_IN:+)
20V td(ON)
10V
0V
V(FAULT)
1.0mA
100uA
IFAULT, Leakage
10uA
1.0uA
5.6us 6.0us 6.4us 6.8us 7.2us 7.6us 8.0us 8.4us 8.8us 9.2us
-I(RFLT)
Time
Evaluation circuit
VDD
FAULT
H1
FLT
VFLT_IN
V RFLT
D 18k
0 I
V1 = 0 S
V
V2 = 1
TD = 1.45u
TR = 100n SGND
TF = 100n
PW = 4.9u
PER = 1
*Evaluation is made from the Sub-circuit inside the IC model
Simulation result
Parameter Condition Unit Measurement Simulation %Error
IFAULT, Max.  mA 5 5.01 0.2
VDD = 7-18V,
VFAULT IFAULT = 1mA
V 0.8 0.799 -0.13
VDD = 7-18V,
IFAULT, Leakage VFAULT = 18V A 10 9.637 -3.63
td(FAULT)  s 1[Max.] 0.5 
All Rights Reserved Copyright (c) Bee Technologies Inc. 2012
17

18. Truth Table (1/5)
Circuit Simulation Result
Mode # 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
IN1 DSTM1:PIN1 L H L L L L L H H H L L L L L L
IN2 DSTM2:PIN1 L L H L L L H L L L H H H L L L
IN3 DSTM3:PIN1 L L L H L L L L L L L L L H H H
IN4 DSTM4:PIN1 L L L L H L L H L L H L L H L L
IN5 DSTM5:PIN1 L L L L L H L L H L L H L L H L
IN6 DSTM6:PIN1 L L L L L L H L L H L L H L L H
Mode # 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
1 15V 2 3
30V
45V
L H L L L L L L H H L L L L L L
0V
15V
30V
L L H L L L H L L L H L H L L L
-15V
0V
15V
L L L H L L L L L L L L L H H L
>> -15V
-38V 0V
1 V(UU) 2 V(VU) 3 V(WU)
1 15V 2 3
30V
45V
L L L L H L L L L L H L L H L L
0V
15V
30V
-15V L L L L L H L L H L L L L L H L
0V
15V
SEL>> -15V L L L L L L H L L H L L H L L L
-38V 0V
0s 5us 15us 25us 35us 45us 55us 65us 75us
1 V(UB) 2 V(VB) 3 V(WB)
Time
All Rights Reserved Copyright (c) Bee Technologies Inc. 2012
18

19. Truth Table (2/5)
Circuit Simulation Result
Mode # 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
IN1 DSTM1:PIN1 H L H L L L H H H L L L H H H H
IN2 DSTM2:PIN1 H H L L L L H H H H H H L L L L
IN3 DSTM3:PIN1 L H H L L L L L L H H H H H H L
IN4 DSTM4:PIN1 L L L H L H H L L H L L H L L H
IN5 DSTM5:PIN1 L L L H H L L H L L H L L H L H
IN6 DSTM6:PIN1 L L L L H H L L H L L H L L H L
Mode # 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
1 15V 2 3
30V
45V
H L H L L L L L H L L L L H L L
0V
15V
30V
H H L L L L L L H H L L L L L L
-15V
0V
15V
L H H L L L L L L H L L L H L L
>> -15V
-38V 0V
1 V(UU) 2 V(VU) 3 V(WU)
1 15V 2 3
30V
45V
L L L H L H L L L H L L L L L L
0V
15V
30V
-15V L L L H H L L L L L L L L H L L
0V
15V
L L L L H H L L H L L L L L L L
SEL>> -15V
-38V 0V
0s 5us 15us 25us 35us 45us 55us 65us 75us
1 V(UB) 2 V(VB) 3 V(WB)
Time
All Rights Reserved Copyright (c) Bee Technologies Inc. 2012
19

20. Truth Table (3/5)
Circuit Simulation Result
Mode # 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48
IN1 DSTM1:PIN1 H H L L L L L L H L H H H L L L
IN2 DSTM2:PIN1 L L H H H L L L H L H H H H H H
IN3 DSTM3:PIN1 L L L L L L H H H L L L L H H H
IN4 DSTM4:PIN1 L H H L H H L H L H H L H H L H
IN5 DSTM5:PIN1 H L H H L H H L L H H H L H H L
IN6 DSTM6:PIN1 H H L H H L H H L H L H H L H H
Mode # 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48
1 15V 2 3
30V
45V
H L L L L L L L H L L L L L L L
0V
15V
30V
L L L L H L L L H L L L L L L L
-15V
0V
15V
L L L L L H L L H L L L L L L L
SEL>> -15V
-38V 0V
1 V(UU) 2 V(VU) 3 V(WU)
1 15V 2 3
30V
45V
L L L L H H L L L H L L L L L L
0V
15V
30V
-15V H L L L L H L L L H L L L L L L
0V
15V
>> -15V H L L L H L L L L H L L L L L L
-38V 0V
0s 5us 15us 25us 35us 45us 55us 65us 75us
1 V(UB) 2 V(VB) 3 V(WB)
Time
All Rights Reserved Copyright (c) Bee Technologies Inc. 2012
20

21. Truth Table (4/5)
Circuit Simulation Result
Mode # 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64
IN1 DSTM1:PIN1 H H H H H H H L L H H H H L H H
IN2 DSTM2:PIN1 L L L H H H L H L H H H H H L H
IN3 DSTM3:PIN1 H H L H H H L L H H H H L H H H
IN4 DSTM4:PIN1 H L H H L L H H H H L H H H H H
IN5 DSTM5:PIN1 H H L L H L H H H H H L H H H H
IN6 DSTM6:PIN1 L H H L L H H H H L H H H H H H
Mode # 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64
1 15V 2 3
30V
45V
L L L L L L L L L L L L L L L L
0V
15V
30V
L L L L L L L L L L L L L L L L
-15V
0V
15V
L L L L L L L L L L L L L L L L
SEL>> -15V
-38V 0V
1 V(UU) 2 V(VU) 3 V(WU)
1 15V 2 3
30V
45V
L L L L L L L L L L L L L L L L
0V
15V
30V
-15V L L L L L L L L L L L L L L L L
0V
15V
-30V
>> L L L L L L L L L L L L L L L L
-20V 0V
0s 5us 15us 25us 35us 45us 55us 65us 75us
1 V(UB) 2 V(VB) 3 V(WB)
Time
All Rights Reserved Copyright (c) Bee Technologies Inc. 2012
21

22. Truth Table (5/5)
Evaluation circuit
U1
270p
Cosc
TPD7210F
Rosc COSC
UI1 62k
ENB ENB COSC 0
DSTM1 BUF ROSC
IN1
0 ROSC CPV VDD
WU
F1 1 2 IN1 IN1 WU
VU
IN2 RG3
UI2 IN2 VU 47
UU
DSTM2 BUF IN3 RG2
IN3 UU
12400p
Ciss3
IN2 UB 47
F1 1 2 IN4 RG1
IN4 UB
Ciss2
12400p
47
IN5 IN5 PGND2
12400p
Ciss1
UI3 VB
DSTM3 BUF IN6
IN3 IN6 VB
F1 1 2
SGND1 PGND1
0.1u
C1
D2 WB
DCP CP1
UI4 CP1 WB
DSTM4 BUF
SGND2 FAULT
0.1u
C2
IN4
RG6
RG5
RG4
13.5k
RFLT
1 2 CP2
F1 CP2 VDD
47
47
47
CPV2
D1
UI5 DCP
FAULT
DSTM5 BUF D3 VDD
12400p
12400p
12400p
IN5 DCP C3 VDD
Ciss6
Ciss5
Ciss4
F1 1 2 2.2u 13.5
ENB
UI6 VENB
DSTM6 BUF 5V
IN6 0
F1 1 2
0
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22