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© IBM Corporation, 2014 
System z – Visão Geral Hardware 
Anderson Bassani 
IBM STG Brasil – Especialista técnico System z 
Versão 2.0
Trademarks 
The following are trademarks of the International Business Machines Corporation in the United States and/or other countries. 
AIX* 
BladeCenter* 
CICS* 
Cognos* 
DataPower* 
DB2* 
DFSMS 
EASY Tier 
FICON* 
GDPS* 
HiperSockets* 
HyperSwap 
IMS 
InfiniBand* 
Lotus* 
* Registered trademarks of IBM Corporation 
PowerHA* 
PR/SM 
PureSystems 
Rational* 
RACF* 
MQSeries* 
NetView* 
OMEGAMON* 
Parallel Sysplex* 
POWER7* 
The following are trademarks or registered trademarks of other companies. 
RMF 
Smarter Planet* 
Storwize* 
System Storage* 
System x* 
System z* 
System z10* 
Tivoli* 
WebSphere* 
XIV* 
zEnterprise* 
z10 
z10 EC 
z/OS* 
z/VM* 
z/VSE* 
Adobe, the Adobe logo, PostScript, and the PostScript logo are either registered trademarks or trademarks of Adobe Systems Incorporated in the United States, and/or other countries. 
Cell Broadband Engine is a trademark of Sony Computer Entertainment, Inc. in the United States, other countries, or both and is used under license therefrom. 
Intel, Intel logo, Intel Inside, Intel Inside logo, Intel Centrino, Intel Centrino logo, Celeron, Intel Xeon, Intel SpeedStep, Itanium, and Pentium are trademarks or registered trademarks of Intel 
Corporation or its subsidiaries in the United States and other countries. 
IT Infrastructure Library is a registered trademark of the Central Computer and Telecommunications Agency which is now part of the Office of Government Commerce. 
ITIL is a registered trademark, and a registered community trademark of the Office of Government Commerce, and is registered in the U.S. Patent and Trademark Office. 
Java and all Java based trademarks and logos are trademarks or registered trademarks of Oracle and/or its affiliates. 
Linear Tape-Open, LTO, the LTO Logo, Ultrium, and the Ultrium logo are trademarks of HP, IBM Corp. and Quantum in the U.S. and 
Linux is a registered trademark of Linus Torvalds in the United States, other countries, or both. 
Microsoft, Windows, Windows NT, and the Windows logo are trademarks of Microsoft Corporation in the United States, other countries, or both. 
OpenStack is a trademark of OpenStack LLC. The OpenStack trademark policy is available on the OpenStack website. 
TEALEAF is a registered trademark of Tealeaf, an IBM Company. 
Windows Server and the Windows logo are trademarks of the Microsoft group of countries. 
Worklight is a trademark or registered trademark of Worklight, an IBM Company. 
UNIX is a registered trademark of The Open Group in the United States and other countries. 
* Other product and service names might be trademarks of IBM or other companies. 
Notes: 
Performance is in Internal Throughput Rate (ITR) ratio based on measurements and projections using standard IBM benchmarks in a controlled environment. The actual throughput that any user will experience will vary 
depending upon considerations such as the amount of multiprogramming in the user's job stream, the I/O configuration, the storage configuration, and the workload processed. Therefore, no assurance can be given that an 
individual user will achieve throughput improvements equivalent to the performance ratios stated here. 
IBM hardware products are manufactured from new parts, or new and serviceable used parts. Regardless, our warranty terms apply. 
All customer examples cited or described in this presentation are presented as illustrations of the manner in which some customers have used IBM products and the results they may have achieved. Actual environmental 
costs and performance characteristics will vary depending on individual customer configurations and conditions. 
This publication was produced in the United States. IBM may not offer the products, services or features discussed in this document in other countries, and the information may be subject to change without notice. Consult 
your local IBM business contact for information on the product or services available in your area. 
All statements regarding IBM's future direction and intent are subject to change or withdrawal without notice, and represent goals and objectives only. 
Information about non-IBM products is obtained from the manufacturers of those products or their published announcements. IBM has not tested those products and cannot confirm the performance, compatibility, or any other 
claims related to non-IBM products. Questions on the capabilities of non-IBM products should be addressed to the suppliers of those products. 
Prices subject to change without notice. Contact your IBM representative or Business Partner for the most current pricing in your geography. 
This information provides only general descriptions of the types and portions of workloads that are eligible for execution on Specialty Engines (e.g, zIIPs, zAAPs, and IFLs) ("SEs"). IBM authorizes customers to use IBM SE 
only to execute the processing of Eligible Workloads of specific Programs expressly authorized by IBM as specified in the “Authorized Use Table for IBM Machines” provided at 
www.ibm.com/systems/support/machine_warranties/machine_code/aut.html (“AUT”). No other workload processing is authorized for execution on an SE. IBM offers SE at a lower price than General Processors/Central 
Processors because customers are authorized to use SEs only to process certain types and/or amounts of workloads as specified by IBM in the AUT. 
2 © IBM Corporation, 2014
"The postings on this slides are my own and don't necessarily 
represent IBM's positions, strategies or opinions." 
3 © IBM Corporation, 2014
• Apresentado para a Universidade Santa Cecília – UNISANTA no dia 
03/Setembro/2014. Obrigado pela participação dos Alunos do curso 
de Graduação de Sistemas de Informação (1o. a 3o. Ano) e aos alunos 
do 4o. ano do curso de Ciência da Computação. 
• Agradecimentos: 
• A todos os professores da universidade que prestigiaram o evento 
• Professor Guerra - Unisanta 
• Maurício Asenjo - Unisanta 
• Denis Vaz de Lima Galluzzi Baltazar - IBM 
• Leandro Velasco – Otimize3 
• Valdir Zilio – Otimize3 
• André Rodrigues – www.eudmarco.com.br
• Agradecimentos adicionais: 
• João Paulo Cardani – IBM 
• Vilmar Travassos – IBM 
• John Banchy – IBM USA 
• Por terem contribuído com parte do material aqui apresentado
Agenda 
• Histórico – 50 anos de IBM Mainframe 
•Momento atual da indústria de TI 
• System z - Hardware 
• Processador e desempenho 
• Subsistema de I/O 
•Memória
Agenda 
• Histórico – 50 anos de IBM Mainframe 
•Momento atual da indústria de TI 
• System z - Hardware 
• Processador e desempenho 
• Subsistema de I/O 
•Memória
Mainframe 50 anos - A inovação que fez 
história (versão completa)
Mainframe50 – Linha do tempo 
7 de Abril de 1964
Mainframe50 – Linha do tempo
Mainframe50 – Linha do tempo
Mainframe50 – Linha do tempo
Mainframe50 – Linha do tempo
Mainframe50 – Linha do tempo
Mainframe50 – Linha do tempo
Mainframe50 – Linha do tempo
Mainframe50 – Linha do tempo
Agenda 
• Histórico – 50 anos de IBM Mainframe 
•Momento atual da indústria de TI 
• System z - Hardware 
• Processador e desempenho 
• Subsistema de I/O 
•Memória
Eventos Disruptivos 
1900 1950 2011 
Em Janeiro de 2014 – anunciado a divisão IBM Watson
Parceria entre Apple e IBM 
anunciada no dia 15/Julho/2014
Indústria de Tecnologia da Informação – 
buzzwords 
•Cloud 
•Analytics 
•Mobile 
•Social 
•Security
Moore’s Law - Sequential processor 
performance 
“every 18 months... you're going to get twice as many transistors which, you can have for the same amount of dollars” 
fonte: Computer Architecture: A Quantitative Approach Hennessey and Patterson, 5th Edition (2012) 
http://pt.wikipedia.org/wiki/Lei_de_Moore
Growth in clock rate of microprocessors 
fonte: Computer Architecture: A Quantitative Approach Hennessey and Patterson, 5th Edition (2012)
Agenda 
• Histórico – 50 anos de IBM Mainframe 
•Momento atual da indústria de TI 
• System z - Hardware 
• Processador e desempenho 
• Subsistema de I/O 
•Memória
O que é System z? 
• IBM’s premier commercial computing system 
• >50 years of software investment protection 
(por exemplo, compatibilidade binária) 
• Shared everything design 
• Modern applications 
Transaction 
Processing 
Data 
Warehouse 
Databases 
(DB2, Oracle…) 
ERP 
Infrastructure 
Functions 
Web, ESB, 
Portal 
Linux 
Apps SAP
Histórico e Introdução a Plataforma 
Mainframe 
• O termo “Mainframe” se refere ao gabinete principal que alojava a unidade 
central de processamento nos primeiros computadores. 
• O termo é utilizado até hoje por usuários de computadores considerados como 
“de grande porte”, IBM ou não IBM. 
• IBM System z é o nome de um dos servidores da família de servidores da IBM 
Systems and Technology Group (STG). 
• IBM STG é uma unidade de negócio da IBM responsável pelos servidores e discos 
(hardware e storage).
Histórico e Introdução a Plataforma 
Mainframe 
• Se a IBM não criar o software para rodar sistemas de mainframe ela mesma, a 
empresa “ABC” o fará, e certamente existe um mercado muito interessado nesta 
solução e assim acaba o monopólio da IBM em relação ao hardware proprietário, caro 
e de museu
O Sistema dos Sistemas 
A realidade nos dias de hoje... 
Embora a tecnologia tenha feito grandes progressos e 
todas as plataformas tenham evoluído muito, a demanda 
e os requisitos estabelecidos cresceram 
exponencialmente. 
 As cargas de trabalho estão mais diversificadas e 
mais complexas; 
 Um volume de dados sem precedentes; 
 Maior cobrança por desempenho e eficiência; 
 Segurança e continuidade de negócios são essenciais.
O Sistema dos Sistemas A sedução pelo “one size fits all”... 
Os ambientes corporativos são multiplataforma 
e são otimizados para diferentes workloads: 
• Banco de Dados; 
• Processamento Transacional; 
• Business Analytics; 
• Web-based Portals; 
• Enterprise Applications (como ERP); 
• Inúmeras aplicações x86. 
Soluções complexas são otimizadas para o funcionamento em infraestruturas de 
camadas heterogêneas de software e hardware
O Sistema dos Sistemas 
Computação Centralizada (Sistema z/OS) 
Clientes trabalham com servidor a 100% de 
utilização sem degradação de desempenho 
Proteção de investimento 
Nenhuma ocorrência de vírus ou invasão 
externa (O servidor z possui certificação 
EAL5)
Gerações do Servidor IBM System z 
NN--44 
z990 
•Announced 5/2003 
•1.2 GHz 
•Up to 32 assignable cores 
•CP, IFL, ICF, zAAP 
•Up to 256 GB Memory 
z890 
•Announced 4/2004 
•1.0 GHz 
•Up to 4 assignable cores 
•CP, IFL, ICF, zAAP 
•Up to 32 GB Memory 
NN--33 
z9 Enterprise Class 
•Announced 7/2005 
•1.7 GHz 
•Up to 54 assignable cores 
•CP, IFL, ICF, zAAP, zIIP 
•Up to 512 GB Memory 
z9 Business Class 
•Announced 4/2006 
•1.4 GHz 
•Up to 7 assignable cores 
•CP, IFL, ICF, zAAP, zIIP 
•Up to 64 GB Memory 
NN--55 
z900 
•Announced 10/2000 
•770 MHz 
•Up to 16 assignable cores 
•CP, IFL, ICF 
•Up to 64 GB Memory 
z800 
•Announced 2/2002 
•625 MHz 
•Up to 4 assignable cores 
•CP, IFL, ICF 
•Up to 32 GB Memory 
NN--22 
z10 Enterprise Class 
•Announced 2/2008 
•4.4 GHz 
•Up to 64 assignable cores 
•CP, IFL, ICF, zAAP, zIIP 
•Up to 1.5 TB Memory 
z10 Business Class 
•Announced 10/2008 
•3.5 GHz 
•Up to 10 cfg cores (5 CP) 
•CP, IFL, ICF, zAAP, zIIP 
•Up to 248 GB Memory 
NN--11 
zEnterprise 196 
•Announced 7/22/2010 
•5.2 GHz 
•Up to 80 assignable cores 
•CP, IFL, ICF, zAAP, zIIP 
•Up to 3 TB Memory 
zEnterprise 114 
•Announced 7/12/2011 
•3.8 GHz 
•Up to 10 cfg cores (5 CP) 
•CP, IFL, ICF, zAAP, zIIP 
•Up to 256 GB Memory
zEnterprise EC12 
• Over $1 billion in IBM R&D investment 
• zEnterprise EC12 (zEC12) 
• 1 to 101 configurable cores 
• 2 spares, up to 16 standard SAPs 
• High speed 5.5 GHz processors 
• 60 sub-capacity settings up to 20 CPs 
• Up to 3 TB of RAIM memory 
• New Features 
• Transactional memory 
• Flash Express 
• IBM zAware 
• 10 GbE RDMA over converged Ethernet
zEnterprise BC12 
• zEnterprise BC12 (zBC12) – Dois modelos H06 ou H13 
• 1 to 13 configurable cores 
• 2 spares, 2 standard SAPs 
• High speed 4.2 GHz processors 
• Up to 26 capacity settings x 6 CP = 156 settings 
• Up to 496 GB of customer RAIM memory 
• Up to 64 PCIe channel features 
• New Features 
• Transactional memory 
• Flash Express 
• IBM zAware 
• 10 GbE RDMA over converged Ethernet
zEC12 New Build Radiator-based Air cooled – 
Under the covers (Model H89 and HA1) Front 
view 
Overhead 
Power Cables 
(option) 
Internal 
Batteries 
(optional) 
Power 
Supplies 
2 x Support 
Elements 
PCIe I/O 
drawers 
(Maximum 5 
for zEC12) 
Processor Books 
with Flexible 
Support 
Processors 
(FSPs), PCIe and 
HCA I/O fanouts 
PCIe I/O interconnect 
cables and Ethernet 
cables FSP cage 
controller cards 
Radiator with N+1 
pumps, blowers and 
motors 
Overhead I/O 
feature is a co-req 
for overhead power 
option 
Optional FICON 
LX Fiber Quick 
Connect (FQC) 
not shown
zBC12 Model H13 – Under the covers 
Internal 
Batteries 
(optional) 
Power 
Supplies 
2 x CPC Drawers, 
Memory & HCAs 
I/O Drawer 
Ethernet cables for 
internal System LAN 
connecting Flexible 
Service Processor 
(FSP) cage controller 
cards (not shown) 
FQC for 
FICON LX 
only 
PCIe I/O 
drawers 
Rear View Front View 
2 x Support 
Elements
IBM System z – Virtual Tour 
http://ibmtvdemo.edgesuite.net/servers/z/demos/zEnterprise_Radiator_Product_Tour/index. 
html
Agenda 
• Histórico – 50 anos de IBM Mainframe 
•Momento atual da indústria de TI 
• System z - Hardware 
• Processador e desempenho 
• Subsistema de I/O 
•Memória
zEC12 Continues the CMOS Mainframe Heritage Begun 
in 1994 
770 MHz 
1.2 GHz 
1.7 GHz 
4.4 GHz 
5.2 GHz 
5.5 GHz 
5000 
4000 
3000 
2000 
1000 
0 
MHz/GHz 
6000 
2000 
z900 
189 nm SOI 
16 Cores 
Full 64-bit 
z/Architecture 
2003 
z990 
nm SOI 130 
32 Cores 
Superscalar 
Modular SMP 
2005 
z9 EC 
nm SOI 90 
54 Cores 
System level 
scaling 
2012 
zEC12 
nm SOI 32 
101 Cores 
OOO and eDRAM 
cache improvements 
PCIe Flash 
Arch extensions 
for scaling 
2010 
z196 
nm SOI 45 
80 Cores 
OOO core 
eDRAM cache 
RAIM memory 
zBX integration 
2008 
z10 EC 
nm SOI 65 
64 Cores 
High-freq core 
3-level cache
zEnterprise EC12 Book and Frame 
MCM 
EC12 Book 
4-Book EC12 System 
Mem 
Mem
MCM @ 1800W 
Water Cooled 
3 DCA Power Supplies 14 DIMMs 
100mm High 
16 DIMMs 
100mm High 
Rear 
I/O 
Fanout 
Cards 
Cooling 
connector 
MCM 
Memory 
Memory 
Front 
zEC12 Book Layout
zEC12 PU chip, SC chip and MCM 
Front View 
Fanouts 
zEC12 
Hexa-core 
PU CHIP 
L4B L4B 
L4C 
PU 1 
MCM 
BOOK 
Side View 
L3C 0 
L3C 1 
GX 
MCU 
Core0 
Core1 
Core2 
Core3 
Core4 
Core5 
L4Q L4Q 
L4Q L4Q 
PU 2 PU 0 
SC 1 SC 0 
V00 
V01 
PU 3 PU 4 PU 5 
V10 
V11
zEC12 Multi-Chip Module (MCM) 
Packaging 
• 96mm x 96mm MCM 
PU 2 PU 0 
SC 
0 
SC 
1 
PU 1 
V00 
V01 
PU 3 PU 4 PU 5 
V10 
V11 
– 102 Glass Ceramic layers 
– 8 chip sites 
• 7356 LGA connections 
– 27 and 30 way MCMs 
– Maximum power used by MCM is 1800W 
• CMOS 13s chip Technology 
– PU, SC, S chips, 32nm 
– 6 PU chips/MCM – Each up to 6 active cores 
• 23.7 mm x 25.2 mm 
• 2.75 billion transistors/PU chip 
• L1 cache/PU core 
– 64 KB I-cache 
– 96 KB D-cache 
• L2 cache/PU core 
– 1 MB I-cache 
– 1 MB D-cache 
• L3 cache shared by 6 PUs per chip 
– 48 MB 
• 5.5 GHz 
– 2 Storage Control (SC) chip 
• 26.72 mm x 19.67 mm 
• 3.3 billion transistors/SC chip 
• L4 Cache 192 MB per SC chip (384 MB/Book) 
• L4 access to/from other MCMs 
– 4 SEEPROM (S) chips – 1024k each 
• 2 x active and 2 x redundant 
• Product data for MCM, chips and other engineering 
information 
– Clock Functions – distributed across PU and SC chips 
• Master Time-of-Day (TOD) function is on the SC
zEC12 Hexa Core PU Chip Details 
• Up to Six active cores per chip 
– 5.5 GHz 
– L1 cache/ core 
• 64 KB I-cache 
• 96 KB D-cache 
– L2 cache/ core 
–1M+1M Byte hybrid split private L2 
cache 
• Dedicated Co-processors per core 
– Crypto & compression accelerators 
– Includes 16KB cache 
• On chip 48 MB eDRAM L3 Cache 
– Shared by all six cores 
• Interface to SC chip / L4 cache 
– 44 GB/sec to each of 2 SCs (5.5 GHz) 
• I/O Bus Controller (GX) 
– Interface to Host Channel Adapter (HCA) 
• Memory Controller (MC) 
– Interface to controller on memory DIMMs 
– Supports RAIM design 
L3C 0 
L3C 1 
• Chip Area 
– 597 mm2 
– 23.7mm x 25.2mm 
– 10000+ Power pins 
– 1071 signal I/Os 
• 13S 32nm SOI 
Technology 
– 15 layers of metal 
– 7.68 km wire 
• 2.75 Billion Transistors 
GX 
MCU 
Core0 
Core1 
Core2 
Core3 
Core4 
Core5
Cores Can be Configured for Different 
Needs
Arquitetura – Processadores 
Especializados 
System z tem muitos processadores, porém cada um executa o seu papel. 
Sistema Operacional 
e Aplicação – Total de 120 Pus 
(Cores) sendo até 101 
processadores configuráveis 
Processadores Especializados 
CP (IBM System z Central Processor) – zOS, zTPF e zVSE 
. zAAP (IBM System z Application Assist Processor) – Java 
. zIIP (IBM System z Integrated Information Processor) – XML e DB2 Calls 
IFL (IBM System z Integrated Facility for Linux) - Linux 
até +2 processadores “Spare” 
até 16 SAPs - System Assist Processors 
Placas de I/O (FICON/FCP) ou OSA 
Até 320 Processadores RISC 
. Enviar/Receber requisições de I/O 
(Discos e Fitas) 
I/O 
Processadores RISC/Power 
. FICON – z/OS, zVSE e zVM / Linux 
. FCP – zVM e Linux 
É um 
“Datacenter in a Box” 
até 16 CPU’s para Criptografia 
- alta escalabilidade para transações SSL 
Integrated Firmware Processor
Arquitetura – Demais plataformas de hardware 
Microprocessador 
Comparar esse design com 
servidores RISC / Unix ou x86 
Todas as funções de um computador 
emuladas por software 
I/O Device 
Drivers 
Criptografia, etc 
Código de Aplicação 
OS e Gerenciamento 
de Recurso 
* Monotarefa e 
Monousuário 
* Licenciamento de 
Software
Strategies to Increase Performance and 
Throughput 
Faster 
Components 
Avoid 
Waiting 
Eliminate 
Work 
Increase 
Parallelism
Innovative Cache Architecture Avoids 
Waiting on Memory 
IBM EC12 Multi-Chip Module 
> 10 MB / thread 
on-chip cache 
Cache as 
interconnect 
High task 
switching rate 
Low latency 
to shared 
data 
Cache and chips 
on MCM 
384 MB Shared Cache
New Instructions Reduce Software Path 
Length 
Machine 
Number of New 
Instructions Benefit 
EC12 23 Transactional memory, JAVA 
z196 110+ CPU Intensive workloads 
z10 50+ Efficiency of compiled code 
z9 54 Decimal floating point 
Exploited by IBM compilers and middleware
Reduce Software Path Length 
• On-chip encryption and compression accelerators 
• Direct hardware virtualization 
• z/OS shared everything design
Amdahl’s Law: Serialization Limits 
Parallelism 
AAmmddaahhll’’ss LLaaww 
N 
1 
Increased = 
Throughput 
(1 - P) + P P = Proportion of a program 
that can be made parallel 
N = Number of threads 
With an infinite number of threads and 90% parallel code, there 
can only be a 10X increase in throughput
O projeto do servidor zEC12 foi criado para suportar 
workload compartilhados melhor do que servidores x86 
• 101 processadores configuráveis dentro do mesmo servidor 
• Mais cache por core, dentro do chip 
• Cache de nível L4 compartilhado por todos os processadores (entre 
books) 
• Tempo uniforme de acesso à memória
Benchmark – MATERA Systems 
Parceria entre IBM e MATERA apresenta número inédito de transações bancárias - See 
more at: http://www.matera.com/br/2014/06/02/parceria-entre-ibm-e-matera-apresenta-numero- 
inedito-de-transacoes-bancarias/#sthash.yVGr5J3V.dpuf
Fato estatístico: maior servidor, MUITO maior consolidação
Apresentaçao realizada na SHARE 
https://share.confex.com/share/121/webprogram/Session13557.html
Agenda 
• Histórico – 50 anos de IBM Mainframe 
•Momento atual da indústria de TI 
• System z - Hardware 
• Processador e desempenho 
• Subsistema de I/O 
•Memória
System z I/O Subsystem 
LPAR 1 LPAR 2 
I/O Subsystem SSAAPP SSAAPP 
FICON 
Switch 
FICON 
Switch 
CCUU CCUU CCUU 
System Assist Processor 
•Manages path selection 
•Filter intermediate interrupts 
•I/O Priority 
•Dynamic path reconnect 
•Error handling 
Channels 
•Manages physical links 
•Direct memory transfer 
•Error handling 
Control Units 
•Manages interfaces 
•Cache 
•Abstracts devices 
•Dynamic path reconnect 
•Error handling 
Ethernet
System z I/O Subsystem 
• I/O prioritization 
• Off-load I/O cycles 
• Lower software costs 
• Increase sharing 
• Simplify DR 
LPAR 1 LPAR 2 
I/O Subsystem SSAAPP SSAAPP 
FICON 
Switch 
FICON 
Switch 
CCUU CCUU CCUU 
Ethernet
System z Channel Types 
• Disk 
• FICON: Fibre Connection 
• Fibre Channel: Linux Workloads 
• Ethernet 
• Open Systems Adapter 
• Clustering links 
• Short and long distance 
• Logical 
• HiperSockets 
• Clustering links 
LPAR 1 LPAR 2 
I/O Subsystem SSAAPP SSAAPP 
FICON 
Switch 
FICON 
Switch 
CCUU CCUU CCUU 
Ethernet
System z Channel Types – Disk – FICON 
card 
2 Gbps, 4 Gbps or 8 Gbps
Open Systems Adapter 
• Improves reliability 
• Grade 1 component 
• Isolates device driver 
• Improves performance 
Linux z/OS 
• Filters interrupts 
• Allows direct I/O 
virtualization 
• Direct communication 
between LPARs OSA Card 
Device Driver 
Ethernet
Open Systems Adapter 
OSA-Express5S – same base card for 1000BASE-T, GbE and 10 GbE, use different types of SFPs.
Agenda 
• Histórico – 50 anos de IBM Mainframe 
•Momento atual da indústria de TI 
• System z - Hardware 
• Processador e desempenho 
• Subsistema de I/O 
•Memória
RAIM recovers from DRAM, socket, bus or DIMM failures 
• Issues with larger memory 
• Increases in density 
• Cosmic rays 
• Improves availability 
• No performance penalty
Resumo – The Future Runs on System z 
• Mais de 50 anos de proteção de investimento 
• Executa workloads modernos e workloads legados 
• RAS (reliability, availability, and serviceability) 
• MTBF medido em décadas 
• 99,999% de disponibilidade (z/OS clusterizado) 
• Taxa de utilização próximo de 100% 
• Pagamento de software por utilização
Clientes IBM Mainframe 
http://www.ibm.com/mainframe50/enginesofprogress/
Alguns clientes IBM Mainframe no Brasil 
http://www.ibm.com/mainframe50/enginesofprogress/ 
• Banrisul 
• Procempa - https://www.youtube.com/watch?v=wmhERQJg__A 
• Algar Telecom 
• Sicoob 
• Embasa - http://www-03.ibm.com/software/businesscasestudies/us/en/corp?synkey=G669959W92944J86 
• Eletrobrás Termonuclear SA (Eletronuclear) – 
• http://www-03.ibm.com/software/businesscasestudies/us/en/corp?synkey=P894862Z52704C57
Obrigado. Perguntas? 
Anderson Bassani 
IBM Field Technical 
Sales Specialist 
Av Tutóia 1157 
São Paulo, Brasil 
55 11 2132-2826 
55 11 9-7159-5102 
abassani@br.ibm.com
© IBM Corporation, 2014 
Outros tópicos
Agenda 
• Histórico – 50 anos de IBM Mainframe 
•Momento atual da indústria de TI 
• System z - Hardware 
• Processador e desempenho 
• Subsistema de I/O 
•Memória 
• Virtualização 
• Sistemas Operacionais, Linguagens de Programação
System z Hardware Virtualization 
Mainframe 
Operating 
Systems 
Logical Partition 
z/VM 
Logical Partition 
Logical Partition 
Processor Resource / System Manager 
• Dedicated memory 
• Designed for larger LPARs 
• EAL5 security rating 
• Part of System z since 1988 
• Direct hardware virtualization 
• 1 to 60 LPARs 
Coupling 
Facility
z/VM and Linux Virtualization 
Linux z/VM 
• Share memory 
• z/VM under z/VM 
• FICON or FC disk 
Linux Linux Linux 
• Research project CP-40 (1966) 
• 1 to 1000s of guests / VMs 
• Can have multiple z/VM LPARs 
z/VM 
System z Logical Partition 
z/VM 
System z Logical Partition
Sistemas Operacionais, Linguagens de Programação e 
Produtos 
System z zBX 
 System z 
− Assembler (/370 e VTAM) 
− Cobol (ANS, CICS e IMS) 
− PL/I 
− C e C++ 
− CLIST 
− RPG 
− REXX 
− CMS 
− EASYTRIEVE 
− RPF (Roscoe) 
− Natural 
− Shell script 
− Perl 
− Java 
 Power AIX 
− Rational Developer for Power 
Systems 
− Rational PurifyPlus for AIX 
− XL C/C++ for AIX 
− XL C for AIX 
− Cobol for AIX 
− XL Fortran for AIX 
− PL/I for AIX 
 x86 Windows 
− Linguagens suportadas na versão* 
 x86 Linux 
− PHP 
− Perl 
− Ruby 
− Python 
− C/C++ 
− Microfocus Cobol 
− Erlang 
− Java / Java Script 
IBM System zEnterprise 
 IBM Software 
− Information Management 
− Lotus software 
− Rational software 
− Tivoli software 
− WebSphere software 
 Non IBM Software 
− BMC 
− CA 
− Consist 
− EMC 
− SAP 
 Oracle 
 Red Hat 
 SuSE
© IBM Corporation, 2014 
Outras Referências Bibliográficas
IBM System z Redbooks 
http://www.redbooks.ibm.com/portals/systemz
IBM Journal of Research and Development 
Issue 1.2 • Date Jan.-Feb. 2012 
IBM zEnterprise Systems and Technology 
• http://ieeexplore.ieee.org/xpl/to 
cresult.jsp? 
isnumber=6136228&punumber= 
5288520
Cursos Online – sem custo 
• Introduction to Enterprise Computing 
• https://mooc.marist.edu/web/ecc
Cursos Online – sem custo 
• Interskill 
• http://www.interskill.com/demos.html
SHARE – www.share.org 
• Who We Are 
• SHARE Inc. is an independent, volunteer run association providing 
enterprise technology professionals with continuous education and 
training, valuable professional networking and effective industry 
influence. 
• Our Mission 
• SHARE is an independent volunteer-run information technology 
association that provides education, professional networking and 
industry influence.
Hot Chips – www.hotchips.org 
Hot Chips: A Symposium on High Performance Chips 
Sponsored by the IEEE Technical Committee on Microprocessors and 
Microcomputers in Cooperation with ACM
Hot Chips – www.hotchips.org 
HC24-S9: Big Iron 
Início do vídeo no minuto 58 
https://www.youtube.com/watch? 
v=ipirVUart88 
Link para apresentação 
http://www.hotchips.org/wp-content/ 
uploads/hc_archives/hc2 
4/HC24-9-Big-Iron/HC24.29.930- 
zNext-Shum-IBM.pdf 
IBM zNext: the 3rd Generation 
High Frequency Microprocessor 
Chip, Kevin Shum, IBM
Top 500 – www.top500.org 
O projeto TOP500 é um ranking dos 500 supercomputadores mais poderosos do mundo. 
O projeto iniciou-se em 1993 e publica uma lista atualizada a cada seis meses. A primeira atualização de cada ano é 
em junho, coincidindo com a International Supercomputer Conference, e a segunda em novembro na IEEE 
Supercomputer Conference.

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Unisanta - Visão Geral de hardware Servidor IBM System z

  • 1. © IBM Corporation, 2014 System z – Visão Geral Hardware Anderson Bassani IBM STG Brasil – Especialista técnico System z Versão 2.0
  • 2. Trademarks The following are trademarks of the International Business Machines Corporation in the United States and/or other countries. AIX* BladeCenter* CICS* Cognos* DataPower* DB2* DFSMS EASY Tier FICON* GDPS* HiperSockets* HyperSwap IMS InfiniBand* Lotus* * Registered trademarks of IBM Corporation PowerHA* PR/SM PureSystems Rational* RACF* MQSeries* NetView* OMEGAMON* Parallel Sysplex* POWER7* The following are trademarks or registered trademarks of other companies. RMF Smarter Planet* Storwize* System Storage* System x* System z* System z10* Tivoli* WebSphere* XIV* zEnterprise* z10 z10 EC z/OS* z/VM* z/VSE* Adobe, the Adobe logo, PostScript, and the PostScript logo are either registered trademarks or trademarks of Adobe Systems Incorporated in the United States, and/or other countries. Cell Broadband Engine is a trademark of Sony Computer Entertainment, Inc. in the United States, other countries, or both and is used under license therefrom. Intel, Intel logo, Intel Inside, Intel Inside logo, Intel Centrino, Intel Centrino logo, Celeron, Intel Xeon, Intel SpeedStep, Itanium, and Pentium are trademarks or registered trademarks of Intel Corporation or its subsidiaries in the United States and other countries. IT Infrastructure Library is a registered trademark of the Central Computer and Telecommunications Agency which is now part of the Office of Government Commerce. ITIL is a registered trademark, and a registered community trademark of the Office of Government Commerce, and is registered in the U.S. Patent and Trademark Office. Java and all Java based trademarks and logos are trademarks or registered trademarks of Oracle and/or its affiliates. Linear Tape-Open, LTO, the LTO Logo, Ultrium, and the Ultrium logo are trademarks of HP, IBM Corp. and Quantum in the U.S. and Linux is a registered trademark of Linus Torvalds in the United States, other countries, or both. Microsoft, Windows, Windows NT, and the Windows logo are trademarks of Microsoft Corporation in the United States, other countries, or both. OpenStack is a trademark of OpenStack LLC. The OpenStack trademark policy is available on the OpenStack website. TEALEAF is a registered trademark of Tealeaf, an IBM Company. Windows Server and the Windows logo are trademarks of the Microsoft group of countries. Worklight is a trademark or registered trademark of Worklight, an IBM Company. UNIX is a registered trademark of The Open Group in the United States and other countries. * Other product and service names might be trademarks of IBM or other companies. Notes: Performance is in Internal Throughput Rate (ITR) ratio based on measurements and projections using standard IBM benchmarks in a controlled environment. The actual throughput that any user will experience will vary depending upon considerations such as the amount of multiprogramming in the user's job stream, the I/O configuration, the storage configuration, and the workload processed. Therefore, no assurance can be given that an individual user will achieve throughput improvements equivalent to the performance ratios stated here. IBM hardware products are manufactured from new parts, or new and serviceable used parts. Regardless, our warranty terms apply. All customer examples cited or described in this presentation are presented as illustrations of the manner in which some customers have used IBM products and the results they may have achieved. Actual environmental costs and performance characteristics will vary depending on individual customer configurations and conditions. This publication was produced in the United States. IBM may not offer the products, services or features discussed in this document in other countries, and the information may be subject to change without notice. Consult your local IBM business contact for information on the product or services available in your area. All statements regarding IBM's future direction and intent are subject to change or withdrawal without notice, and represent goals and objectives only. Information about non-IBM products is obtained from the manufacturers of those products or their published announcements. IBM has not tested those products and cannot confirm the performance, compatibility, or any other claims related to non-IBM products. Questions on the capabilities of non-IBM products should be addressed to the suppliers of those products. Prices subject to change without notice. Contact your IBM representative or Business Partner for the most current pricing in your geography. This information provides only general descriptions of the types and portions of workloads that are eligible for execution on Specialty Engines (e.g, zIIPs, zAAPs, and IFLs) ("SEs"). IBM authorizes customers to use IBM SE only to execute the processing of Eligible Workloads of specific Programs expressly authorized by IBM as specified in the “Authorized Use Table for IBM Machines” provided at www.ibm.com/systems/support/machine_warranties/machine_code/aut.html (“AUT”). No other workload processing is authorized for execution on an SE. IBM offers SE at a lower price than General Processors/Central Processors because customers are authorized to use SEs only to process certain types and/or amounts of workloads as specified by IBM in the AUT. 2 © IBM Corporation, 2014
  • 3. "The postings on this slides are my own and don't necessarily represent IBM's positions, strategies or opinions." 3 © IBM Corporation, 2014
  • 4. • Apresentado para a Universidade Santa Cecília – UNISANTA no dia 03/Setembro/2014. Obrigado pela participação dos Alunos do curso de Graduação de Sistemas de Informação (1o. a 3o. Ano) e aos alunos do 4o. ano do curso de Ciência da Computação. • Agradecimentos: • A todos os professores da universidade que prestigiaram o evento • Professor Guerra - Unisanta • Maurício Asenjo - Unisanta • Denis Vaz de Lima Galluzzi Baltazar - IBM • Leandro Velasco – Otimize3 • Valdir Zilio – Otimize3 • André Rodrigues – www.eudmarco.com.br
  • 5. • Agradecimentos adicionais: • João Paulo Cardani – IBM • Vilmar Travassos – IBM • John Banchy – IBM USA • Por terem contribuído com parte do material aqui apresentado
  • 6. Agenda • Histórico – 50 anos de IBM Mainframe •Momento atual da indústria de TI • System z - Hardware • Processador e desempenho • Subsistema de I/O •Memória
  • 7. Agenda • Histórico – 50 anos de IBM Mainframe •Momento atual da indústria de TI • System z - Hardware • Processador e desempenho • Subsistema de I/O •Memória
  • 8. Mainframe 50 anos - A inovação que fez história (versão completa)
  • 9. Mainframe50 – Linha do tempo 7 de Abril de 1964
  • 18. Agenda • Histórico – 50 anos de IBM Mainframe •Momento atual da indústria de TI • System z - Hardware • Processador e desempenho • Subsistema de I/O •Memória
  • 19. Eventos Disruptivos 1900 1950 2011 Em Janeiro de 2014 – anunciado a divisão IBM Watson
  • 20. Parceria entre Apple e IBM anunciada no dia 15/Julho/2014
  • 21. Indústria de Tecnologia da Informação – buzzwords •Cloud •Analytics •Mobile •Social •Security
  • 22. Moore’s Law - Sequential processor performance “every 18 months... you're going to get twice as many transistors which, you can have for the same amount of dollars” fonte: Computer Architecture: A Quantitative Approach Hennessey and Patterson, 5th Edition (2012) http://pt.wikipedia.org/wiki/Lei_de_Moore
  • 23. Growth in clock rate of microprocessors fonte: Computer Architecture: A Quantitative Approach Hennessey and Patterson, 5th Edition (2012)
  • 24. Agenda • Histórico – 50 anos de IBM Mainframe •Momento atual da indústria de TI • System z - Hardware • Processador e desempenho • Subsistema de I/O •Memória
  • 25. O que é System z? • IBM’s premier commercial computing system • >50 years of software investment protection (por exemplo, compatibilidade binária) • Shared everything design • Modern applications Transaction Processing Data Warehouse Databases (DB2, Oracle…) ERP Infrastructure Functions Web, ESB, Portal Linux Apps SAP
  • 26. Histórico e Introdução a Plataforma Mainframe • O termo “Mainframe” se refere ao gabinete principal que alojava a unidade central de processamento nos primeiros computadores. • O termo é utilizado até hoje por usuários de computadores considerados como “de grande porte”, IBM ou não IBM. • IBM System z é o nome de um dos servidores da família de servidores da IBM Systems and Technology Group (STG). • IBM STG é uma unidade de negócio da IBM responsável pelos servidores e discos (hardware e storage).
  • 27. Histórico e Introdução a Plataforma Mainframe • Se a IBM não criar o software para rodar sistemas de mainframe ela mesma, a empresa “ABC” o fará, e certamente existe um mercado muito interessado nesta solução e assim acaba o monopólio da IBM em relação ao hardware proprietário, caro e de museu
  • 28. O Sistema dos Sistemas A realidade nos dias de hoje... Embora a tecnologia tenha feito grandes progressos e todas as plataformas tenham evoluído muito, a demanda e os requisitos estabelecidos cresceram exponencialmente.  As cargas de trabalho estão mais diversificadas e mais complexas;  Um volume de dados sem precedentes;  Maior cobrança por desempenho e eficiência;  Segurança e continuidade de negócios são essenciais.
  • 29. O Sistema dos Sistemas A sedução pelo “one size fits all”... Os ambientes corporativos são multiplataforma e são otimizados para diferentes workloads: • Banco de Dados; • Processamento Transacional; • Business Analytics; • Web-based Portals; • Enterprise Applications (como ERP); • Inúmeras aplicações x86. Soluções complexas são otimizadas para o funcionamento em infraestruturas de camadas heterogêneas de software e hardware
  • 30. O Sistema dos Sistemas Computação Centralizada (Sistema z/OS) Clientes trabalham com servidor a 100% de utilização sem degradação de desempenho Proteção de investimento Nenhuma ocorrência de vírus ou invasão externa (O servidor z possui certificação EAL5)
  • 31. Gerações do Servidor IBM System z NN--44 z990 •Announced 5/2003 •1.2 GHz •Up to 32 assignable cores •CP, IFL, ICF, zAAP •Up to 256 GB Memory z890 •Announced 4/2004 •1.0 GHz •Up to 4 assignable cores •CP, IFL, ICF, zAAP •Up to 32 GB Memory NN--33 z9 Enterprise Class •Announced 7/2005 •1.7 GHz •Up to 54 assignable cores •CP, IFL, ICF, zAAP, zIIP •Up to 512 GB Memory z9 Business Class •Announced 4/2006 •1.4 GHz •Up to 7 assignable cores •CP, IFL, ICF, zAAP, zIIP •Up to 64 GB Memory NN--55 z900 •Announced 10/2000 •770 MHz •Up to 16 assignable cores •CP, IFL, ICF •Up to 64 GB Memory z800 •Announced 2/2002 •625 MHz •Up to 4 assignable cores •CP, IFL, ICF •Up to 32 GB Memory NN--22 z10 Enterprise Class •Announced 2/2008 •4.4 GHz •Up to 64 assignable cores •CP, IFL, ICF, zAAP, zIIP •Up to 1.5 TB Memory z10 Business Class •Announced 10/2008 •3.5 GHz •Up to 10 cfg cores (5 CP) •CP, IFL, ICF, zAAP, zIIP •Up to 248 GB Memory NN--11 zEnterprise 196 •Announced 7/22/2010 •5.2 GHz •Up to 80 assignable cores •CP, IFL, ICF, zAAP, zIIP •Up to 3 TB Memory zEnterprise 114 •Announced 7/12/2011 •3.8 GHz •Up to 10 cfg cores (5 CP) •CP, IFL, ICF, zAAP, zIIP •Up to 256 GB Memory
  • 32. zEnterprise EC12 • Over $1 billion in IBM R&D investment • zEnterprise EC12 (zEC12) • 1 to 101 configurable cores • 2 spares, up to 16 standard SAPs • High speed 5.5 GHz processors • 60 sub-capacity settings up to 20 CPs • Up to 3 TB of RAIM memory • New Features • Transactional memory • Flash Express • IBM zAware • 10 GbE RDMA over converged Ethernet
  • 33. zEnterprise BC12 • zEnterprise BC12 (zBC12) – Dois modelos H06 ou H13 • 1 to 13 configurable cores • 2 spares, 2 standard SAPs • High speed 4.2 GHz processors • Up to 26 capacity settings x 6 CP = 156 settings • Up to 496 GB of customer RAIM memory • Up to 64 PCIe channel features • New Features • Transactional memory • Flash Express • IBM zAware • 10 GbE RDMA over converged Ethernet
  • 34. zEC12 New Build Radiator-based Air cooled – Under the covers (Model H89 and HA1) Front view Overhead Power Cables (option) Internal Batteries (optional) Power Supplies 2 x Support Elements PCIe I/O drawers (Maximum 5 for zEC12) Processor Books with Flexible Support Processors (FSPs), PCIe and HCA I/O fanouts PCIe I/O interconnect cables and Ethernet cables FSP cage controller cards Radiator with N+1 pumps, blowers and motors Overhead I/O feature is a co-req for overhead power option Optional FICON LX Fiber Quick Connect (FQC) not shown
  • 35. zBC12 Model H13 – Under the covers Internal Batteries (optional) Power Supplies 2 x CPC Drawers, Memory & HCAs I/O Drawer Ethernet cables for internal System LAN connecting Flexible Service Processor (FSP) cage controller cards (not shown) FQC for FICON LX only PCIe I/O drawers Rear View Front View 2 x Support Elements
  • 36. IBM System z – Virtual Tour http://ibmtvdemo.edgesuite.net/servers/z/demos/zEnterprise_Radiator_Product_Tour/index. html
  • 37. Agenda • Histórico – 50 anos de IBM Mainframe •Momento atual da indústria de TI • System z - Hardware • Processador e desempenho • Subsistema de I/O •Memória
  • 38. zEC12 Continues the CMOS Mainframe Heritage Begun in 1994 770 MHz 1.2 GHz 1.7 GHz 4.4 GHz 5.2 GHz 5.5 GHz 5000 4000 3000 2000 1000 0 MHz/GHz 6000 2000 z900 189 nm SOI 16 Cores Full 64-bit z/Architecture 2003 z990 nm SOI 130 32 Cores Superscalar Modular SMP 2005 z9 EC nm SOI 90 54 Cores System level scaling 2012 zEC12 nm SOI 32 101 Cores OOO and eDRAM cache improvements PCIe Flash Arch extensions for scaling 2010 z196 nm SOI 45 80 Cores OOO core eDRAM cache RAIM memory zBX integration 2008 z10 EC nm SOI 65 64 Cores High-freq core 3-level cache
  • 39. zEnterprise EC12 Book and Frame MCM EC12 Book 4-Book EC12 System Mem Mem
  • 40. MCM @ 1800W Water Cooled 3 DCA Power Supplies 14 DIMMs 100mm High 16 DIMMs 100mm High Rear I/O Fanout Cards Cooling connector MCM Memory Memory Front zEC12 Book Layout
  • 41. zEC12 PU chip, SC chip and MCM Front View Fanouts zEC12 Hexa-core PU CHIP L4B L4B L4C PU 1 MCM BOOK Side View L3C 0 L3C 1 GX MCU Core0 Core1 Core2 Core3 Core4 Core5 L4Q L4Q L4Q L4Q PU 2 PU 0 SC 1 SC 0 V00 V01 PU 3 PU 4 PU 5 V10 V11
  • 42. zEC12 Multi-Chip Module (MCM) Packaging • 96mm x 96mm MCM PU 2 PU 0 SC 0 SC 1 PU 1 V00 V01 PU 3 PU 4 PU 5 V10 V11 – 102 Glass Ceramic layers – 8 chip sites • 7356 LGA connections – 27 and 30 way MCMs – Maximum power used by MCM is 1800W • CMOS 13s chip Technology – PU, SC, S chips, 32nm – 6 PU chips/MCM – Each up to 6 active cores • 23.7 mm x 25.2 mm • 2.75 billion transistors/PU chip • L1 cache/PU core – 64 KB I-cache – 96 KB D-cache • L2 cache/PU core – 1 MB I-cache – 1 MB D-cache • L3 cache shared by 6 PUs per chip – 48 MB • 5.5 GHz – 2 Storage Control (SC) chip • 26.72 mm x 19.67 mm • 3.3 billion transistors/SC chip • L4 Cache 192 MB per SC chip (384 MB/Book) • L4 access to/from other MCMs – 4 SEEPROM (S) chips – 1024k each • 2 x active and 2 x redundant • Product data for MCM, chips and other engineering information – Clock Functions – distributed across PU and SC chips • Master Time-of-Day (TOD) function is on the SC
  • 43. zEC12 Hexa Core PU Chip Details • Up to Six active cores per chip – 5.5 GHz – L1 cache/ core • 64 KB I-cache • 96 KB D-cache – L2 cache/ core –1M+1M Byte hybrid split private L2 cache • Dedicated Co-processors per core – Crypto & compression accelerators – Includes 16KB cache • On chip 48 MB eDRAM L3 Cache – Shared by all six cores • Interface to SC chip / L4 cache – 44 GB/sec to each of 2 SCs (5.5 GHz) • I/O Bus Controller (GX) – Interface to Host Channel Adapter (HCA) • Memory Controller (MC) – Interface to controller on memory DIMMs – Supports RAIM design L3C 0 L3C 1 • Chip Area – 597 mm2 – 23.7mm x 25.2mm – 10000+ Power pins – 1071 signal I/Os • 13S 32nm SOI Technology – 15 layers of metal – 7.68 km wire • 2.75 Billion Transistors GX MCU Core0 Core1 Core2 Core3 Core4 Core5
  • 44. Cores Can be Configured for Different Needs
  • 45. Arquitetura – Processadores Especializados System z tem muitos processadores, porém cada um executa o seu papel. Sistema Operacional e Aplicação – Total de 120 Pus (Cores) sendo até 101 processadores configuráveis Processadores Especializados CP (IBM System z Central Processor) – zOS, zTPF e zVSE . zAAP (IBM System z Application Assist Processor) – Java . zIIP (IBM System z Integrated Information Processor) – XML e DB2 Calls IFL (IBM System z Integrated Facility for Linux) - Linux até +2 processadores “Spare” até 16 SAPs - System Assist Processors Placas de I/O (FICON/FCP) ou OSA Até 320 Processadores RISC . Enviar/Receber requisições de I/O (Discos e Fitas) I/O Processadores RISC/Power . FICON – z/OS, zVSE e zVM / Linux . FCP – zVM e Linux É um “Datacenter in a Box” até 16 CPU’s para Criptografia - alta escalabilidade para transações SSL Integrated Firmware Processor
  • 46. Arquitetura – Demais plataformas de hardware Microprocessador Comparar esse design com servidores RISC / Unix ou x86 Todas as funções de um computador emuladas por software I/O Device Drivers Criptografia, etc Código de Aplicação OS e Gerenciamento de Recurso * Monotarefa e Monousuário * Licenciamento de Software
  • 47. Strategies to Increase Performance and Throughput Faster Components Avoid Waiting Eliminate Work Increase Parallelism
  • 48. Innovative Cache Architecture Avoids Waiting on Memory IBM EC12 Multi-Chip Module > 10 MB / thread on-chip cache Cache as interconnect High task switching rate Low latency to shared data Cache and chips on MCM 384 MB Shared Cache
  • 49. New Instructions Reduce Software Path Length Machine Number of New Instructions Benefit EC12 23 Transactional memory, JAVA z196 110+ CPU Intensive workloads z10 50+ Efficiency of compiled code z9 54 Decimal floating point Exploited by IBM compilers and middleware
  • 50. Reduce Software Path Length • On-chip encryption and compression accelerators • Direct hardware virtualization • z/OS shared everything design
  • 51. Amdahl’s Law: Serialization Limits Parallelism AAmmddaahhll’’ss LLaaww N 1 Increased = Throughput (1 - P) + P P = Proportion of a program that can be made parallel N = Number of threads With an infinite number of threads and 90% parallel code, there can only be a 10X increase in throughput
  • 52. O projeto do servidor zEC12 foi criado para suportar workload compartilhados melhor do que servidores x86 • 101 processadores configuráveis dentro do mesmo servidor • Mais cache por core, dentro do chip • Cache de nível L4 compartilhado por todos os processadores (entre books) • Tempo uniforme de acesso à memória
  • 53. Benchmark – MATERA Systems Parceria entre IBM e MATERA apresenta número inédito de transações bancárias - See more at: http://www.matera.com/br/2014/06/02/parceria-entre-ibm-e-matera-apresenta-numero- inedito-de-transacoes-bancarias/#sthash.yVGr5J3V.dpuf
  • 54. Fato estatístico: maior servidor, MUITO maior consolidação
  • 55. Apresentaçao realizada na SHARE https://share.confex.com/share/121/webprogram/Session13557.html
  • 56. Agenda • Histórico – 50 anos de IBM Mainframe •Momento atual da indústria de TI • System z - Hardware • Processador e desempenho • Subsistema de I/O •Memória
  • 57. System z I/O Subsystem LPAR 1 LPAR 2 I/O Subsystem SSAAPP SSAAPP FICON Switch FICON Switch CCUU CCUU CCUU System Assist Processor •Manages path selection •Filter intermediate interrupts •I/O Priority •Dynamic path reconnect •Error handling Channels •Manages physical links •Direct memory transfer •Error handling Control Units •Manages interfaces •Cache •Abstracts devices •Dynamic path reconnect •Error handling Ethernet
  • 58. System z I/O Subsystem • I/O prioritization • Off-load I/O cycles • Lower software costs • Increase sharing • Simplify DR LPAR 1 LPAR 2 I/O Subsystem SSAAPP SSAAPP FICON Switch FICON Switch CCUU CCUU CCUU Ethernet
  • 59. System z Channel Types • Disk • FICON: Fibre Connection • Fibre Channel: Linux Workloads • Ethernet • Open Systems Adapter • Clustering links • Short and long distance • Logical • HiperSockets • Clustering links LPAR 1 LPAR 2 I/O Subsystem SSAAPP SSAAPP FICON Switch FICON Switch CCUU CCUU CCUU Ethernet
  • 60. System z Channel Types – Disk – FICON card 2 Gbps, 4 Gbps or 8 Gbps
  • 61. Open Systems Adapter • Improves reliability • Grade 1 component • Isolates device driver • Improves performance Linux z/OS • Filters interrupts • Allows direct I/O virtualization • Direct communication between LPARs OSA Card Device Driver Ethernet
  • 62. Open Systems Adapter OSA-Express5S – same base card for 1000BASE-T, GbE and 10 GbE, use different types of SFPs.
  • 63. Agenda • Histórico – 50 anos de IBM Mainframe •Momento atual da indústria de TI • System z - Hardware • Processador e desempenho • Subsistema de I/O •Memória
  • 64. RAIM recovers from DRAM, socket, bus or DIMM failures • Issues with larger memory • Increases in density • Cosmic rays • Improves availability • No performance penalty
  • 65. Resumo – The Future Runs on System z • Mais de 50 anos de proteção de investimento • Executa workloads modernos e workloads legados • RAS (reliability, availability, and serviceability) • MTBF medido em décadas • 99,999% de disponibilidade (z/OS clusterizado) • Taxa de utilização próximo de 100% • Pagamento de software por utilização
  • 66. Clientes IBM Mainframe http://www.ibm.com/mainframe50/enginesofprogress/
  • 67. Alguns clientes IBM Mainframe no Brasil http://www.ibm.com/mainframe50/enginesofprogress/ • Banrisul • Procempa - https://www.youtube.com/watch?v=wmhERQJg__A • Algar Telecom • Sicoob • Embasa - http://www-03.ibm.com/software/businesscasestudies/us/en/corp?synkey=G669959W92944J86 • Eletrobrás Termonuclear SA (Eletronuclear) – • http://www-03.ibm.com/software/businesscasestudies/us/en/corp?synkey=P894862Z52704C57
  • 68. Obrigado. Perguntas? Anderson Bassani IBM Field Technical Sales Specialist Av Tutóia 1157 São Paulo, Brasil 55 11 2132-2826 55 11 9-7159-5102 abassani@br.ibm.com
  • 69. © IBM Corporation, 2014 Outros tópicos
  • 70. Agenda • Histórico – 50 anos de IBM Mainframe •Momento atual da indústria de TI • System z - Hardware • Processador e desempenho • Subsistema de I/O •Memória • Virtualização • Sistemas Operacionais, Linguagens de Programação
  • 71. System z Hardware Virtualization Mainframe Operating Systems Logical Partition z/VM Logical Partition Logical Partition Processor Resource / System Manager • Dedicated memory • Designed for larger LPARs • EAL5 security rating • Part of System z since 1988 • Direct hardware virtualization • 1 to 60 LPARs Coupling Facility
  • 72. z/VM and Linux Virtualization Linux z/VM • Share memory • z/VM under z/VM • FICON or FC disk Linux Linux Linux • Research project CP-40 (1966) • 1 to 1000s of guests / VMs • Can have multiple z/VM LPARs z/VM System z Logical Partition z/VM System z Logical Partition
  • 73. Sistemas Operacionais, Linguagens de Programação e Produtos System z zBX  System z − Assembler (/370 e VTAM) − Cobol (ANS, CICS e IMS) − PL/I − C e C++ − CLIST − RPG − REXX − CMS − EASYTRIEVE − RPF (Roscoe) − Natural − Shell script − Perl − Java  Power AIX − Rational Developer for Power Systems − Rational PurifyPlus for AIX − XL C/C++ for AIX − XL C for AIX − Cobol for AIX − XL Fortran for AIX − PL/I for AIX  x86 Windows − Linguagens suportadas na versão*  x86 Linux − PHP − Perl − Ruby − Python − C/C++ − Microfocus Cobol − Erlang − Java / Java Script IBM System zEnterprise  IBM Software − Information Management − Lotus software − Rational software − Tivoli software − WebSphere software  Non IBM Software − BMC − CA − Consist − EMC − SAP  Oracle  Red Hat  SuSE
  • 74. © IBM Corporation, 2014 Outras Referências Bibliográficas
  • 75. IBM System z Redbooks http://www.redbooks.ibm.com/portals/systemz
  • 76. IBM Journal of Research and Development Issue 1.2 • Date Jan.-Feb. 2012 IBM zEnterprise Systems and Technology • http://ieeexplore.ieee.org/xpl/to cresult.jsp? isnumber=6136228&punumber= 5288520
  • 77. Cursos Online – sem custo • Introduction to Enterprise Computing • https://mooc.marist.edu/web/ecc
  • 78. Cursos Online – sem custo • Interskill • http://www.interskill.com/demos.html
  • 79. SHARE – www.share.org • Who We Are • SHARE Inc. is an independent, volunteer run association providing enterprise technology professionals with continuous education and training, valuable professional networking and effective industry influence. • Our Mission • SHARE is an independent volunteer-run information technology association that provides education, professional networking and industry influence.
  • 80. Hot Chips – www.hotchips.org Hot Chips: A Symposium on High Performance Chips Sponsored by the IEEE Technical Committee on Microprocessors and Microcomputers in Cooperation with ACM
  • 81. Hot Chips – www.hotchips.org HC24-S9: Big Iron Início do vídeo no minuto 58 https://www.youtube.com/watch? v=ipirVUart88 Link para apresentação http://www.hotchips.org/wp-content/ uploads/hc_archives/hc2 4/HC24-9-Big-Iron/HC24.29.930- zNext-Shum-IBM.pdf IBM zNext: the 3rd Generation High Frequency Microprocessor Chip, Kevin Shum, IBM
  • 82. Top 500 – www.top500.org O projeto TOP500 é um ranking dos 500 supercomputadores mais poderosos do mundo. O projeto iniciou-se em 1993 e publica uma lista atualizada a cada seis meses. A primeira atualização de cada ano é em junho, coincidindo com a International Supercomputer Conference, e a segunda em novembro na IEEE Supercomputer Conference.

Notes de l'éditeur

  1. Em 2014, no dia 8 de abril, comemoramos 50 anos do primeiro mainframe, o System 360. Aposta de USD 5 bi em 1964.
  2. Mudança de paradigma. Sistemas cognitivos não devem substituir (pelo menos num futuro breve) os atuais sistemas programáveis que conhecemos. Sistemas cognitivos, termo IBM, representados pela nova divisão denominada IBM Watson, representa essa nova era. Sistema capaz de interpretrar a fala humana, aprender através da análise de textos em inglês, e indicar respostas com um percentual de confiança. # # # # # # # # # # # # #
  3. O que essa parceria histórica significa? Falando apenas de servidores, também foi anunciado a venda da divisão de servidores x86 para a Lenovo.
  4. Essa é a primeira de algumas leis da computação que apresentarei durante essa 1 hora. Esse é um gráfico retirado da literatura mostrando o efeito da chamada Lei de Moore, não do ponto de vista de transistors , mas da capacidade de processamento sequencial.
  5. Já que vamos falar de servidores hoje… Gráfico mostrando apenas um dos aspectos técnicos do principal component de qualquer computador que é o processador. Acima o gráfico ao longo do tempo versus o clock em MHz para várias famílias de processadores
  6. Computação comercial versus computação científica
  7. Diferença entre o termo Mainframe e System z (IBM). Antigos fabricantes até a década de 70: Burroughs, UNIVAC, NCR, Control Data, Honeywell, General Electric and RCA.
  8. Traditional multithreading: locks and serialization Transactional memory is an approach to parallel programming that has the potential to make efficient parallel programming a great deal easier than it is currently. Parallel programming is easy when a task can be broken up into many independent threads that don't share any data; each part can run on a processor core, and no coordination between cores is necessary. Things get more difficult when the different parts of the task aren't completely independent—for example, if different threads need to update a single value that they share. The traditional solution is to use locks. Every time a thread needs to alter the shared value, it acquires the lock. No other thread can acquire the lock while one thread holds it; they just have to wait. The thread with the lock can then modify the shared value (which may require a complex computation, and hence can take a long time), and then release the lock. The release of the lock in turn allows the waiting threads to continue. This system works, but it has a number of problems in practice. If updates to the shared value occur only infrequently—and hence, it's rare for a thread to ever have to wait—the lock-based system can be very efficient. However, that efficiency tends to rapidly diminish whenever updates to the shared value are frequent: threads spend a lot of their time waiting for the lock to become available, and can't do any useful work while they're waiting. Locks also prove quite difficult for programmers to use correctly. Though the case of a single shared value is easy to handle, real programs are rarely so simple. A program with two locks, A and B, is susceptible to a problem called deadlock. If two threads need both locks, they have a choice; they can either acquire lock A followed by lock B, or they can acquire lock B followed by lock A. As long as every thread acquires the locks in the same order, there's no problem. However, if one thread acquires lock A first, and the other acquires lock B first, then the two threads can get stuck—the first waits for lock B to become free, the second waits for lock A to become free, and neither can ever succeed. This is a deadlock. This problem might seem easy to avoid, and indeed when a program only has two locks, it normally is—but it becomes harder to ensure that every part of the program does the right thing as the program becomes more complex. Add more locks, for other bits of shared data, and it becomes harder still. Transactional memory: the end of locks Transactional memory is designed to solve this kind of problem. With transactional memory, developers mark the portions of their programs that modify the shared data as being "atomic." Each atomic block is executed within a transaction: either the whole block executes, or none of it does. Within the atomic block, the program can read the shared value without locking it, perform all the computations it needs to perform, and then write the value back. At the end, it commits the transaction. The clever part happens with the commit operation: the transactional memory system checks to see if the shared data has been modified since the atomic operation was started. If it hasn't, the commit just makes the update and the thread can carry on with its work. If the shared value has changed, the transaction is aborted, and the work the thread did is rolled back. Typically when this happens, the program will simply retry the operation. Transactional memory potentially offers a number of advantages over the lock-based scheme. First, it's optimistic: instead of each thread needing to acquire a lock just in case another thread tries to perform a concurrent operation, the threads assume that they'll succeed. It's only in the case of actual concurrent modifications that one thread will be forced to retry its work. Second, there's no deadlock scenario, since there are no locks. Third, the programming model is, broadly speaking, one that developers are quite familiar with; the notion of transactions and roll-back is familiar to most developers who've used relational databases, as they offer a somewhat similar set of features. Fourth, atomic blocks arguably make it a lot easier to construct large, correct programs: an atomic block with nested atomic blocks will do the right thing, but the same isn't necessarily true of lock-based programs.
  9. Central Processor zSeries Application Assist Processor zSeries Integrated Information Processor Integrated Facility for Linux Coupling Facility System Assist Processor
  10. Device Driver – ele vive dentro do cartão o que normalmente vive dentro do Sistema operacional. Taxa de falha