1. APURVA INGLE
aai140230@utdallas.edu | +1-469-831-3918 | LinkedIn URL: www.linkedin.com/in/apurvaingle
Education
MS in Electrical Engineering, GPA: 3.26/4 - The University of Texas at Dallas
Richardson, TX, US Expected: May 2016
B.E in Electrical Engineering, GPA: 8.03/10 – RTM Nagpur University, India August 2010 - May 2014
Relevant Coursework
Power Management Integrated Circuits, Analog IC design, Power Electronics, Adjustable Speed Motor Drives, Renewable Energy Systems
and Distributed Power Generation System, Electrification of Transportation, DSP, Advanced Digital Logic, Linear Systems.
Skills
 Tools/Applications : MATLAB, Cadence- ADE/ADS, PLC, SCADA, Xilinx, Spectre, PLECS, Electrical CAD
 Knowledge :Analog Circuit design/testing, design of power electronics devices, electric machines design
 Programming Languages : C, C++, Python, Verilog
 Operating Systems : Windows XP/2000/Vista/7/8, Linux, Mac OS X
Certification
Professional modeling and simulation of power electronics using PLECS Spring 2015
Experience
Intern- PLC Programmer at Government Polytechnic, India Dec 2013 - Jan 2014
 Developed ladder logic programs on PLC (Allen Bradley) for automatic bottle filling and baggage carousel
 Generated the picture view using SCADA (Wonderware) to monitor the process flow
Low Drop-Out (LDO) Regulator Design: Fall 2015
 Designed a regulator with a drop-out voltage of 0.2 V and a loop gain of 50 dB using CMOS 0.35µm technology
 A two stage differential amplifier was used to design the error amplifier, which also had buffer at its output for stability
 The Effective Series Resistance (ESR) was the output capacitor was tuned to obtain a phase margin of 89º. The feedback loop power
transistor were tuned as well to maintain the drop-out voltage at 0.2V over the load range of 12Ω to 156Ω
 Stability and transient analysis were performed using Cadence-ADE and Spectre to keep the undershoots and overshoots below 100mV
for a quiescent current of 40µA.
Design of operational amplifier Summer 2015
 Designed and simulated single stage folded cascode amplifier using 0.35 μm CMOS technology. The design used current mirrors to
provide the gate voltage for the transistors
 Cadence IC design tools like Analog design Environment (ADE), Spectre, and Virtuoso-Schematic Editor were used to optimize and
measure various parameters
 The designed achieved a gain of 85 dB, while consuming a minimalistic 0.3mW of power. The slew rate was maintained at 11 V/μs;
CMRR at 135 dB and the quiescent current of 167 μA was consumed
Simulation of photovoltaic (PV) cell derived from IEEE paper Spring 2015
 Using MATLAB programming, the circuit of a PV cell derived from the IEEE paper- ‘Study on characteristics of PV cells’ was
designed.
 Temperature of the PV array was kept constant and irradiance was varied and vice-versa. Current, Voltage and Power were observed
and compared.
 The maximum power point tracking (MPPT) was implemented using perturb and observe technique in order to achieve greater power at
less voltage and in less time.
Simulation of VBR induction machine model Spring 2015
 In the VBR model developed in the project, the stator is represented as three phase controlled voltage sources behind constant and
decoupled R-L branches which are part of external circuit and hence form a direct interface.
 The ‘qd’ reference frame circuit is developed to compare with the VBR model.
 Stator current, rotor speed and electromagnetic torques are compared in both cases.
Traffic signal control using PLC and SCADA B.E 2013-2014
 Programmable Logic Controller (Allen Bradley- Micrologix 1400) was used to vary the timers of each traffic lane according to the
vehicles detected by position sensors on the roads.
 The ladder logic works in such a way that it gives first preference to the lane with maximum number of vehicles by switching the green
light for that lane for a longer time.
 SCADA (Wonderware) is used to represent this project in picture.
Paper Presentations:
Term Paper on Marine Propulsion System Fall 2015
 All the required parameters to drive a ship on water such as the thrust, power, different voltage levels were studied in details.
 Types of machines installed, material used to build the ship are discussed.
 Detailed study on ships like Disney Dream, Auriga Leader, and Acergy Viking was done in this paper.
Paper on 500 KV HVDC Terminal Station located at Chandrapur, Maharashtra Spring 2013
 Detailed study of transmission of electricity based of HVDC technology.
 Major devices like thyristor valves, rectifiers and inverters, their characteristics and placements in the plant were discussed in depth.
Academic Projects