Webinar Gravado: Microprocessadores STM32MP1: Conhecendo a flexibilidade entre performance e tempo real

STM32MP1
Flexibility and Real Time

Agenda 3
Time
Presentation
STM32MP1 Introduction
A7 & M4 real-time co-processing Architecture
STM32MP1 Ecosystem
STM32MP1 Wiki

Launching in 2020
Launched in 2019
Ultra-low-power MCUs
Mainstream MCUs
Cortex®-M0
Cortex®-M0+
Cortex®-M3 Cortex®-M4 Cortex®-M7
High-performance MCUs
Wireless MCUs
Cortex®-M33
MPUs
STM32 portfolio positioning
Keep releasing your growing creativity → > 1600 Part Numbers
More than
60,000 customers
Note : Cortex-M0+ Radio Co-processor
Multi Core MPU
Dual Core Cortex®-A7
& Cortex®-M4
Dual Core MCU
Cortex®-M7
& Cortex®-M4

What Happens when STM32 meets Linux? 6
Linux
=+

The STM32MP1 Microprocessor Happens! 7
Available
NOW!

STM32MP1: A General Purpose MPU
Suitable for all Developer Types and Multiple Applications
8
MPU
MPU
+
Pure MPU users
Mixed MCU
and MPU users
MCU users
new to MPU
Developer profile Possible applications
Industrial
Health & Wellness
Consumer
Home
MCU
MCU MPU➔

STM32MP1
Flexible architecture
for a wide range of applications

Rich Feature Set 10
Advanced & Flexible Architecture with 3D GPU
Memory
Interface
Memory
DDR3
DDR3L
LPDDR2
LPDDR3
SLC NAND
SPI NAND
NOR Quad-SPI
eMMC
SD card
Cortex-A7 Cortex-M4
Flexible mapping of
resources and
peripherals between
arm Cortex-A and
Cortex-M cores
Connectivity
Sigma Delta Demod.
SAI / I²S
SPDIF
CAN FD
SPI
Ethernet
USB
U(S)ART
I²C
Analog I/F
16-bit ADCs
12-bit DACs
Display 3D
GPU
Display Interface
STM32MP157
STM32MP153
STM32MP151

Hardware details – Processing cores 11
System
STM32MP157
3D GPU OpenGL ES2.0 @ 533MHz
26Mtri/sec, 133Mpix/sec
Security
3x Tamper Pins with 1 active
Tº, V and 32KHz detection
SHA-256, MD5, HMAC
Dual Cortex-A7 @ 650MHz
Core 1 @ 650MHz
L1 32KB I / 32KB D
NEON SIMD
256KB L2 cache
Core 2 @ 650MHz
L1 32KB I / 32KB D
NEON SIMD
Cortex-M4 @ 209MHz
MPUFPU
Connectivity
Control
10x 16-bit timer
2x 16-bit motor control PWM synchronized AC timer
5x 16-bit LP timer
DDR3/DDR3L 32-bit @ 533MHz
LPDDR2/LPDDR3 32-bit @ 533MHz
2x 32-bit timer
24-bit Parallel RGB Display MIPI DSI 2 lanes @ 1Gbps
Camera Interface HDMI CEC
1Gbps Ethernet
USB2.0 OTG FS/HS2x USB2.0 Host HS
DFSDM 8 channels / 6 filtersMDIO
6x I²C
4x SAI
4x UART, 4x USART
6x SPI / 3x I²S
Dual Quad SPISPDIF Tx / Rx 4 inputs
16-bit SLC NAND, 8-bit-ECC3x SDIO3.0 / SD3 / eMMC 4.51
Secure ROM and RAMs
Secure Peripherals
Secure RTC
Analog true RNG
Up to 176 GPIOs
Watchdogs (2x I & W)
Reset and Clock
MDMA + 2x DMA
Crystal & Internal oscillators
2x FDCAN / TTCAN
DES, TDES, AES-256
TrustZone
System RAM 256KB MCU System RAM 384KB
Retention RAM 64KB Backup RAM 4KB
Boot ROM 128KB OTP Fuse 3Kb
Analog
2x 16-bit ADC 3MSPS 22 channels
2x 12-bit DAC
Temperature sensor
96-bit unique ID
5x LDOs
Up to 2080 Coremark per core
@650 MHz (BareMetal - No OS)
32K data cache per core
32K instruction cache per core
256K L2 unified cache
Performance
Ease of use of C programming
Ultra-low power
Up to 703 Coremark @209 MHz
• 3D GPU: Vivante®
• OpenGL® ES 2.0
• 533 MHz, up to 26 Mtriangle/s
• 133 Mpixel/sMCU processor
GPU

Hardware details – Memory 13
System
STM32MP157
Security
SHA-256, MD5, HMAC
Core 1 @ 650MHz
L1 32KB I / 32KB D
NEON SIMD
256KB L2 cache
Core 2 @ 650MHz
L1 32KB I / 32KB D
NEON SIMD
Cortex-M4 @ 209MHz
MPUFPU
Connectivity
Control
10x 16-bit timer
5x 16-bit LP timer
2x 32-bit timer
1Gbps Ethernet
6x I²C
4x SAI
4x UART, 4x USART
6x SPI / 3x I²S
Secure ROM and RAMs
Secure Peripherals
Secure RTC
Analog true RNG
Up to 176 GPIOs
Reset and Clock
MDMA + 2x DMA
2x FDCAN / TTCAN
DES, TDES, AES-256
TrustZone
Analog
2x 12-bit DAC
Temperature sensor
96-bit unique ID
5x LDOs
• DDR3, DDR3L, LPDDR2, LPDDR3 (up to 1GB, x16 or x32)
• Supports SD default-speed (< 25 MHz), high-speed (up to 50 MHz), UHS-I singe data rate (up to 204 MHz)
• Supports eMMC legacy compatible (< 26 MHz), high-speed (up to 200 MHz)
• 4-bit or 8-bit data bus on QuadSPI interface
Application benefits
Memory retention in
low power mode
Backup RAM

Hardware details – Connectivity 15
System
STM32MP157
Security
SHA-256, MD5, HMAC
Core 1 @ 650MHz
L1 32KB I / 32KB D
NEON SIMD
256KB L2 cache
Core 2 @ 650MHz
L1 32KB I / 32KB D
NEON SIMD
Cortex-M4 @ 209MHz
MPUFPU
Connectivity
Control
10x 16-bit timer
5x 16-bit LP timer
2x 32-bit timer
1Gbps Ethernet
6x I²C
4x SAI
4x UART, 4x USART
6x SPI / 3x I²S
Secure ROM and RAMs
Secure Peripherals
Secure RTC
Analog true RNG
Up to 176 GPIOs
Reset and Clock
MDMA + 2x DMA
2x FDCAN / TTCAN
DES, TDES, AES-256
TrustZone
Analog
2x 12-bit DAC
Temperature sensor
96-bit unique ID
5x LDOs
• Standard serial interfaces: I2C, SPI, UART
• Audio interfaces for multimedia capability
• Video interfaces for graphics / HMI
• High speed communication: Ethernet, CAN, USB
host and device
• Camera interface

Hardware Details – Analog 16
System
STM32MP157
Security
SHA-256, MD5, HMAC
Core 1 @ 650MHz
L1 32KB I / 32KB D
NEON SIMD
256KB L2 cache
Core 2 @ 650MHz
L1 32KB I / 32KB D
NEON SIMD
Cortex-M4 @ 209MHz
MPUFPU
Connectivity
Control
10x 16-bit timer
5x 16-bit LP timer
2x 32-bit timer
1Gbps Ethernet
6x I²C
4x SAI
4x UART, 4x USART
6x SPI / 3x I²S
Secure ROM and RAMs
Secure Peripherals
Secure RTC
Analog true RNG
Up to 176 GPIOs
Reset and Clock
MDMA + 2x DMA
2x FDCAN / TTCAN
DES, TDES, AES-256
TrustZone
Analog
2x 12-bit DAC
Temperature sensor
96-bit unique ID
5x LDOs
• ADC: Ultra-low power consumption: 210 µA @ 1 Msample/s
• ADC: Flexible trigger, data management to offload CPU
• DAC: can control the external bias circuitry; replacing
potentiometers.
• DAC: voice and arbitrary signal generator.
• Low power temperature measurement

Hardware Details – Control 17
System
STM32MP157
Security
SHA-256, MD5, HMAC
Core 1 @ 650MHz
L1 32KB I / 32KB D
NEON SIMD
256KB L2 cache
Core 2 @ 650MHz
L1 32KB I / 32KB D
NEON SIMD
Cortex-M4 @ 209MHz
MPUFPU
Connectivity
Control
10x 16-bit timer
5x 16-bit LP timer
2x 32-bit timer
1Gbps Ethernet
6x I²C
4x SAI
4x UART, 4x USART
6x SPI / 3x I²S
Secure ROM and RAMs
Secure Peripherals
Secure RTC
Analog true RNG
Up to 176 GPIOs
Reset and Clock
MDMA + 2x DMA
2x FDCAN / TTCAN
DES, TDES, AES-256
TrustZone
Analog
2x 12-bit DAC
Temperature sensor
96-bit unique ID
5x LDOs
• Asynchronous running capability
• Ultra-low power consumption
• Timeout function for wakeup from low-power modes
• Tight tolerance timing operation without CPU load
• Motor control capable

Hardware Details – System 18
System
STM32MP157
Security
SHA-256, MD5, HMAC
Core 1 @ 650MHz
L1 32KB I / 32KB D
NEON SIMD
256KB L2 cache
Core 2 @ 650MHz
L1 32KB I / 32KB D
NEON SIMD
Cortex-M4 @ 209MHz
MPUFPU
Connectivity
Control
10x 16-bit timer
5x 16-bit LP timer
2x 32-bit timer
1Gbps Ethernet
6x I²C
4x SAI
4x UART, 4x USART
6x SPI / 3x I²S
Secure ROM and RAMs
Secure Peripherals
Secure RTC
Analog true RNG
Up to 176 GPIOs
Reset and Clock
MDMA + 2x DMA
2x FDCAN / TTCAN
DES, TDES, AES-256
TrustZone
Analog
2x 12-bit DAC
Temperature sensor
96-bit unique ID
5x LDOs
• High flexibility in choice of clock sources to meet
consumption and accuracy requirements.
• Safe and flexible reset management
• DMA support for timers, ADC, and communication
peripherals
• Offloads CPU from data transfer management
• Unique device identifier can be used for security and
serial numbering schemes
• Direct microcontroller wake-up
• Supports a wide range of supply voltages

Hardware Details – Security 19
System
STM32MP157
Security
SHA-256, MD5, HMAC
Core 1 @ 650MHz
L1 32KB I / 32KB D
NEON SIMD
256KB L2 cache
Core 2 @ 650MHz
L1 32KB I / 32KB D
NEON SIMD
Cortex-M4 @ 209MHz
MPUFPU
Connectivity
Control
10x 16-bit timer
5x 16-bit LP timer
2x 32-bit timer
1Gbps Ethernet
6x I²C
4x SAI
4x UART, 4x USART
6x SPI / 3x I²S
Secure ROM and RAMs
Secure Peripherals
Secure RTC
Analog true RNG
Up to 176 GPIOs
Reset and Clock
MDMA + 2x DMA
2x FDCAN / TTCAN
DES, TDES, AES-256
TrustZone
Analog
2x 12-bit DAC
Temperature sensor
96-bit unique ID
5x LDOs
• System-wide hardware isolation for trusted
software
• Peripheral assignment to secure world
• Hardware accelerated cryptography

Cortex-M4 co-processor
Cortex-M4

Cortex-M4 advantage
• Save energy
• Real time constraints
• Offload the A7
• Provide more peripheral accessibility
• Reuse of already developed firmware on MCU
21

M4 Firmware loading
• The Cortex-M4 firmware is loaded in MCURAM by Cortex-A7
• Load of the firmware is done either :
• Automatically by Uboot (early boot)
• Automatically by OpenSTLinux kernel
• Manually at OpenSTLinux runtime
• In OpenSTLinux uses the RemoteProc (Remote Processor)
framework
• Firmware is stored in an ELF format file in OpenSTLinux filesystem
(/lib/firmware)
22

Fw Load OpenSTLinux Framework 23
ST Community
3rd Party
Hardware
Legend
Application or
User
stm32_rproc
MCUSRAM/RET
RAM
rproc_core
/sys/class/remoteproc/remoteprocX/
STM32Cube
firmware
Step 1: Cortex-M4 Firmware is loaded
from the file system. It can be loaded
during kernel probe or at runtime by an
application using sysfs.
Cortex-A
OpenST
Linux
Cortex-M
RCC
Step 2: Cortex M4 is clocked and
reset is de-asserted to start M4
firmware
Resource table

24Multi-core Resources management
• M4 is seen as a coprocessor of A7
• Peripherals are assigned to A7 or to M4
• OpenSTLinux controls Clock Tree and Power regulator
• M4 firmware controls its peripherals independently from A7
(except clock frequency & regulators)
• For M4 assigned peripheral,
OpenSTlinux rproc-srm (system resource manager) ensures reservation
of peripheral Clocks and GPIOs.

Peripheral Assignment
• All the peripherals is assigned to one
hw execution context
• Peripheral Assignment configuration stands in
the TF-A device tree file
• STM32CubeMX supports assignment.
TF-A device tree file is generated by the tool.
25

26
A7-M4 Shared resources management
• The A7 OpenSTLinux has the control of the clock tree frequencies and the regulators.
M4 can ask OpenSTLinux resource manager for a dynamic reconfiguration
• The M4 firmware and OpenSTLinux on A7 shares some peripherals.
• The GPIO clocks and GPIO pin muxing
• The EXTI configuration
• RCC for IP clk gating, IP reset
• GPIO&EXTI configuration is under Hw semaphore (HSEM) => avoid concurrent access
(rproc-srm on A7/ HAL driver on M4)
• RCC IP (clock & reset) is via MCU and MPU dedicated registers - no need of Hw semaphore
• Configuration of SYSCFG,DMAMUX,IPCC peripherals needs also Hw semaphore

27Shared resource configuration set
Peripheral XXX
remoteproc
rproc_srm_core
rproc_srm_dev
rproc_srm_dev
rproc_srm_dev
Cortex-A
OpenST
Linux
Cortex-M
application
PWR
RCC
GPIO
EXTI
User space
Kernel space
Hardware
HAL_Cortex HAL_XXXHAL_GPIO HAL_RCC
Configure &
Drive output
GPIOs
Reserves EXTI-
interrupts, GPIOs, clock
and regulators for
Cortex-M XXX
peripheral
Configure EXTI
Mask / unmask
EXTI interrupts
Enable / disable
the peripheral
clocks.
Cannot change
the system clock
tree
application
HAL_..._MSP
ST Community
3rd Party
Hardware
Legend

28Dynamic system resource update

29
application
IPCC HAL_IPCC
OpenAMP
stm32_rpmsg_tty
application
virtual_hal_uart
/dev/ttyRPMSG0
TTY RPMSG channel
ST Community
3rd Party
Hardware
Legend
Virtual link
rpmsg
stm32_ipcc
rproc_core
MCUSRAM
RX & TX Vrings
Buffers
Cortex-M
Cortex A
OpenST
Linux
Coprocessor software framework
Inter-processor communication (I2C variant exists too)

A7 M4 Communication 30
MCU + Ret. RAM
448kB
Mailbox
IPCC
Cortex-M4 @ 209MHz
Library from ST
OpenAMP
application
application
Framework from Community
RPMsg
RemoteProc
VirtIO
• Inter-Processor Communication

STM32MP1
Power Solution using STPMIC1

32STM32MP1 Power supplies
Mandatory supplies :
VDDQ_DDR 1.2V / 1.35V / 1.5V
VDDCORE 1.2 V
VDD 1.7V – 3.6V
4 power domains :
Core domain
VDD domain
VSW domain (VSWitch) for Standby lp mode
Analog domain

Power Management Architecture 33
• System power modes are set by PWR manager based on MPU and MCU power modes
Cortex-M4
(co-processor)
Shared by A7S
& A7NS & M4
STM32MP15x
External
Power Regulators
PWR_ON,
PWR_LP
control pins
Supplies
External DDR3 2x16bits
Dual Cortex – A7
(master)
MCU power stateMPU power state
PWR manager
Clock manager
VSW domain (*)
. RTC, LSE, AWU, tamper
. Backup registers, Reset
. Backup and Retention RAMs and regulators
(*) powered by VBAT when VDD is not present)

Memory
Display
STPMIC1 Power Management IC 34
Simplify your design and optimize power consumption
External
Components
STPMIC1
DC/DCs & LDOs for
- STM32MP1
- Memories
- External devices
• Optimized power consumption
• BOM savings for typical applications
• Small PCB footprint vs. full discrete solution

STPMIC1 Power Management IC 35

Flexible Architecture for Power Efficiency 36
Processing for HMI and communication + motor control & sensing
Cortex-A7 Cortex-M4
3D
GPU
dedicated
RAM
Motor Control
Sensors &
Low Power acquisition
Graphic and Communication processing
2470 DMIPS on dual Cortex-A7 + 3D GPU
Motor Control, Sensors
and Low Power acquisition
260 DMIPS on Cortex-M4
DRAM
Memory
Full Power

Motor control & sensing
Cortex-A7 Cortex-M4
3D
GPU
DRAM
Self refresh
mode
dedicated
RAM
Motor Control
Sensors &
STOP MODE
and Low Power acquisition
260 DMIPS on Cortex-M4
Power
Divided by 4
vs. full power mode

Standby mode
Cortex-A7 Cortex-M4
3D
GPU
DRAM
Self refresh
mode
dedicated
RAM
Motor Control
Sensors &
STANDBY MODE
and low power acquisition
STANDBY MODE
Power
Divided by 2.5K
vs. previous mode

Processing for HMI and communication + motor control & sensing
Cortex-A7 Cortex-M4
3D
GPU
dedicated
RAM
Motor Control
Sensors &
Back to full performance
~1 second to move back to Linux console
~3 seconds for 3D graphic application
DRAM
Memory
Full Power

Typ @ VDDCORE = 1.2V, VDD = 3.3V @ 25 °C, Peripherals OFF
4.5 µW VBAT
Power figures
Optimize power
vs.
processing needs
Keep track of the time & ensure system security
allowing RTC (Real Time Clock) and Tamper protection
Arm Cortex-A7 @ 650 MHz / Cortex-M4 @ 209MHz
Arm Cortex-M4 @ 209 MHz92 mW
275 mW
Dual Arm Cortex-A7 @ 650 MHz / Cortex-M4 @ 209MHz353 mW RUN
RUN
RUN
1/4
36 µW STANDBY
1/2.5 K
From STANDBY to Linux console in
around a second

Power documentation 41
• AN5031 - Getting started with STM32MP15 Series hardware development
• AN5109 - STM32MP15 Series using low-power mode
• AN5256 - STM32MP15x Lines discrete power supply hardware integration
• RM0436 - reference manual - STM32MP157xxx advanced Arm®-based 32-bit MPUs

STM32MP1
Package / Part Numbers

Optional Security
STM32MP1 Packages
24 Sales Type in Production Now
43
Dual Arm Cortex-A7 + Cortex-M4
3D GPU – DSI – CAN FD
STM32MP157
Dual Arm Cortex-A7 + Cortex-M4
CAN FD
STM32MP153
Arm Cortex-A7 + Cortex-M4
STM32MP151
3 Product Lines
TFBGA257 10x10mm p0.5
4 layers PTH PCB
TFBGA361 12x12mm p0.5
4 layers PTH + Laser via PCB
LFBGA354 16x16mm p0.8
4 layers PTH PCB
LFBGA448 18x18mm p0.8
6 layers PTH PCB
4 Packages
smallest
package for
dual Cortex-A
GP MPU

45
Hardware Development
Tools
Evaluation boards, discovery Boards
BSP, SOM
Debug and Programming Probes
Software Development
Tools
Configuration Tools
Development & Debugging Tools
Monitoring Tools
Embedded Software
Linux World through a Standard
Distribution and STM32 Cube
Services
Web site
Community
Worldwide Support
Wide Variety of Partner offering
Ecosystem
ST-
designed
Open
source
Partners
All pieces required to develop with an STM32MP1
STM32MP1 Ecosystem

A Fully Integrated Design Suite
Leveraging the STM32Cube Environment
47
STM32MP1 Embedded Software Distribution
Cortex-M4Cortex-A7

STM32MPU Embedded Software 48
• 6 pieces of the puzzle
Open
source
Kernel
SDK
Application
frameworks
STM32CubeTF-A
OP-TEE
U-Boot

STM32MPU Embedded Software 49
• Delivered with different Software Package
STM32MPU Embedded Software
SDK
Application
frameworks
OP-TEE
Linux
kernel
TF-A
U-Boot
STM32Cube
Starter
Package
Developer
Package
Distribution
Package

Quick Start 50
What is it?
• This package allows to quickly and easily get any STM32
microprocessor development platform up and running.
• The software image contains firmware delivered as examples with
regards to the STM32Cube MPU Package
What you can do with it?
• You can flash the Start Package image in the different flash memories using STM32CubeProgrammer
• You can execute Cube M4 firmware delivered as example
• You can use Linux console to develop application based on scripts (shell, python, …)
Starter Package

I want to do some development 51
What is it?
• By providing a Software Development Kit (SDK) for cross-development
on a host PC, this package allows modification of some pieces of the
STM32MPU Embedded Software distribution
• The STM32Cube MPU package is in source code.
• STM32CubeMX tool is available to generate device tree for
OpenSTLinux distribution and generate the peripheral initialization C
code and IDE project creation files for STM32Cube MPU package.
• You can modify and tune pieces of software delivered as source code: U-Boot, Trusted Frimware-A (TF-A), Linux® kernel and
optionally the Open Source Trusted Execution Environment (OP-TEE).
• You can develop your own Firmware running on the Arm® Cortex®-M processor
• You can add your own Linux® application, Linux® application framework, U-boot application, or Trusted Application (if OP-
TEE is part of the software release)
Developer Package

I want to create my own Distribution / SDK 52
What is it?
• This package allows the creation of a new distribution with a final
objective of productization.
• It includes the source code of all the pieces of software of the
STM32MPU Embedded Software distribution (including the application
frameworks), plus a build framework based on OpenEmbedded (aka
distribution builder).
• You can create your own Linux® distribution to tune the system configuration options (such as memory sizes or debug
options) or to integrate your own Cube M4 firmware and the developments made thank to the Developer Package.
• You can generate your own Starter package images
• You can generate your own Developer package SDK
Distribution Package

STM32MP1
Software Development Tools

STM32CubeMX/IDE enhanced for
MPU
• Configure and generate Code
• DRAM interface tuning tool
• Device Tree generation
Multi-Core Solutions
• STM32CubeIDE / System Workbench
• Partners IDE
• Multi-core debugging
STM32CubeProgrammer
• Flash, DRAM and/or system memory
• OTP programming
• Signing tool & Keys generation
STM32MP1 Software Tools 54
Complete support of Arm Cortex-A + Cortex-M architecture
STM32CubeMX/IDE
IDEs
Compile and Debug
STM32 Programming Tool

STM32CubeMX / IDE
• Choose MCU/MPU
and configure:
• Pinouts
• Clock tree setup
• MCU peripherals
• MPU device tree source
files generating
• Middleware
• Memory
55
• Helps choose the correct chip for a given purpose
• Generate code for embedded microcontroller core
• Boosts development speed with a headstart

MPU Selector 56
• Find MCU by name …
• Quickly locate by Series and Lines
• … or application needs
• Package (pin count)
• RAM size
• NV memory requirements
• Embedded peripherals
• Number and type of interfaces
• Core and frequency
• Price
• Convenient links to documentation
• Export table to Excel file

Pin Assignment 57
• Pinout from:
• Peripheral tree
• Manually
• Automatic signal
remapping
• Management of
dependencies between
peripherals and/or
middleware
(FatFS, USB …)
Peripheral is not
available, all its alternate
pins are assigned
elsewhere.
Click on
the pin to
view
alternate
functions
Freeze the
signal
placement
using the pin
icon
Orange
means the
peripheral is
not
enabled,
only the pin
is assigned

Peripheral Configuration 58
• Assign each peripheral to a
core/step in Mode section
• All available initialization
parameters are presented with
short description and options.
• Interrupt may be assigned to
peripherals.
• DMA may be associated,
where applicable.
• GPIO settings for peripherals
with input and/or output.

Middleware Configuration 59
• Presents options specific
to each supported
software component.
• All settings are organized
in logical groups.
• Description and
constraints are available
for quick reference.

Peripheral and Middleware Configuration 60
• Global view of used
peripherals and
middleware.
• Highlight of
configuration state
 Not configured
 OK
Non-blocking problem
 Error
Configuration
is valid here
Error in
configuration, code
generator will
display a warning
message.
GPIO
configuration is
considered
incorrect, but
code may be
generated
Click to
configure DMA
Quickly switch
pinout and
system view

Clock Configuration 61
• Immediate display
of all clock values.
• Active and inactive
clock paths are
differentiated.
• Management of
clock constraints
and features.

Clock Configuration (cont.) 62
• Highlight of errors –
instantly turns red.
• Enter the value in the
blue frame and let the
tool adjust the dividers
and multipliers.
• Lock a value to
prevent the tool from
modifying it.

Code Generation
• Generates STM32HAL based C code to initialize
MCU peripherals.
• Generated device tree sources for the application
cores serve as an aid for U-Boot and Linux kernel
configuration.
• Generates project file for any supported
development toolchain.
• User code can be added in dedicated sections and
will be kept upon regeneration.
• Option to use the latest library version or keep the
same even if re-generating.
63
Write your
code here to
keep option to
regenerate
the project

DDR Tuning
• The goal is to compensate for minor imperfections in the target HW,
especially PCB routing.
• The tuning can set optimal values for Bit De-skew, DQS Gating and
Eye centering.
• Refer to application notes AN5168, AN5122 and Wiki
64

IDE: STM32CubeIDE / System Workbench 65
Source files
Code Editor
Console (build)
Console (serial)
Develop and Debug code for Arm Cortex-M architecture

IDE: KEIL / IAR 66
Develop and debug code for Cortex-M architecture
STM32MP1xx

STM32CubeProgrammer 68
• It is a unified programming
tools suite:
• Merge STVP, STM32 ST-LINK
Utility and Bootloader software
tools in one solution.
• STM32CubeProgrammer for
all STM32 (MCU and MPU):
• Programming of STM32 Flash,
SRAM, OTP and external
memories (QSPI, SDMMC, FMC,
I2C, SPI) via SPI, UART, USB
Device (with DFU), SWD.

STM32MP1
Hardware Development Tools

Available at
$399
Available at
$99
Available at
$69
Full feature STM32MP1 evaluation
• STM32MP157A-EV1
• STM32MP157C-EV1
Flexible prototyping & demo
• STM32MP157A-DK1
• STM32MP157C-DK2
+ MIPI DSI WVGA display
+ Wi-Fi/BT combo module
3rd Parties Boards for prototyping
and production
• Board Specification from Linaro
(96boards.org)
• Commercial SoM w/ different forms
STM32MP1 Hardware Solutions 70
Speed-up evaluation, prototyping and design
Evaluation Board Discovery Board Boards & SoM*s
*System on Module

Hardware Development Boards 71
Flexible
prototyping
Full feature
evaluation
DiscoveryEvaluation board
Community boards & SOMs
Community boards & SOMs
Community Boards
prototyping
Mass Market Announcement
https://www.embarcados.com.br/avenger96-96boards/

73
Introducing the STM32 MPU Wiki
https://wiki.st.com/stm32mpu/wiki/Main_Page

Chose a Starting Point 74
I don’t have any experience with the MP1 I’m ready to do some development

Four Easy Steps from Unpack to Demo 76

A7 and M4 Application development 77

Development Zone 78
Mandatory sections
for any developer

STM32 MPU Peripheral Details 79

STM32 MPU Peripheral Details (cont.) 80
Links to important
Topics !!
SDMMC internal peripheral
example

Software, Training and Services
a Broad Ecosystem to Support Development
84
ST’s wiki user guide
for beginners and experts
https://wiki.st.com/stm32mpu
Large selection of partners
already engaged for:
• Graphics UI
• Security
• Training and services

STM32MP1 Series Partners List 85
• STM32MP1 Partners List evangelizing the
STM32MP1 Series Solution
• Highly skilled recognized leaders in their
specific domain to help customers
• Early access of the technology to benefit
customers program in order to make success
• On-going ST Partner Program to enrich
STM32MP1 Series Ecosystem
• UDEMY Training “Web Server (NGINX) no
Linux Embarcado com o STM32MP1 ”
by Diego Moreno, Alvaro Pinho Branco
https://www.udemy.com/course/draft/3124696/?referralCode=5BB02BD3E70BDE5089C3
•

Building the Future
STM32 MPU Portfolio Expansion
86
Step-up in
performance,
features
and security
Cost and power
optimization

Top 15 Benefits (1/3) 88
External memories interface in line with future sourcing trends
3D GPU for low to medium HMI for cost optimized applications
STM32MP1 is a STM32 !
High Performance Analog: 2x 16b ADC + 2x 12b DAC
STM32 MCU with dedicated 448KB SRAM inside STM32MP1
5
4
3
2
1

4x Packages for cheap PCB cost: Down to 4 layers PTH PCB
Smallest package for Dual Cortex-A GP MPU: 10x10mm
Security: TrustZone + integrated Op-TEE into ST’s offer
10 ST’s PMIC for optimized Power, BOM and PCB footprint
4x Packages pin to pin compatible with all STM32MP15x PNs
9
8
7
6

Large Boards offer: ST’s boards, 3rd Party boards and SOMs
Enhanced CubeMX: Peripherals assignment to Cortex-A or M,
DRAM configuration tool and Linux device tree generation
Linux on Cortex-A and already available Cube FW on Cortex-M
15 Free of Charge Eclipse based ST IDE’s for both Cortex-A & M
Non proprietary Linux with 100% SW upstream to Community
14
13
12
11

HW related Application Notes
(only major ones)
• AN5031 Getting started with STM32MP1 Series hardware development
https://www.st.com/resource/en/application_note/dm00389996.pdf
• Power supplies, external clocks and resets, boot configuration, IO speed settings, PCB, ...
• Examples of reference schematics (Debug, STPMIC1, DDR3/DDR3L/LPDDR2/LPDDR3, SD-Card, eMMC, Raw-
NAND, Serial-NOR/NAND, USB, Ethernet, DSI, etc...)
• AN5168 DDR configuration on STM32MP1 Series MPUs
• DDR subsystem initialization and configuration
• Configuration sequence and parameters for DDR3/DDR3L/LPDDR2/LPDDR3
• DDR Tuning and Testing
• AN5122 STM32MP1 Series DDR memory routing guidelines
• Memory architecture options
• DDR3/DDR3L schematic implementation for DDR3/DDR3L/LPDDR2/LPDDR3
• PCB design considerations, Memory layout rules
• Provided with “STM32MP1 Series DDR memory routing guidelines examples”
Zip file containing multiple Altium® schematics and PCB projects
92

HW related data
• STM32MP1 CAD Symbol and Footprint files
• To quickly start projects
https://www.st.com/resource/en/svd/stm32mp1_svd.zip
• STM32MP1 IBIS file (Input/output Buffer Information Specification)
• For board signal integrity simulations
https://www.st.com/resource/en/bsdl_model/stm32mp1_ibis.zip
• STM32MP1 BSDL file (Boundary Scan Description Language)
• For board manufacturing tests
https://www.st.com/resource/en/bsdl_model/stm32mp1_bsdl.zip
• STM32MP1 System View Description (SVD)
• Ease debugging using abstraction of HW registers address
https://www.st.com/resource/en/cad_symbol_library/stm32mp1_cad.zip
93

WIKI
• Main page
https://wiki.st.com/stm32mpu
• Reference documents links
• Application Notes
• DataSheets / Reference Manuals / ErrataSheets
• Boards schematics and users manuals
https://wiki.st.com/stm32mpu/wiki/STM32MP15_ecosystem_release_note#Reference_docu
ments
• ROM code HW related information (Boot pins, Flash connections, etc...)
https://wiki.st.com/stm32mpu/wiki/STM32MP15_ROM_code_overview
94

Main challenges for HW 95
• STM32CubeMx, Reference board, Application Notes, Wiki
Platform HW definition should be simple
• Smart Package definition, DDR Tools, Reference design
PCB routing should allow low complexity PCB stackup and
technology
• STPMIC1, Reference design, Application Notes
Platform supplies definition should be as simple as possible
• DDR Tools, IBIS models, BSDL files
Signal integrity should be easy to manage / test

Webinar Gravado: Microprocessadores STM32MP1: Conhecendo a flexibilidade entre performance e tempo real

Recommandé

Recommandé

Contenu connexe

Tendances

Tendances (20)

Similaire à Webinar Gravado: Microprocessadores STM32MP1: Conhecendo a flexibilidade entre performance e tempo real

Similaire à Webinar Gravado: Microprocessadores STM32MP1: Conhecendo a flexibilidade entre performance e tempo real (20)

Plus de Embarcados

Plus de Embarcados (20)

Dernier

Dernier (20)

Webinar Gravado: Microprocessadores STM32MP1: Conhecendo a flexibilidade entre performance e tempo real