SlideShare une entreprise Scribd logo
1  sur  28
CADBRIDGE
SEMICONDUCTOR (P) LTD
Submitted to: Submitted by:
Mr. Rishabh Sharma Bhagvan Lal Teli
Assistant Professor ECE Dept. IVYear ECE- B
A
Industrial Training Seminar
on
VLSI DESIGN
at
Contents
• About Cadbridge semiconductor
• IC & Classification
• VLSI introduction & objective
• VLSI design flow
• VLSI application
• VLSI companies in India
• How can we placed in cadbrige semiconductor
• IEEE paper implemented , improved & work
on by me.
• Conclusion
Cadbridge semiconductor
• CADBRIDGE SEMICONDUCTOR is a emerging company in electronics
field.
• Corporate office - greater Noida .
• Branch office - jalander ( Panjab) , jaipur ( Rajasthan)
introduction
Vision
• To support a multicultural environment and make it our business
to hire, inspire and develop the very best people in the
industry, worldwide.
Area of work
Work on
• Memories
• PCB Design
• Digital security lock
• Robots
• Image processing
• MATLAB
• ARM KIT
• AVR KIT
Fature project
• FPGA Board design
• CPLD Board design
• DSP KIT Design
• microcontroller
Arm kit Avr kit
products
Integrated Circuits(ICs)
What is Integrated Circuit?
Integrated Circuits contains several transistors fabricated
on a single chip.
Classification of Integrated Circuits
Size classification( historical )
 <100 SSI 1963
100-3000 MSI 1970
3000 – 30000 LSI 1975
 30000 – 1000000 VLSI 1980
 > 1000000 ULSI 1990
VLSI introduction : Objectives
introduction :
• A VLSI (Very Large Scale Integration) system
integrates millions of “electronic components” in
a small area (few mm2 few cm2).
Objectives:
design “efficient” VLSI systems that has:
• Circuit Speed (high )
• Power consumption ( low )
• Design Area ( low )
Vlsi design flow
1. idea (need) 2. specifications 3. design architecture 4. RTL coding
5. RTL
Verification
6. Synthesis7.Foundry8.IC Chip
1. Ideas
• Microprocessor
• Microcontroller
• Memories
• Printer
• Mobile
• Digital security lock
Any thing we needs chip
This is the crucial step as it will affect the future of
the product. Here, vendors may want to get
feedback from potential customers on what they are
looking for
• Instruction set
• Interface (I/O pins)
• Organization of the system
• Functionality of each unit in the system, and how to
communicate it to other units.
2.Specifications
3. Design architecture
• This is where the main work starts. With the help of
the specification sheet the target IC’s architecture is
decided and a layout for same is created by design
engineers using EDA tools.
EDA Tools :
• Synopsys – astro
• activehdl
• Xilinx - ise design suite
• Cadence - encounter digital ic design
4. RTL coding
RTL - register transfer level.
• This implies that the VHDL/VERILOG code
written based on the architecture describes
how data is transformed as it is passed from
register to register.
RTL coding tools
• xilinx ise,
• Vim,
• Emacs,
• conTEXT,
• HDL TurboWriter
VHDL
• Not case sensitive.
• Difficult to learn.
• Based on pascal & ada.
• Strongly typed.
• Case sensitive.
• Easy to learn.
• Based on c.
• Not strongly typed.
HDL – Hardware Description Language
ƒ
A programming language that can describe the
functionality and timing of the hardware.
Types of HDL
• VHDL ( Very high speed integrated circuit Hardware Description Language)
• VERILOG
• SYSTEM VERILOG
VERILOG
Difference
5. RTL Verification
RTL simulation and verification is one of the important
step. This ensures that the design is logically correct and
without major timing errors. It is advantageous to perform this
step, especially in the early stages of the design.
RTL verification tools
• Modelsim
• Finsim
• Verilog - XL
• TestBuilder
• Xilinx ise
RTL verification wave form
6. synthesis
This is where the design now start to get physical. Logic synthesis
is a process by which the desired circuit behavior i.e. Register
Transistor Level is turned into a design in terms of logic gates
which drives the circuit or architecture.
Synthesis tools/kit
• FPGA (Altera,digiland,xilinx)
• CPLD ( altera , digiland )
FPGA KIT
Field programmable gate array (FPGA)
• It is a IC which can be be programmable by user to capture the logic.
• Capable to capturing 100,000 designed gates.
7.Foundry
The design is sent for Fabrication for mass
production to foundry .
8.IC Chip
Application of VLSI
Vlsi companies in india
How can we placed in CAD BRIDGE
o DIGITAL ELECTRONICS
o VERILOG (VLSI)
o MATLAB
o FPGA
o IMAGE PROCCESING
o EMBEDDED SYSTEM
o PLC SCADA
o ANTEENA
o POWER ELECTRONICS
o Wireless communication
FULL TIMEPART TIME
WORKING
TYPES
Knowledge about any following area
IEEE Research paper I have
implemented
• Area-Efficient 3-Input Decimal Adders Using Simplified
Carry and Sum Vectors.
• A review of clock gating techniques.
• A Pipelined 8to 10 bit Encoder for a High
speed Transmission.
• VLSI implementation of adders for High speed ALU.
IEEE Research paper I have improved
• Design of High Speed Area Optimized Binary
Coded Decimal Digit Adder and Multiplier .
• Area-Efficient 3-Input Decimal Adders Using
Simplified Carry and Sum Vectors .
• VLSI implementation of adders
for High speed ALU.
Research paper on which I am working
• Area and Power Efficient Viterbi Decoder for Storage.
• VHDL design of lossy DWT based image compression
technique for video conferencing.
• Faster and Energy-Efficient Signed Multipliers.
• FPGA IMPLEMENTATION OF LOW POWER PIPELINED 32-
BIT RISC PROCESSOR .
Vlsi is suitabale for fabrication of larger number
of components on a single chip.
VHDL/VERILOG is used for digital circuit designing
and to validate the design and check the design
specification.
CONCLUSION
THANK YOU
QUARRYS???

Contenu connexe

Tendances (20)

Vlsi
VlsiVlsi
Vlsi
 
VLSI TECHNOLOGY
VLSI TECHNOLOGYVLSI TECHNOLOGY
VLSI TECHNOLOGY
 
VLSI Technology Trends
VLSI Technology TrendsVLSI Technology Trends
VLSI Technology Trends
 
Introduction to VLSI
Introduction to VLSIIntroduction to VLSI
Introduction to VLSI
 
Trends and challenges in vlsi
Trends and challenges in vlsiTrends and challenges in vlsi
Trends and challenges in vlsi
 
VLSI Systems & Design
VLSI Systems & DesignVLSI Systems & Design
VLSI Systems & Design
 
Vlsi design
Vlsi designVlsi design
Vlsi design
 
Overview of digital design with Verilog HDL
Overview of digital design with Verilog HDLOverview of digital design with Verilog HDL
Overview of digital design with Verilog HDL
 
VLSI technology
VLSI technologyVLSI technology
VLSI technology
 
Vlsi ppt priyanka
Vlsi ppt priyankaVlsi ppt priyanka
Vlsi ppt priyanka
 
Study of vlsi design methodologies and limitations using cad tools for cmos t...
Study of vlsi design methodologies and limitations using cad tools for cmos t...Study of vlsi design methodologies and limitations using cad tools for cmos t...
Study of vlsi design methodologies and limitations using cad tools for cmos t...
 
ASIC design Flow (Digital Design)
ASIC design Flow (Digital Design)ASIC design Flow (Digital Design)
ASIC design Flow (Digital Design)
 
VLSI Fresher Resume
VLSI Fresher ResumeVLSI Fresher Resume
VLSI Fresher Resume
 
ASIC DESIGN FLOW
ASIC DESIGN FLOWASIC DESIGN FLOW
ASIC DESIGN FLOW
 
SISTec Microelectronics VLSI design
SISTec Microelectronics VLSI designSISTec Microelectronics VLSI design
SISTec Microelectronics VLSI design
 
Digital VLSI Design : Introduction
Digital VLSI Design : IntroductionDigital VLSI Design : Introduction
Digital VLSI Design : Introduction
 
Introduction to VLSI Design
Introduction to VLSI DesignIntroduction to VLSI Design
Introduction to VLSI Design
 
Basics Of VLSI
Basics Of VLSIBasics Of VLSI
Basics Of VLSI
 
VLSI
VLSI VLSI
VLSI
 
Basics of vlsi
Basics of vlsiBasics of vlsi
Basics of vlsi
 

Similaire à vlsi design summer training ppt

6 months/weeks training in Vlsi,jalandhar
6 months/weeks training in Vlsi,jalandhar6 months/weeks training in Vlsi,jalandhar
6 months/weeks training in Vlsi,jalandhardeepikakaler1
 
6 weeks/months summer training in vlsi,ludhiana
6 weeks/months summer training in vlsi,ludhiana6 weeks/months summer training in vlsi,ludhiana
6 weeks/months summer training in vlsi,ludhianadeepikakaler1
 
Vlsi final year project in jalandhar
Vlsi final year project in jalandharVlsi final year project in jalandhar
Vlsi final year project in jalandhardeepikakaler1
 
Vlsi final year project in ludhiana
Vlsi final year project in ludhianaVlsi final year project in ludhiana
Vlsi final year project in ludhianadeepikakaler1
 
Hardware Design engineer
Hardware Design engineerHardware Design engineer
Hardware Design engineerNarasimha Reddy
 
Basic Design Flow for Field Programmable Gate Arrays
Basic Design Flow for Field Programmable Gate ArraysBasic Design Flow for Field Programmable Gate Arrays
Basic Design Flow for Field Programmable Gate ArraysUsha Mehta
 
Vlsi_vhdl and pcb designing ppt
Vlsi_vhdl and pcb designing pptVlsi_vhdl and pcb designing ppt
Vlsi_vhdl and pcb designing pptPallavi Bharti
 
Design & Simulation With Verilog
Design & Simulation With Verilog Design & Simulation With Verilog
Design & Simulation With Verilog Semi Design
 
Cockatrice: A Hardware Design Environment with Elixir
Cockatrice: A Hardware Design Environment with ElixirCockatrice: A Hardware Design Environment with Elixir
Cockatrice: A Hardware Design Environment with ElixirHideki Takase
 
Ravikanth Resume
Ravikanth ResumeRavikanth Resume
Ravikanth ResumeRavi Kanth
 
OliverStoneSWResume2015-05
OliverStoneSWResume2015-05OliverStoneSWResume2015-05
OliverStoneSWResume2015-05Oliver Stone
 
SoC~FPGA~ASIC~Embedded
SoC~FPGA~ASIC~EmbeddedSoC~FPGA~ASIC~Embedded
SoC~FPGA~ASIC~EmbeddedChili.CHIPS
 
Building IoT Mashups for Industry 4.0 with Eclipse Kura and Kura Wires
Building IoT Mashups for Industry 4.0 with Eclipse Kura and Kura WiresBuilding IoT Mashups for Industry 4.0 with Eclipse Kura and Kura Wires
Building IoT Mashups for Industry 4.0 with Eclipse Kura and Kura WiresEclipse Kura
 

Similaire à vlsi design summer training ppt (20)

6 months/weeks training in Vlsi,jalandhar
6 months/weeks training in Vlsi,jalandhar6 months/weeks training in Vlsi,jalandhar
6 months/weeks training in Vlsi,jalandhar
 
6 weeks/months summer training in vlsi,ludhiana
6 weeks/months summer training in vlsi,ludhiana6 weeks/months summer training in vlsi,ludhiana
6 weeks/months summer training in vlsi,ludhiana
 
Vlsi final year project in jalandhar
Vlsi final year project in jalandharVlsi final year project in jalandhar
Vlsi final year project in jalandhar
 
Vlsi final year project in ludhiana
Vlsi final year project in ludhianaVlsi final year project in ludhiana
Vlsi final year project in ludhiana
 
Hardware Design engineer
Hardware Design engineerHardware Design engineer
Hardware Design engineer
 
Himanshu Shivhar (1)
Himanshu Shivhar (1)Himanshu Shivhar (1)
Himanshu Shivhar (1)
 
Basic Design Flow for Field Programmable Gate Arrays
Basic Design Flow for Field Programmable Gate ArraysBasic Design Flow for Field Programmable Gate Arrays
Basic Design Flow for Field Programmable Gate Arrays
 
verification resume
verification resumeverification resume
verification resume
 
Vlsi_vhdl and pcb designing ppt
Vlsi_vhdl and pcb designing pptVlsi_vhdl and pcb designing ppt
Vlsi_vhdl and pcb designing ppt
 
Design & Simulation With Verilog
Design & Simulation With Verilog Design & Simulation With Verilog
Design & Simulation With Verilog
 
VLSI VHDL
VLSI VHDLVLSI VHDL
VLSI VHDL
 
Rashmi_Palakkal_CV
Rashmi_Palakkal_CVRashmi_Palakkal_CV
Rashmi_Palakkal_CV
 
Detailed Cv
Detailed CvDetailed Cv
Detailed Cv
 
Cockatrice: A Hardware Design Environment with Elixir
Cockatrice: A Hardware Design Environment with ElixirCockatrice: A Hardware Design Environment with Elixir
Cockatrice: A Hardware Design Environment with Elixir
 
Ravikanth Resume
Ravikanth ResumeRavikanth Resume
Ravikanth Resume
 
Resume_updated
Resume_updatedResume_updated
Resume_updated
 
OliverStoneSWResume2015-05
OliverStoneSWResume2015-05OliverStoneSWResume2015-05
OliverStoneSWResume2015-05
 
SoC~FPGA~ASIC~Embedded
SoC~FPGA~ASIC~EmbeddedSoC~FPGA~ASIC~Embedded
SoC~FPGA~ASIC~Embedded
 
Vlsi lab
Vlsi labVlsi lab
Vlsi lab
 
Building IoT Mashups for Industry 4.0 with Eclipse Kura and Kura Wires
Building IoT Mashups for Industry 4.0 with Eclipse Kura and Kura WiresBuilding IoT Mashups for Industry 4.0 with Eclipse Kura and Kura Wires
Building IoT Mashups for Industry 4.0 with Eclipse Kura and Kura Wires
 

Dernier

2024: Domino Containers - The Next Step. News from the Domino Container commu...
2024: Domino Containers - The Next Step. News from the Domino Container commu...2024: Domino Containers - The Next Step. News from the Domino Container commu...
2024: Domino Containers - The Next Step. News from the Domino Container commu...Martijn de Jong
 
GenAI Risks & Security Meetup 01052024.pdf
GenAI Risks & Security Meetup 01052024.pdfGenAI Risks & Security Meetup 01052024.pdf
GenAI Risks & Security Meetup 01052024.pdflior mazor
 
EIS-Webinar-Prompt-Knowledge-Eng-2024-04-08.pptx
EIS-Webinar-Prompt-Knowledge-Eng-2024-04-08.pptxEIS-Webinar-Prompt-Knowledge-Eng-2024-04-08.pptx
EIS-Webinar-Prompt-Knowledge-Eng-2024-04-08.pptxEarley Information Science
 
A Domino Admins Adventures (Engage 2024)
A Domino Admins Adventures (Engage 2024)A Domino Admins Adventures (Engage 2024)
A Domino Admins Adventures (Engage 2024)Gabriella Davis
 
Exploring the Future Potential of AI-Enabled Smartphone Processors
Exploring the Future Potential of AI-Enabled Smartphone ProcessorsExploring the Future Potential of AI-Enabled Smartphone Processors
Exploring the Future Potential of AI-Enabled Smartphone Processorsdebabhi2
 
Histor y of HAM Radio presentation slide
Histor y of HAM Radio presentation slideHistor y of HAM Radio presentation slide
Histor y of HAM Radio presentation slidevu2urc
 
How to Troubleshoot Apps for the Modern Connected Worker
How to Troubleshoot Apps for the Modern Connected WorkerHow to Troubleshoot Apps for the Modern Connected Worker
How to Troubleshoot Apps for the Modern Connected WorkerThousandEyes
 
What Are The Drone Anti-jamming Systems Technology?
What Are The Drone Anti-jamming Systems Technology?What Are The Drone Anti-jamming Systems Technology?
What Are The Drone Anti-jamming Systems Technology?Antenna Manufacturer Coco
 
Boost PC performance: How more available memory can improve productivity
Boost PC performance: How more available memory can improve productivityBoost PC performance: How more available memory can improve productivity
Boost PC performance: How more available memory can improve productivityPrincipled Technologies
 
Automating Google Workspace (GWS) & more with Apps Script
Automating Google Workspace (GWS) & more with Apps ScriptAutomating Google Workspace (GWS) & more with Apps Script
Automating Google Workspace (GWS) & more with Apps Scriptwesley chun
 
ProductAnonymous-April2024-WinProductDiscovery-MelissaKlemke
ProductAnonymous-April2024-WinProductDiscovery-MelissaKlemkeProductAnonymous-April2024-WinProductDiscovery-MelissaKlemke
ProductAnonymous-April2024-WinProductDiscovery-MelissaKlemkeProduct Anonymous
 
IAC 2024 - IA Fast Track to Search Focused AI Solutions
IAC 2024 - IA Fast Track to Search Focused AI SolutionsIAC 2024 - IA Fast Track to Search Focused AI Solutions
IAC 2024 - IA Fast Track to Search Focused AI SolutionsEnterprise Knowledge
 
Driving Behavioral Change for Information Management through Data-Driven Gree...
Driving Behavioral Change for Information Management through Data-Driven Gree...Driving Behavioral Change for Information Management through Data-Driven Gree...
Driving Behavioral Change for Information Management through Data-Driven Gree...Enterprise Knowledge
 
Workshop - Best of Both Worlds_ Combine KG and Vector search for enhanced R...
Workshop - Best of Both Worlds_ Combine  KG and Vector search for  enhanced R...Workshop - Best of Both Worlds_ Combine  KG and Vector search for  enhanced R...
Workshop - Best of Both Worlds_ Combine KG and Vector search for enhanced R...Neo4j
 
[2024]Digital Global Overview Report 2024 Meltwater.pdf
[2024]Digital Global Overview Report 2024 Meltwater.pdf[2024]Digital Global Overview Report 2024 Meltwater.pdf
[2024]Digital Global Overview Report 2024 Meltwater.pdfhans926745
 
Strategies for Unlocking Knowledge Management in Microsoft 365 in the Copilot...
Strategies for Unlocking Knowledge Management in Microsoft 365 in the Copilot...Strategies for Unlocking Knowledge Management in Microsoft 365 in the Copilot...
Strategies for Unlocking Knowledge Management in Microsoft 365 in the Copilot...Drew Madelung
 
Presentation on how to chat with PDF using ChatGPT code interpreter
Presentation on how to chat with PDF using ChatGPT code interpreterPresentation on how to chat with PDF using ChatGPT code interpreter
Presentation on how to chat with PDF using ChatGPT code interpreternaman860154
 
Powerful Google developer tools for immediate impact! (2023-24 C)
Powerful Google developer tools for immediate impact! (2023-24 C)Powerful Google developer tools for immediate impact! (2023-24 C)
Powerful Google developer tools for immediate impact! (2023-24 C)wesley chun
 
Mastering MySQL Database Architecture: Deep Dive into MySQL Shell and MySQL R...
Mastering MySQL Database Architecture: Deep Dive into MySQL Shell and MySQL R...Mastering MySQL Database Architecture: Deep Dive into MySQL Shell and MySQL R...
Mastering MySQL Database Architecture: Deep Dive into MySQL Shell and MySQL R...Miguel Araújo
 
Data Cloud, More than a CDP by Matt Robison
Data Cloud, More than a CDP by Matt RobisonData Cloud, More than a CDP by Matt Robison
Data Cloud, More than a CDP by Matt RobisonAnna Loughnan Colquhoun
 

Dernier (20)

2024: Domino Containers - The Next Step. News from the Domino Container commu...
2024: Domino Containers - The Next Step. News from the Domino Container commu...2024: Domino Containers - The Next Step. News from the Domino Container commu...
2024: Domino Containers - The Next Step. News from the Domino Container commu...
 
GenAI Risks & Security Meetup 01052024.pdf
GenAI Risks & Security Meetup 01052024.pdfGenAI Risks & Security Meetup 01052024.pdf
GenAI Risks & Security Meetup 01052024.pdf
 
EIS-Webinar-Prompt-Knowledge-Eng-2024-04-08.pptx
EIS-Webinar-Prompt-Knowledge-Eng-2024-04-08.pptxEIS-Webinar-Prompt-Knowledge-Eng-2024-04-08.pptx
EIS-Webinar-Prompt-Knowledge-Eng-2024-04-08.pptx
 
A Domino Admins Adventures (Engage 2024)
A Domino Admins Adventures (Engage 2024)A Domino Admins Adventures (Engage 2024)
A Domino Admins Adventures (Engage 2024)
 
Exploring the Future Potential of AI-Enabled Smartphone Processors
Exploring the Future Potential of AI-Enabled Smartphone ProcessorsExploring the Future Potential of AI-Enabled Smartphone Processors
Exploring the Future Potential of AI-Enabled Smartphone Processors
 
Histor y of HAM Radio presentation slide
Histor y of HAM Radio presentation slideHistor y of HAM Radio presentation slide
Histor y of HAM Radio presentation slide
 
How to Troubleshoot Apps for the Modern Connected Worker
How to Troubleshoot Apps for the Modern Connected WorkerHow to Troubleshoot Apps for the Modern Connected Worker
How to Troubleshoot Apps for the Modern Connected Worker
 
What Are The Drone Anti-jamming Systems Technology?
What Are The Drone Anti-jamming Systems Technology?What Are The Drone Anti-jamming Systems Technology?
What Are The Drone Anti-jamming Systems Technology?
 
Boost PC performance: How more available memory can improve productivity
Boost PC performance: How more available memory can improve productivityBoost PC performance: How more available memory can improve productivity
Boost PC performance: How more available memory can improve productivity
 
Automating Google Workspace (GWS) & more with Apps Script
Automating Google Workspace (GWS) & more with Apps ScriptAutomating Google Workspace (GWS) & more with Apps Script
Automating Google Workspace (GWS) & more with Apps Script
 
ProductAnonymous-April2024-WinProductDiscovery-MelissaKlemke
ProductAnonymous-April2024-WinProductDiscovery-MelissaKlemkeProductAnonymous-April2024-WinProductDiscovery-MelissaKlemke
ProductAnonymous-April2024-WinProductDiscovery-MelissaKlemke
 
IAC 2024 - IA Fast Track to Search Focused AI Solutions
IAC 2024 - IA Fast Track to Search Focused AI SolutionsIAC 2024 - IA Fast Track to Search Focused AI Solutions
IAC 2024 - IA Fast Track to Search Focused AI Solutions
 
Driving Behavioral Change for Information Management through Data-Driven Gree...
Driving Behavioral Change for Information Management through Data-Driven Gree...Driving Behavioral Change for Information Management through Data-Driven Gree...
Driving Behavioral Change for Information Management through Data-Driven Gree...
 
Workshop - Best of Both Worlds_ Combine KG and Vector search for enhanced R...
Workshop - Best of Both Worlds_ Combine  KG and Vector search for  enhanced R...Workshop - Best of Both Worlds_ Combine  KG and Vector search for  enhanced R...
Workshop - Best of Both Worlds_ Combine KG and Vector search for enhanced R...
 
[2024]Digital Global Overview Report 2024 Meltwater.pdf
[2024]Digital Global Overview Report 2024 Meltwater.pdf[2024]Digital Global Overview Report 2024 Meltwater.pdf
[2024]Digital Global Overview Report 2024 Meltwater.pdf
 
Strategies for Unlocking Knowledge Management in Microsoft 365 in the Copilot...
Strategies for Unlocking Knowledge Management in Microsoft 365 in the Copilot...Strategies for Unlocking Knowledge Management in Microsoft 365 in the Copilot...
Strategies for Unlocking Knowledge Management in Microsoft 365 in the Copilot...
 
Presentation on how to chat with PDF using ChatGPT code interpreter
Presentation on how to chat with PDF using ChatGPT code interpreterPresentation on how to chat with PDF using ChatGPT code interpreter
Presentation on how to chat with PDF using ChatGPT code interpreter
 
Powerful Google developer tools for immediate impact! (2023-24 C)
Powerful Google developer tools for immediate impact! (2023-24 C)Powerful Google developer tools for immediate impact! (2023-24 C)
Powerful Google developer tools for immediate impact! (2023-24 C)
 
Mastering MySQL Database Architecture: Deep Dive into MySQL Shell and MySQL R...
Mastering MySQL Database Architecture: Deep Dive into MySQL Shell and MySQL R...Mastering MySQL Database Architecture: Deep Dive into MySQL Shell and MySQL R...
Mastering MySQL Database Architecture: Deep Dive into MySQL Shell and MySQL R...
 
Data Cloud, More than a CDP by Matt Robison
Data Cloud, More than a CDP by Matt RobisonData Cloud, More than a CDP by Matt Robison
Data Cloud, More than a CDP by Matt Robison
 

vlsi design summer training ppt

  • 1. CADBRIDGE SEMICONDUCTOR (P) LTD Submitted to: Submitted by: Mr. Rishabh Sharma Bhagvan Lal Teli Assistant Professor ECE Dept. IVYear ECE- B A Industrial Training Seminar on VLSI DESIGN at
  • 2. Contents • About Cadbridge semiconductor • IC & Classification • VLSI introduction & objective • VLSI design flow • VLSI application • VLSI companies in India • How can we placed in cadbrige semiconductor • IEEE paper implemented , improved & work on by me. • Conclusion
  • 3. Cadbridge semiconductor • CADBRIDGE SEMICONDUCTOR is a emerging company in electronics field. • Corporate office - greater Noida . • Branch office - jalander ( Panjab) , jaipur ( Rajasthan) introduction Vision • To support a multicultural environment and make it our business to hire, inspire and develop the very best people in the industry, worldwide.
  • 4. Area of work Work on • Memories • PCB Design • Digital security lock • Robots • Image processing • MATLAB • ARM KIT • AVR KIT Fature project • FPGA Board design • CPLD Board design • DSP KIT Design • microcontroller Arm kit Avr kit products
  • 5. Integrated Circuits(ICs) What is Integrated Circuit? Integrated Circuits contains several transistors fabricated on a single chip.
  • 6. Classification of Integrated Circuits Size classification( historical )  <100 SSI 1963 100-3000 MSI 1970 3000 – 30000 LSI 1975  30000 – 1000000 VLSI 1980  > 1000000 ULSI 1990
  • 7. VLSI introduction : Objectives introduction : • A VLSI (Very Large Scale Integration) system integrates millions of “electronic components” in a small area (few mm2 few cm2). Objectives: design “efficient” VLSI systems that has: • Circuit Speed (high ) • Power consumption ( low ) • Design Area ( low )
  • 8. Vlsi design flow 1. idea (need) 2. specifications 3. design architecture 4. RTL coding 5. RTL Verification 6. Synthesis7.Foundry8.IC Chip
  • 9. 1. Ideas • Microprocessor • Microcontroller • Memories • Printer • Mobile • Digital security lock Any thing we needs chip
  • 10. This is the crucial step as it will affect the future of the product. Here, vendors may want to get feedback from potential customers on what they are looking for • Instruction set • Interface (I/O pins) • Organization of the system • Functionality of each unit in the system, and how to communicate it to other units. 2.Specifications
  • 11. 3. Design architecture • This is where the main work starts. With the help of the specification sheet the target IC’s architecture is decided and a layout for same is created by design engineers using EDA tools. EDA Tools : • Synopsys – astro • activehdl • Xilinx - ise design suite • Cadence - encounter digital ic design
  • 12.
  • 13. 4. RTL coding RTL - register transfer level. • This implies that the VHDL/VERILOG code written based on the architecture describes how data is transformed as it is passed from register to register. RTL coding tools • xilinx ise, • Vim, • Emacs, • conTEXT, • HDL TurboWriter
  • 14. VHDL • Not case sensitive. • Difficult to learn. • Based on pascal & ada. • Strongly typed. • Case sensitive. • Easy to learn. • Based on c. • Not strongly typed. HDL – Hardware Description Language ƒ A programming language that can describe the functionality and timing of the hardware. Types of HDL • VHDL ( Very high speed integrated circuit Hardware Description Language) • VERILOG • SYSTEM VERILOG VERILOG Difference
  • 15. 5. RTL Verification RTL simulation and verification is one of the important step. This ensures that the design is logically correct and without major timing errors. It is advantageous to perform this step, especially in the early stages of the design. RTL verification tools • Modelsim • Finsim • Verilog - XL • TestBuilder • Xilinx ise
  • 17. 6. synthesis This is where the design now start to get physical. Logic synthesis is a process by which the desired circuit behavior i.e. Register Transistor Level is turned into a design in terms of logic gates which drives the circuit or architecture. Synthesis tools/kit • FPGA (Altera,digiland,xilinx) • CPLD ( altera , digiland )
  • 18. FPGA KIT Field programmable gate array (FPGA) • It is a IC which can be be programmable by user to capture the logic. • Capable to capturing 100,000 designed gates.
  • 19. 7.Foundry The design is sent for Fabrication for mass production to foundry .
  • 23. How can we placed in CAD BRIDGE o DIGITAL ELECTRONICS o VERILOG (VLSI) o MATLAB o FPGA o IMAGE PROCCESING o EMBEDDED SYSTEM o PLC SCADA o ANTEENA o POWER ELECTRONICS o Wireless communication FULL TIMEPART TIME WORKING TYPES Knowledge about any following area
  • 24. IEEE Research paper I have implemented • Area-Efficient 3-Input Decimal Adders Using Simplified Carry and Sum Vectors. • A review of clock gating techniques. • A Pipelined 8to 10 bit Encoder for a High speed Transmission. • VLSI implementation of adders for High speed ALU.
  • 25. IEEE Research paper I have improved • Design of High Speed Area Optimized Binary Coded Decimal Digit Adder and Multiplier . • Area-Efficient 3-Input Decimal Adders Using Simplified Carry and Sum Vectors . • VLSI implementation of adders for High speed ALU.
  • 26. Research paper on which I am working • Area and Power Efficient Viterbi Decoder for Storage. • VHDL design of lossy DWT based image compression technique for video conferencing. • Faster and Energy-Efficient Signed Multipliers. • FPGA IMPLEMENTATION OF LOW POWER PIPELINED 32- BIT RISC PROCESSOR .
  • 27. Vlsi is suitabale for fabrication of larger number of components on a single chip. VHDL/VERILOG is used for digital circuit designing and to validate the design and check the design specification. CONCLUSION