Lakshmi Yasaswi Kamireddy

San Francisco Bay Area United States

ASIC Design Verification Engineer at Marvell Semiconductor

Electronics / Computer Hardware

"The only true wisdom is in knowing you know nothing" I am a ASIC Design Verification Engineer at Marvell with an ever growing passion for semiconductor engineering. My skills include: ASIC Design Flow: RTL Design/Modeling, Logic Synthesis, Digital Design, Static Timing Analysis Verification methodologies: Assertions & directed tests based verification, Coverage driven verification,UVM basics Physical/Custom Design: Cadence Virtuoso, Calibre verification tools (LVS/DRC) Circuit Simulation: Spice tools (HSPICE, LT-SPICE), Cadence Spectre, NI-Multisim Digital CAD Tools: Questa Sim, Altera Modelsim, Quartus Prime, Mentor Modelsim Programming and scripting: Verilog, VHDL, System Verilog ...