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ARMv8-M Secure Debug
The ARM® CoreLink™ SSE-200 subsystem
• ARM Cortex®-M33 processor
- ARMv8-M architecture
- TrustZone for ARMv8-M
• ARM CoreLink SIE-200
• Instruction caches with ARM TrustZone® support
• Power infrastructure components
• Secure Debug with ARM CoreSight SoC
• ARM TrustZone CryptoCell (option)
• ARM Cordio® Radio (option)
TrustZoneforARMv8-M…
Non-secureregion Secure region
Non -secure Code
- Blinks MCC LEDs
- Triggers secure function every 500ms
JTAG/Debug
Secure boot code
- System initialization
- SAU / MPC / PPCconfig
Secure function
- Refreshes secure code and LCD every 10 seconds
- Checks switch status to updatedbg authorization
- Blinks RGB LEDs
Secure Memory
Secure code
Non-securePeripherals
MCC LEDs
Secure
Peripherals
GLCD
Switch
Shield LCD
RGB LEDs
Non -secure Memory
NS Branch(BXNS)
Secure regions
Non-secure regions
Secure
Gateway
DBGCTRL
Further information:
https://community.arm.com https://developer.arm.com

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ARMv8-M secure debug demo

  • 1. ARMv8-M Secure Debug The ARM® CoreLink™ SSE-200 subsystem • ARM Cortex®-M33 processor - ARMv8-M architecture - TrustZone for ARMv8-M • ARM CoreLink SIE-200 • Instruction caches with ARM TrustZone® support • Power infrastructure components • Secure Debug with ARM CoreSight SoC • ARM TrustZone CryptoCell (option) • ARM Cordio® Radio (option) TrustZoneforARMv8-M… Non-secureregion Secure region Non -secure Code - Blinks MCC LEDs - Triggers secure function every 500ms JTAG/Debug Secure boot code - System initialization - SAU / MPC / PPCconfig Secure function - Refreshes secure code and LCD every 10 seconds - Checks switch status to updatedbg authorization - Blinks RGB LEDs Secure Memory Secure code Non-securePeripherals MCC LEDs Secure Peripherals GLCD Switch Shield LCD RGB LEDs Non -secure Memory NS Branch(BXNS) Secure regions Non-secure regions Secure Gateway DBGCTRL Further information: https://community.arm.com https://developer.arm.com