SlideShare une entreprise Scribd logo
1  sur  44
Télécharger pour lire hors ligne
Madam Raini Hassan
Office: C5 - 23, Level 5, KICT Building
Department: Computer Science
Emails: hrai@iium.edu.my, hraini.iii@gmail.com
1Semester II 2014/2015
Du’a for Study
Semester II 2014/2015 2
LECTURE 03
Computer
Arithmetic:
Arithmetic and
Logic Unit (ALU)
(Chapter 10)
Arithmetic & Logic Unit (ALU)
• Part of the computer that actually performs
arithmetic and logical operations on data
• All of the other elements of the computer
system are there mainly to bring data into the
ALU for it to process and then to take the
results back out
• Based on the use of simple digital logic devices
that can store binary digits and perform simple
Boolean logic operations
ALU Inputs and Outputs
Integer Representations
• In the binary number system arbitrary
numbers can be represented with:
– The digits zero and one
– The minus sign (for negative numbers)
– The period, or radix point (for numbers with a
fractional component)
– For purposes of computer storage and processing we do not have the
benefit of special symbols for the minus sign and radix point
– Only binary digits (0,1) may be used to represent numbers
Integer Representations
• There are 4 commonly known (1 not common)
integer representations.
• All have been used at various times for various
reasons.
1. Unsigned
2. Sign Magnitude
3. One’s Complement
4. Two’s Complement
5. Biased (not commonly known)
1. Unsigned
• The standard binary encoding already given.
• Only positive value.
• Range: 0 to ((2 to the power of N bits) – 1)
• Example: 4 bits; (2ˆ4)-1 = 16-1 = values 0 to 15
Semester II 2014/2015 8
1. Unsigned (Cont’d.)
Semester II 2014/2015 9
2. Sign-Magnitude
There are several alternative
conventions used to represent
negative as well as positive integers
Sign-magnitude representation is
the simplest form that employs a
sign bit
Drawbacks:
Because of these drawbacks, sign-
magnitude representation is rarely
used in implementing the integer
portion of the ALU
• All of these alternatives involve treating the
most significant (leftmost) bit in the word as
a sign bit
• If the sign bit is 0 the number is positive
• If the sign bit is 1 the number is negative
• Addition and subtraction require a
consideration of both the signs of the
numbers and their relative magnitudes to
carry out the required operation
• There are two representations of 0
2. Sign-Magnitude (Cont’d.)
• It is a human readable way of getting both
positive and negative integers.
• The hardware that does arithmetic on sign
magnitude integers.
• Not fast.
2-11
2. Sign-Magnitude (Cont’d.)
• Left most bit is sign bit
• 0 means positive
• 1 means negative
• +18 = 00010010
• -18 = 10010010
2-12
3. One’s Complement
• Used to get two’s complement integers.
• Nowadays, it is not being applied to any of the
machines.
• Stated in this slide for historical purpose.
Semester II 2014/2015 13
4. Two’s Complement
• Uses the most significant bit as a sign bit
• Differs from sign-magnitude representation in the way that the other
bits are interpreted
Table 10.1 Characteristics of Twos Complement Representation and Arithmetic
5. Biased
• an integer representation that skews the bit
patterns so as to look just like unsigned but
actually represent negative numbers.
Semester II 2014/2015 15
Table 10.2
Alternative Representations for 4-Bit Integers
Range Extension
– Range of numbers that can be expressed is extended by
increasing the bit length
– In sign-magnitude notation this is accomplished by moving
the sign bit to the new leftmost position and fill in with
zeros
– This procedure will not work for twos complement
negative integers
– Rule is to move the sign bit to the new leftmost position and
fill in with copies of the sign bit
– For positive numbers, fill in with zeros, and for negative
numbers, fill in with ones
– This is called sign extension
Range of Numbers
• 8 bit 2s complement
– +127 = 01111111 = 27 -1
– -128 = 10000000 = -27
• 16 bit 2s complement
– +32767 = 011111111 11111111 = 215 - 1
– -32768 = 100000000 00000000 = -215
2-18
Negation
• Twos complement operation
– Take the Boolean complement of each bit of the
integer (including the sign bit)
– Treating the result as an unsigned binary integer, add 1
– The negative of the negative of that number is itself:
+18 = 00010010 (twos complement)
bitwise complement = 11101101
+ 1
11101110 = -18
-18 = 11101110 (twos complement)
bitwise complement = 00010001
+ 1
00010010 = +18
Negation Special Case 1
0 = 00000000 (twos complement)
Bitwise complement = 11111111
Add 1 to LSB + 1
Result 100000000
Overflow is ignored, so:
- 0 = 0
Negation Special Case 2
-128 = 10000000 (twos complement)
Bitwise complement = 01111111
Add 1 to LSB + 1
Result 10000000
So:
-(-128) = -128 X
Monitor MSB (sign bit)
It should change during negation
OVERFLOW RULE:
If two numbers are added,
and they are both positive or
both negative, then overflow
occurs if and only if the
result has the opposite sign.
Addition
SUBTRACTION RULE:
To subtract one number
(subtrahend) from another
(minuend), take the twos
complement (negation) of
the subtrahend and add it
to the minuend.
Subtraction
Geometric Depiction of Twos
Complement Integers
Hardware for Addition and
Subtraction
Multiplication
Hardware
Implementation
of Unsigned
Binary
Multiplication
Flowchart for
Unsigned Binary
Multiplication
Twos Complement Multiplication
Comparison
Division
Flowchart for
Unsigned
Binary Division
Example of Restoring Twos
Complement Division
+
Floating-Point Representation
• With a fixed-point notation it is possible to
represent a range of positive and negative integers
centered on or near 0
• By assuming a fixed binary or radix point, this
format allows the representation of numbers with a
fractional component as well
• Limitations:
– Very large numbers cannot be represented nor can very
small fractions
– The fractional part of the quotient in a division of two
large numbers could be lost
Principles
Typical 32-Bit Floating-Point Format
+
Floating-Point
• The final portion of the word
• Any floating-point number can be expressed in
many ways
• Normal number
– The most significant digit of the significand is
nonzero
Significand
The following are equivalent, where the significand is expressed in
binary form:
0.110 * 25
110 * 22
0.0110 * 26
IEEE Standard 754
Most important floating-point
representation is defined
Standard was developed to
facilitate the portability of
programs from one processor
to another and to encourage
the development of
sophisticated, numerically
oriented programs
Standard has been widely
adopted and is used on
virtually all contemporary
processors and arithmetic
coprocessors
IEEE 754-2008 covers both
binary and decimal floating-
point representations
IEEE 754
Formats
Floating-Point Addition and Subtraction
Floating-Point
Multiplication
Floating-Point
Division

Contenu connexe

Tendances

Computer instructions
Computer instructionsComputer instructions
Computer instructions
Anuj Modi
 
Cache memory
Cache memoryCache memory
Cache memory
Anuj Modi
 
Unit 4 memory system
Unit 4   memory systemUnit 4   memory system
Unit 4 memory system
chidabdu
 
Input output organization
Input output organizationInput output organization
Input output organization
abdulugc
 
Computer organiztion5
Computer organiztion5Computer organiztion5
Computer organiztion5
Umang Gupta
 
Microprogram Control
Microprogram Control Microprogram Control
Microprogram Control
Anuj Modi
 

Tendances (20)

Instruction Set Architecture (ISA)
Instruction Set Architecture (ISA)Instruction Set Architecture (ISA)
Instruction Set Architecture (ISA)
 
Computer Organization
Computer OrganizationComputer Organization
Computer Organization
 
instruction format and addressing modes
instruction format and addressing modesinstruction format and addressing modes
instruction format and addressing modes
 
Instruction format
Instruction formatInstruction format
Instruction format
 
ADDRESSING MODES
ADDRESSING MODESADDRESSING MODES
ADDRESSING MODES
 
Computer instructions
Computer instructionsComputer instructions
Computer instructions
 
Instruction Set Architecture
Instruction Set ArchitectureInstruction Set Architecture
Instruction Set Architecture
 
Cache memory
Cache memoryCache memory
Cache memory
 
Data transfer and manipulation
Data transfer and manipulationData transfer and manipulation
Data transfer and manipulation
 
Register transfer language & its micro operations
Register transfer language & its micro operationsRegister transfer language & its micro operations
Register transfer language & its micro operations
 
COMPUTER ORGANIZATION NOTES Unit 2
COMPUTER ORGANIZATION NOTES  Unit 2COMPUTER ORGANIZATION NOTES  Unit 2
COMPUTER ORGANIZATION NOTES Unit 2
 
DATA REPRESENTATION
DATA  REPRESENTATIONDATA  REPRESENTATION
DATA REPRESENTATION
 
Unit 4 memory system
Unit 4   memory systemUnit 4   memory system
Unit 4 memory system
 
Timing and control
Timing and controlTiming and control
Timing and control
 
mano.ppt
mano.pptmano.ppt
mano.ppt
 
Virtual memory ppt
Virtual memory pptVirtual memory ppt
Virtual memory ppt
 
Types of instructions
Types of instructionsTypes of instructions
Types of instructions
 
Input output organization
Input output organizationInput output organization
Input output organization
 
Computer organiztion5
Computer organiztion5Computer organiztion5
Computer organiztion5
 
Microprogram Control
Microprogram Control Microprogram Control
Microprogram Control
 

En vedette

Chapter 05 computer arithmetic
Chapter 05 computer arithmeticChapter 05 computer arithmetic
Chapter 05 computer arithmetic
IIUI
 
Arithmetic logic units
Arithmetic logic unitsArithmetic logic units
Arithmetic logic units
owaisahmad125
 
Basic structure of computers
Basic structure of computersBasic structure of computers
Basic structure of computers
Kumar
 
Midterm 1
Midterm 1Midterm 1
Midterm 1
IIUM
 

En vedette (20)

Computer arithmetic
Computer arithmeticComputer arithmetic
Computer arithmetic
 
Chapter 05 computer arithmetic
Chapter 05 computer arithmeticChapter 05 computer arithmetic
Chapter 05 computer arithmetic
 
09 Arithmetic
09  Arithmetic09  Arithmetic
09 Arithmetic
 
09 arithmetic
09 arithmetic09 arithmetic
09 arithmetic
 
Arithmetic for Computers
Arithmetic for ComputersArithmetic for Computers
Arithmetic for Computers
 
Arithmetic Logic Unit (ALU)
Arithmetic Logic Unit (ALU)Arithmetic Logic Unit (ALU)
Arithmetic Logic Unit (ALU)
 
ALU arithmetic logic unit
ALU  arithmetic logic unitALU  arithmetic logic unit
ALU arithmetic logic unit
 
Arithmetic Process in Computer Systems
Arithmetic Process in Computer SystemsArithmetic Process in Computer Systems
Arithmetic Process in Computer Systems
 
Arithmetic Logic Unit .
Arithmetic Logic Unit .Arithmetic Logic Unit .
Arithmetic Logic Unit .
 
arithmetic logic unit
arithmetic logic unitarithmetic logic unit
arithmetic logic unit
 
ALU
ALUALU
ALU
 
Arithmetic logic units
Arithmetic logic unitsArithmetic logic units
Arithmetic logic units
 
Computer Architecture – An Introduction
Computer Architecture – An IntroductionComputer Architecture – An Introduction
Computer Architecture – An Introduction
 
Basic structure of computers
Basic structure of computersBasic structure of computers
Basic structure of computers
 
Love as it is to me
Love as it is to meLove as it is to me
Love as it is to me
 
who-are-you
 who-are-you who-are-you
who-are-you
 
Midterm 1
Midterm 1Midterm 1
Midterm 1
 
Microprocessor laboratory 03 Arithmetic Operation (Additional and Subtraction)
Microprocessor laboratory 03 Arithmetic Operation (Additional and Subtraction)Microprocessor laboratory 03 Arithmetic Operation (Additional and Subtraction)
Microprocessor laboratory 03 Arithmetic Operation (Additional and Subtraction)
 
Microprocessor
MicroprocessorMicroprocessor
Microprocessor
 
How to Open a Computer Repair Shop: 8 Steps to Build Your Client List [Slides]
How to Open a Computer Repair Shop: 8 Steps to Build Your Client List [Slides]How to Open a Computer Repair Shop: 8 Steps to Build Your Client List [Slides]
How to Open a Computer Repair Shop: 8 Steps to Build Your Client List [Slides]
 

Similaire à Csc1401 lecture03 - computer arithmetic - arithmetic and logic unit (alu)

1. Arithmetic Operations - Addition and subtraction of signed numbers.pptx
1. Arithmetic Operations - Addition and subtraction of signed numbers.pptx1. Arithmetic Operations - Addition and subtraction of signed numbers.pptx
1. Arithmetic Operations - Addition and subtraction of signed numbers.pptx
JEEVANANTHAMG6
 
Alu1
Alu1Alu1

Similaire à Csc1401 lecture03 - computer arithmetic - arithmetic and logic unit (alu) (20)

Integer represention
Integer representionInteger represention
Integer represention
 
index of all of the financial accounts in a company's general ledger. In shor...
index of all of the financial accounts in a company's general ledger. In shor...index of all of the financial accounts in a company's general ledger. In shor...
index of all of the financial accounts in a company's general ledger. In shor...
 
Computer Architecture refers to those attributes of a system that have a dire...
Computer Architecture refers to those attributes of a system that have a dire...Computer Architecture refers to those attributes of a system that have a dire...
Computer Architecture refers to those attributes of a system that have a dire...
 
CS304PC:Computer Organization and Architecture session 22 floating point arit...
CS304PC:Computer Organization and Architecture session 22 floating point arit...CS304PC:Computer Organization and Architecture session 22 floating point arit...
CS304PC:Computer Organization and Architecture session 22 floating point arit...
 
CS304PC:Computer Organization and Architecture Session 19 Addition and subtra...
CS304PC:Computer Organization and Architecture Session 19 Addition and subtra...CS304PC:Computer Organization and Architecture Session 19 Addition and subtra...
CS304PC:Computer Organization and Architecture Session 19 Addition and subtra...
 
Computer Oraganizaation.pptx
Computer Oraganizaation.pptxComputer Oraganizaation.pptx
Computer Oraganizaation.pptx
 
CS304PC:Computer Organization and Architecture Session 17 Complements and fix...
CS304PC:Computer Organization and Architecture Session 17 Complements and fix...CS304PC:Computer Organization and Architecture Session 17 Complements and fix...
CS304PC:Computer Organization and Architecture Session 17 Complements and fix...
 
Floating point arithmetic operations (1)
Floating point arithmetic operations (1)Floating point arithmetic operations (1)
Floating point arithmetic operations (1)
 
Unit 2 Arithmetic
Unit 2 ArithmeticUnit 2 Arithmetic
Unit 2 Arithmetic
 
1. Arithmetic Operations - Addition and subtraction of signed numbers.pptx
1. Arithmetic Operations - Addition and subtraction of signed numbers.pptx1. Arithmetic Operations - Addition and subtraction of signed numbers.pptx
1. Arithmetic Operations - Addition and subtraction of signed numbers.pptx
 
Digital fundamendals r001a
Digital fundamendals r001aDigital fundamendals r001a
Digital fundamendals r001a
 
Number Systems.ppt
Number Systems.pptNumber Systems.ppt
Number Systems.ppt
 
Arithmetic circuits
Arithmetic circuitsArithmetic circuits
Arithmetic circuits
 
2s complement arithmetic
2s complement arithmetic2s complement arithmetic
2s complement arithmetic
 
2sComplementArithmetic1.ppt
2sComplementArithmetic1.ppt2sComplementArithmetic1.ppt
2sComplementArithmetic1.ppt
 
2sComplementArithmetic1.ppt
2sComplementArithmetic1.ppt2sComplementArithmetic1.ppt
2sComplementArithmetic1.ppt
 
2sComplementArithmetic1 lecture slides ppt
2sComplementArithmetic1 lecture slides ppt2sComplementArithmetic1 lecture slides ppt
2sComplementArithmetic1 lecture slides ppt
 
CS304PC:Computer Organization and Architecture Unit- III PDF notes .pdf
CS304PC:Computer Organization and Architecture Unit- III PDF notes .pdfCS304PC:Computer Organization and Architecture Unit- III PDF notes .pdf
CS304PC:Computer Organization and Architecture Unit- III PDF notes .pdf
 
computer arithmatic
computer arithmaticcomputer arithmatic
computer arithmatic
 
Alu1
Alu1Alu1
Alu1
 

Plus de IIUM (20)

How to use_000webhost
How to use_000webhostHow to use_000webhost
How to use_000webhost
 
Chapter 2
Chapter 2Chapter 2
Chapter 2
 
Chapter 1
Chapter 1Chapter 1
Chapter 1
 
Kreydle internship-multimedia
Kreydle internship-multimediaKreydle internship-multimedia
Kreydle internship-multimedia
 
03phpbldgblock
03phpbldgblock03phpbldgblock
03phpbldgblock
 
Chap2 practice key
Chap2 practice keyChap2 practice key
Chap2 practice key
 
Group p1
Group p1Group p1
Group p1
 
Tutorial import n auto pilot blogspot friendly seo
Tutorial import n auto pilot blogspot friendly seoTutorial import n auto pilot blogspot friendly seo
Tutorial import n auto pilot blogspot friendly seo
 
Visual sceneperception encycloperception-sage-oliva2009
Visual sceneperception encycloperception-sage-oliva2009Visual sceneperception encycloperception-sage-oliva2009
Visual sceneperception encycloperception-sage-oliva2009
 
03 the htm_lforms
03 the htm_lforms03 the htm_lforms
03 the htm_lforms
 
Exercise on algo analysis answer
Exercise on algo analysis   answerExercise on algo analysis   answer
Exercise on algo analysis answer
 
Redo midterm
Redo midtermRedo midterm
Redo midterm
 
Heaps
HeapsHeaps
Heaps
 
Report format
Report formatReport format
Report format
 
Edpuzzle guidelines
Edpuzzle guidelinesEdpuzzle guidelines
Edpuzzle guidelines
 
Final Exam Paper
Final Exam PaperFinal Exam Paper
Final Exam Paper
 
Final Exam Paper
Final Exam PaperFinal Exam Paper
Final Exam Paper
 
Group assignment 1 s21516
Group assignment 1 s21516Group assignment 1 s21516
Group assignment 1 s21516
 
Avl tree-rotations
Avl tree-rotationsAvl tree-rotations
Avl tree-rotations
 
Week12 graph
Week12   graph Week12   graph
Week12 graph
 

Dernier

Dernier (20)

Wellbeing inclusion and digital dystopias.pptx
Wellbeing inclusion and digital dystopias.pptxWellbeing inclusion and digital dystopias.pptx
Wellbeing inclusion and digital dystopias.pptx
 
Unit 3 Emotional Intelligence and Spiritual Intelligence.pdf
Unit 3 Emotional Intelligence and Spiritual Intelligence.pdfUnit 3 Emotional Intelligence and Spiritual Intelligence.pdf
Unit 3 Emotional Intelligence and Spiritual Intelligence.pdf
 
Sensory_Experience_and_Emotional_Resonance_in_Gabriel_Okaras_The_Piano_and_Th...
Sensory_Experience_and_Emotional_Resonance_in_Gabriel_Okaras_The_Piano_and_Th...Sensory_Experience_and_Emotional_Resonance_in_Gabriel_Okaras_The_Piano_and_Th...
Sensory_Experience_and_Emotional_Resonance_in_Gabriel_Okaras_The_Piano_and_Th...
 
Accessible Digital Futures project (20/03/2024)
Accessible Digital Futures project (20/03/2024)Accessible Digital Futures project (20/03/2024)
Accessible Digital Futures project (20/03/2024)
 
SKILL OF INTRODUCING THE LESSON MICRO SKILLS.pptx
SKILL OF INTRODUCING THE LESSON MICRO SKILLS.pptxSKILL OF INTRODUCING THE LESSON MICRO SKILLS.pptx
SKILL OF INTRODUCING THE LESSON MICRO SKILLS.pptx
 
Python Notes for mca i year students osmania university.docx
Python Notes for mca i year students osmania university.docxPython Notes for mca i year students osmania university.docx
Python Notes for mca i year students osmania university.docx
 
Interdisciplinary_Insights_Data_Collection_Methods.pptx
Interdisciplinary_Insights_Data_Collection_Methods.pptxInterdisciplinary_Insights_Data_Collection_Methods.pptx
Interdisciplinary_Insights_Data_Collection_Methods.pptx
 
Application orientated numerical on hev.ppt
Application orientated numerical on hev.pptApplication orientated numerical on hev.ppt
Application orientated numerical on hev.ppt
 
Holdier Curriculum Vitae (April 2024).pdf
Holdier Curriculum Vitae (April 2024).pdfHoldier Curriculum Vitae (April 2024).pdf
Holdier Curriculum Vitae (April 2024).pdf
 
How to Give a Domain for a Field in Odoo 17
How to Give a Domain for a Field in Odoo 17How to Give a Domain for a Field in Odoo 17
How to Give a Domain for a Field in Odoo 17
 
Beyond_Borders_Understanding_Anime_and_Manga_Fandom_A_Comprehensive_Audience_...
Beyond_Borders_Understanding_Anime_and_Manga_Fandom_A_Comprehensive_Audience_...Beyond_Borders_Understanding_Anime_and_Manga_Fandom_A_Comprehensive_Audience_...
Beyond_Borders_Understanding_Anime_and_Manga_Fandom_A_Comprehensive_Audience_...
 
Towards a code of practice for AI in AT.pptx
Towards a code of practice for AI in AT.pptxTowards a code of practice for AI in AT.pptx
Towards a code of practice for AI in AT.pptx
 
Understanding Accommodations and Modifications
Understanding  Accommodations and ModificationsUnderstanding  Accommodations and Modifications
Understanding Accommodations and Modifications
 
Single or Multiple melodic lines structure
Single or Multiple melodic lines structureSingle or Multiple melodic lines structure
Single or Multiple melodic lines structure
 
Fostering Friendships - Enhancing Social Bonds in the Classroom
Fostering Friendships - Enhancing Social Bonds  in the ClassroomFostering Friendships - Enhancing Social Bonds  in the Classroom
Fostering Friendships - Enhancing Social Bonds in the Classroom
 
ICT role in 21st century education and it's challenges.
ICT role in 21st century education and it's challenges.ICT role in 21st century education and it's challenges.
ICT role in 21st century education and it's challenges.
 
On National Teacher Day, meet the 2024-25 Kenan Fellows
On National Teacher Day, meet the 2024-25 Kenan FellowsOn National Teacher Day, meet the 2024-25 Kenan Fellows
On National Teacher Day, meet the 2024-25 Kenan Fellows
 
UGC NET Paper 1 Mathematical Reasoning & Aptitude.pdf
UGC NET Paper 1 Mathematical Reasoning & Aptitude.pdfUGC NET Paper 1 Mathematical Reasoning & Aptitude.pdf
UGC NET Paper 1 Mathematical Reasoning & Aptitude.pdf
 
SOC 101 Demonstration of Learning Presentation
SOC 101 Demonstration of Learning PresentationSOC 101 Demonstration of Learning Presentation
SOC 101 Demonstration of Learning Presentation
 
2024-NATIONAL-LEARNING-CAMP-AND-OTHER.pptx
2024-NATIONAL-LEARNING-CAMP-AND-OTHER.pptx2024-NATIONAL-LEARNING-CAMP-AND-OTHER.pptx
2024-NATIONAL-LEARNING-CAMP-AND-OTHER.pptx
 

Csc1401 lecture03 - computer arithmetic - arithmetic and logic unit (alu)

  • 1. Madam Raini Hassan Office: C5 - 23, Level 5, KICT Building Department: Computer Science Emails: hrai@iium.edu.my, hraini.iii@gmail.com 1Semester II 2014/2015
  • 2. Du’a for Study Semester II 2014/2015 2
  • 4. Arithmetic & Logic Unit (ALU) • Part of the computer that actually performs arithmetic and logical operations on data • All of the other elements of the computer system are there mainly to bring data into the ALU for it to process and then to take the results back out • Based on the use of simple digital logic devices that can store binary digits and perform simple Boolean logic operations
  • 5. ALU Inputs and Outputs
  • 6. Integer Representations • In the binary number system arbitrary numbers can be represented with: – The digits zero and one – The minus sign (for negative numbers) – The period, or radix point (for numbers with a fractional component) – For purposes of computer storage and processing we do not have the benefit of special symbols for the minus sign and radix point – Only binary digits (0,1) may be used to represent numbers
  • 7. Integer Representations • There are 4 commonly known (1 not common) integer representations. • All have been used at various times for various reasons. 1. Unsigned 2. Sign Magnitude 3. One’s Complement 4. Two’s Complement 5. Biased (not commonly known)
  • 8. 1. Unsigned • The standard binary encoding already given. • Only positive value. • Range: 0 to ((2 to the power of N bits) – 1) • Example: 4 bits; (2ˆ4)-1 = 16-1 = values 0 to 15 Semester II 2014/2015 8
  • 10. 2. Sign-Magnitude There are several alternative conventions used to represent negative as well as positive integers Sign-magnitude representation is the simplest form that employs a sign bit Drawbacks: Because of these drawbacks, sign- magnitude representation is rarely used in implementing the integer portion of the ALU • All of these alternatives involve treating the most significant (leftmost) bit in the word as a sign bit • If the sign bit is 0 the number is positive • If the sign bit is 1 the number is negative • Addition and subtraction require a consideration of both the signs of the numbers and their relative magnitudes to carry out the required operation • There are two representations of 0
  • 11. 2. Sign-Magnitude (Cont’d.) • It is a human readable way of getting both positive and negative integers. • The hardware that does arithmetic on sign magnitude integers. • Not fast. 2-11
  • 12. 2. Sign-Magnitude (Cont’d.) • Left most bit is sign bit • 0 means positive • 1 means negative • +18 = 00010010 • -18 = 10010010 2-12
  • 13. 3. One’s Complement • Used to get two’s complement integers. • Nowadays, it is not being applied to any of the machines. • Stated in this slide for historical purpose. Semester II 2014/2015 13
  • 14. 4. Two’s Complement • Uses the most significant bit as a sign bit • Differs from sign-magnitude representation in the way that the other bits are interpreted Table 10.1 Characteristics of Twos Complement Representation and Arithmetic
  • 15. 5. Biased • an integer representation that skews the bit patterns so as to look just like unsigned but actually represent negative numbers. Semester II 2014/2015 15
  • 17. Range Extension – Range of numbers that can be expressed is extended by increasing the bit length – In sign-magnitude notation this is accomplished by moving the sign bit to the new leftmost position and fill in with zeros – This procedure will not work for twos complement negative integers – Rule is to move the sign bit to the new leftmost position and fill in with copies of the sign bit – For positive numbers, fill in with zeros, and for negative numbers, fill in with ones – This is called sign extension
  • 18. Range of Numbers • 8 bit 2s complement – +127 = 01111111 = 27 -1 – -128 = 10000000 = -27 • 16 bit 2s complement – +32767 = 011111111 11111111 = 215 - 1 – -32768 = 100000000 00000000 = -215 2-18
  • 19. Negation • Twos complement operation – Take the Boolean complement of each bit of the integer (including the sign bit) – Treating the result as an unsigned binary integer, add 1 – The negative of the negative of that number is itself: +18 = 00010010 (twos complement) bitwise complement = 11101101 + 1 11101110 = -18 -18 = 11101110 (twos complement) bitwise complement = 00010001 + 1 00010010 = +18
  • 20. Negation Special Case 1 0 = 00000000 (twos complement) Bitwise complement = 11111111 Add 1 to LSB + 1 Result 100000000 Overflow is ignored, so: - 0 = 0
  • 21. Negation Special Case 2 -128 = 10000000 (twos complement) Bitwise complement = 01111111 Add 1 to LSB + 1 Result 10000000 So: -(-128) = -128 X Monitor MSB (sign bit) It should change during negation
  • 22. OVERFLOW RULE: If two numbers are added, and they are both positive or both negative, then overflow occurs if and only if the result has the opposite sign.
  • 24. SUBTRACTION RULE: To subtract one number (subtrahend) from another (minuend), take the twos complement (negation) of the subtrahend and add it to the minuend.
  • 26. Geometric Depiction of Twos Complement Integers
  • 27. Hardware for Addition and Subtraction
  • 33.
  • 36. Example of Restoring Twos Complement Division
  • 37. + Floating-Point Representation • With a fixed-point notation it is possible to represent a range of positive and negative integers centered on or near 0 • By assuming a fixed binary or radix point, this format allows the representation of numbers with a fractional component as well • Limitations: – Very large numbers cannot be represented nor can very small fractions – The fractional part of the quotient in a division of two large numbers could be lost Principles
  • 39. + Floating-Point • The final portion of the word • Any floating-point number can be expressed in many ways • Normal number – The most significant digit of the significand is nonzero Significand The following are equivalent, where the significand is expressed in binary form: 0.110 * 25 110 * 22 0.0110 * 26
  • 40. IEEE Standard 754 Most important floating-point representation is defined Standard was developed to facilitate the portability of programs from one processor to another and to encourage the development of sophisticated, numerically oriented programs Standard has been widely adopted and is used on virtually all contemporary processors and arithmetic coprocessors IEEE 754-2008 covers both binary and decimal floating- point representations