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Microprocessor
8086 Architecture

           Eng. Mustafa H. Salah
        Mechatronics Engineering
    University for Electronic Technology
Bus interface




                                   Microprocessor 8086 Architecture
                 Unit BIU
Execution Unit   Fetches
      EU         Opcodes, Read
                 Operands, Write
                 Data




                                                           -
Microprocessor 8086 Architecture
-
BIU   Bus interface Unit          •




                                      Microprocessor 8086 Architecture
         "EU« (Execution Unit )   •



                       Data Bus   •
                   Address Bus    •
       Control signals Bus        •                           -
Bus Interface Unit




                                 BIU




                                           Microprocessor 8086 Architecture
            Segment registers          •
                 Address Adder         •
       Instruction Queue               •

                                                                   -
Execution Unit



                         ALU     •




                                     Microprocessor 8086 Architecture
    Flag or Statues Register     •
General Purpose Registers        •
           Temporary Registers   •
         EU control System       •

                                                             -
EU
                                       EU




                 EU
                                        BIU
                                              EU
                                               BIU




    Microprocessor 8086 Architecture
-
Bus
             DATA BUS   •
bit

         ADDRESS BUS    •




                            Microprocessor 8086 Architecture
bit


      CONTROL BUS       •

                                                    -
Data Bus                 BIU                •

           Control Bus               Address Bus

                                          BIU          •




                                                           Microprocessor 8086 Architecture
                         Instruction queue



First In

                      FIFO                 first Out                               -
BIU




BIU
                                               EU




                      EU
                                         CPU


                      •
                                               •




-




      Microprocessor 8086 Architecture
Registers


   CSR,DSR,SSR,ESR        •




                              Microprocessor 8086 Architecture
   SI,DI,BP,SP            •
AX,BX,CX,DX               •
                     IP   •

                                           -
Segment Registers
2 Bytes   16 bit

    Code Segment Register CSR   .1




                                     Microprocessor 8086 Architecture
   Data Segment Register DSR    .2



                                                  -
Stack Segment Register SSR   .3




                                       Microprocessor 8086 Architecture
Extra Segment Register ESR        .4




                                                    -
00000h

15        0
              CS
     CS
     DS




                              Microprocessor 8086 Architecture
                      64 KB
              DS
     SS
     ES       SS



               ES                          -


                    FFFFFh
DS
                             Source Index Register SI




-




    Microprocessor 8086 Architecture
Destination Index Register DI

ES

                          DI




                                     Microprocessor 8086 Architecture
                                                  -
Stack Pointer Register SP



                       SP




                                      Microprocessor 8086 Architecture
                            SP   SS



                                                   -
SS
                                            Base Pointer BP




-




    Microprocessor 8086 Architecture
AX         Accumulator




                          Microprocessor 8086 Architecture
     BX          Base

      CX          Count

     DX          Data
                                       -
AL

                   BH
                                       H,L
                                             X



                                 L

                   H




-




    Microprocessor 8086 Architecture
-




    Microprocessor 8086 Architecture
IP
                                             Instruction Pointer IP


                                       BIU




-




    Microprocessor 8086 Architecture
Status (Flags) Register


         11 10   9    8    7    6    4    2    0
         OF DF   IF   TF   SF   ZF   AF   PF   CF




                                                    Microprocessor 8086 Architecture
           CF, PF, AF, ZF, SF, OF

                  DF, IF, TF                                     -
Reset
                                                  Set



                                Carry Flag (CF)




-




    Microprocessor 8086 Architecture
7




    CF=1
                                              CF=1




-




           Microprocessor 8086 Architecture
1
                                7
                                       CF=1




-




    Microprocessor 8086 Architecture
Parity Flag (PF)




                          PF




-




    Microprocessor 8086 Architecture
Auxiliary Flag (AF)




                     AF=0
                              AF=1




-




    Microprocessor 8086 Architecture
7
                                           AF=0




-




    Microprocessor 8086 Architecture
Zero Flag (ZF)




-




    Microprocessor 8086 Architecture
Sign Flag (SF)


                                       Reset
                                               Set




    SF
                                       SF
                                               SF




-




    Microprocessor 8086 Architecture
OF
                                            Overflow Flag (OF)




-




    Microprocessor 8086 Architecture
CF




               ZF=1



-




    Microprocessor 8086 Architecture
Trap Flag (TF)




                      Microprocessor 8086 Architecture
Interrupt Flag (IF)




                                   -
Direction Flag (DF)




-




    Microprocessor 8086 Architecture
-




    Microprocessor 8086 Architecture

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02 architecture

  • 1. Microprocessor 8086 Architecture Eng. Mustafa H. Salah Mechatronics Engineering University for Electronic Technology
  • 2. Bus interface Microprocessor 8086 Architecture Unit BIU Execution Unit Fetches EU Opcodes, Read Operands, Write Data -
  • 4. BIU Bus interface Unit • Microprocessor 8086 Architecture "EU« (Execution Unit ) • Data Bus • Address Bus • Control signals Bus • -
  • 5. Bus Interface Unit BIU Microprocessor 8086 Architecture Segment registers • Address Adder • Instruction Queue • -
  • 6. Execution Unit ALU • Microprocessor 8086 Architecture Flag or Statues Register • General Purpose Registers • Temporary Registers • EU control System • -
  • 7. EU EU EU BIU EU BIU Microprocessor 8086 Architecture -
  • 8. Bus DATA BUS • bit ADDRESS BUS • Microprocessor 8086 Architecture bit CONTROL BUS • -
  • 9. Data Bus BIU • Control Bus Address Bus BIU • Microprocessor 8086 Architecture Instruction queue First In FIFO first Out -
  • 10. BIU BIU EU EU CPU • • - Microprocessor 8086 Architecture
  • 11. Registers CSR,DSR,SSR,ESR • Microprocessor 8086 Architecture SI,DI,BP,SP • AX,BX,CX,DX • IP • -
  • 12. Segment Registers 2 Bytes 16 bit Code Segment Register CSR .1 Microprocessor 8086 Architecture Data Segment Register DSR .2 -
  • 13. Stack Segment Register SSR .3 Microprocessor 8086 Architecture Extra Segment Register ESR .4 -
  • 14. 00000h 15 0 CS CS DS Microprocessor 8086 Architecture 64 KB DS SS ES SS ES - FFFFFh
  • 15. DS Source Index Register SI - Microprocessor 8086 Architecture
  • 16. Destination Index Register DI ES DI Microprocessor 8086 Architecture -
  • 17. Stack Pointer Register SP SP Microprocessor 8086 Architecture SP SS -
  • 18. SS Base Pointer BP - Microprocessor 8086 Architecture
  • 19. AX Accumulator Microprocessor 8086 Architecture BX Base CX Count DX Data -
  • 20. AL BH H,L X L H - Microprocessor 8086 Architecture
  • 21. - Microprocessor 8086 Architecture
  • 22. IP Instruction Pointer IP BIU - Microprocessor 8086 Architecture
  • 23. Status (Flags) Register 11 10 9 8 7 6 4 2 0 OF DF IF TF SF ZF AF PF CF Microprocessor 8086 Architecture CF, PF, AF, ZF, SF, OF DF, IF, TF -
  • 24. Reset Set Carry Flag (CF) - Microprocessor 8086 Architecture
  • 25. 7 CF=1 CF=1 - Microprocessor 8086 Architecture
  • 26. 1 7 CF=1 - Microprocessor 8086 Architecture
  • 27. Parity Flag (PF) PF - Microprocessor 8086 Architecture
  • 28. Auxiliary Flag (AF) AF=0 AF=1 - Microprocessor 8086 Architecture
  • 29. 7 AF=0 - Microprocessor 8086 Architecture
  • 30. Zero Flag (ZF) - Microprocessor 8086 Architecture
  • 31. Sign Flag (SF) Reset Set SF SF SF - Microprocessor 8086 Architecture
  • 32. OF Overflow Flag (OF) - Microprocessor 8086 Architecture
  • 33. CF ZF=1 - Microprocessor 8086 Architecture
  • 34. Trap Flag (TF) Microprocessor 8086 Architecture Interrupt Flag (IF) -
  • 35. Direction Flag (DF) - Microprocessor 8086 Architecture
  • 36. - Microprocessor 8086 Architecture