The document discusses AMD's "Pacifica" virtualization technology. It provides an overview of virtualization and its benefits. It then describes key aspects of Pacifica, including new virtual machine run instructions, intercepts, virtual machine control blocks, address translation using shadow page tables, interrupt handling, system management mode, and DMA protection. The goal of Pacifica is to improve virtualization performance and security on AMD64 CPUs through hardware assistance.

1. Virtualization Technology For AMD Architecture Steve McDowell Division Marketing Manager Computation Products Group AMD steven.mcdowell @ amd.com Geoffrey Strongin Platform Security Architect Computation Products Group AMD geoffrey.strongin @ amd.com

4. Virtualization Virtualization is the pooling and abstraction of resources in a way that masks the physical nature and boundaries of those resources from the resource users

11. Core “Pacifica” Architecture

15. Core “Pacifica” Architecture Address translation: Page Tables Page Tables or Directories If this is a “Guest Physical” it must be translated to “Host Physical” via the host page tables when nested paging is enabled Input Linear/Virtual Address (LA,VA) Final Host or Guest Physical Address CR3 (Physical Address) Guest or Host Physical Address of next table

16. Core “Pacifica” Architecture Address translation: Modes with virtualization

21. Core “Pacifica” Architecture Containerized SMM flow Top: … VMMRUN [rAX] … (Examine Exit Code) … If external SMM (Setup SMM save state) VMRUN [rAX] … Loop Top Host Inst 1 Inst 2 SMI Guest RSM SMM Entry Point SMM Code SMM Save State SMI Intercept RSM Intercept