SlideShare une entreprise Scribd logo
1  sur  14
Formidable Engineering Consultants
Introduction Neil G. Jacobson, Principal B.A.Sc. Engineering Science M.S.E.E. Computer Architecture IEEE and JEDEC Standards Development Chair, IEEE Std 1532 20+ Years Experience Xilinx, Daisy Systems, CrossCheck Technology Data Domain, SageN Research, TI, Intellitech 32 Patents Awarded Author: The In-System Configuration Handbook – A Designer’s Guide to ISC
Specialties Software Design & Development Intellectual Property Analysis Program Management Training & Education
Software Development Complex to Simple Desktop Applications Embedded Software Platform & Environment Experience Windows, Linux C, C++, Java, Tcl, Perl, XML ARM, MSP430
Intellectual Property Analysis Patent Analysis Claim Chart Development Expert Witness
Program Management Technical & Personnel Management  Leadership and Guidance of Cross-Functional, Complex HW/SW Projects
Training & Education Curriculum Development Classroom Presentation
Appendix
Design Automation Logic Simulation Fault Simulation Testability Analysis Triple Modular Redundancy Statistical SEU Analysis
Test Automation Boundary-Scan and associated test technologies IEEE Std 1149.1 IEEE Std 1149.5 IEEE Std 1149.6 IEEE Std 1149.7 IEEE Std P1600 SVF XSVF STAPL
Programmable Systems In-System Configuration IEEE Std 1532 STAPL SVF XSVF
FPGA Software Triple Module Redundancy Developed, Enhanced, Maintained and Managed Xilinx’s TMRTool application for 5 years Desktop Application, Written in C++ Based on XAPP197 “TMR Design Techniques” Automate design triplication and voter insertion for FPGA netlists Support for custom macros Support for a variety of triplication strategies
FPGA Software SEU Estimation Developed, Enhanced, Maintained and Managed Xilinx’s Cosmic application for 3 years SEU FIT rate calculation estimator Process design database to determine utilization, search for and identify critical bits, estimate FIT rate for design
FPGA Software In-System Configuration Software & Techniques Remote Configuration Software & Techniques Chair IEEE Std 1532 Member IEEE Std 1149.1 (JTAG)

Contenu connexe

Tendances (17)

Resume_Akshay_Deshpande
Resume_Akshay_DeshpandeResume_Akshay_Deshpande
Resume_Akshay_Deshpande
 
Daniel Snyder Resume
Daniel Snyder ResumeDaniel Snyder Resume
Daniel Snyder Resume
 
SWETHA PAMUDURTHI CHANDRASEKHARRAJU
SWETHA  PAMUDURTHI  CHANDRASEKHARRAJUSWETHA  PAMUDURTHI  CHANDRASEKHARRAJU
SWETHA PAMUDURTHI CHANDRASEKHARRAJU
 
Resume
ResumeResume
Resume
 
Resume1.1
Resume1.1Resume1.1
Resume1.1
 
Updated_Resume_Jason_Balog
Updated_Resume_Jason_BalogUpdated_Resume_Jason_Balog
Updated_Resume_Jason_Balog
 
Resume-RituRanjanShrivastwa
Resume-RituRanjanShrivastwaResume-RituRanjanShrivastwa
Resume-RituRanjanShrivastwa
 
Anton Zorin - cv
Anton Zorin - cvAnton Zorin - cv
Anton Zorin - cv
 
Resume jim yu
Resume   jim yuResume   jim yu
Resume jim yu
 
Harshal-Govind3.0
Harshal-Govind3.0Harshal-Govind3.0
Harshal-Govind3.0
 
Rajas mhaskar resume2k19
Rajas mhaskar resume2k19Rajas mhaskar resume2k19
Rajas mhaskar resume2k19
 
Software analyst resume
Software analyst resumeSoftware analyst resume
Software analyst resume
 
Penglun_Li
Penglun_LiPenglun_Li
Penglun_Li
 
mohamed abubacker- linkedin
mohamed abubacker- linkedinmohamed abubacker- linkedin
mohamed abubacker- linkedin
 
Purvesh-Karkamkar
Purvesh-KarkamkarPurvesh-Karkamkar
Purvesh-Karkamkar
 
Arvind_Balakumar_Resume
Arvind_Balakumar_ResumeArvind_Balakumar_Resume
Arvind_Balakumar_Resume
 
Resume
ResumeResume
Resume
 

Similaire à Formidable Engineering Consultants

PARTH DESAI RESUME
PARTH DESAI RESUMEPARTH DESAI RESUME
PARTH DESAI RESUMEParth Desai
 
Kaushik_Sinha_Resume_Updated_1
Kaushik_Sinha_Resume_Updated_1Kaushik_Sinha_Resume_Updated_1
Kaushik_Sinha_Resume_Updated_1Kaushik Sinha
 
Software Architecture: introduction to the abstraction
Software Architecture: introduction to the abstractionSoftware Architecture: introduction to the abstraction
Software Architecture: introduction to the abstractionHenry Muccini
 
Simon Brown: Software Architecture as Code at I T.A.K.E. Unconference 2015
Simon Brown: Software Architecture as Code at I T.A.K.E. Unconference 2015Simon Brown: Software Architecture as Code at I T.A.K.E. Unconference 2015
Simon Brown: Software Architecture as Code at I T.A.K.E. Unconference 2015Mozaic Works
 
Michael_Joshua_Validation
Michael_Joshua_ValidationMichael_Joshua_Validation
Michael_Joshua_ValidationMichaelJoshua
 
XULEI-Resume
XULEI-ResumeXULEI-Resume
XULEI-ResumeXu Lei
 
XULEI-Resume
XULEI-ResumeXULEI-Resume
XULEI-ResumeXu Lei
 
CV Ranan Fraer Apr 2016
CV Ranan Fraer Apr 2016CV Ranan Fraer Apr 2016
CV Ranan Fraer Apr 2016Ranan Fraer
 
Krishna kv resume 2019
Krishna kv resume 2019Krishna kv resume 2019
Krishna kv resume 2019KrishnaKV8
 
Denis Abakumov - Software Developer
Denis Abakumov - Software DeveloperDenis Abakumov - Software Developer
Denis Abakumov - Software DeveloperDenis Abakumov
 
Brian muirhead v1-27-12
Brian muirhead v1-27-12Brian muirhead v1-27-12
Brian muirhead v1-27-12NASAPMC
 

Similaire à Formidable Engineering Consultants (20)

PARTH DESAI RESUME
PARTH DESAI RESUMEPARTH DESAI RESUME
PARTH DESAI RESUME
 
Kaushik_Sinha_Resume_Updated_1
Kaushik_Sinha_Resume_Updated_1Kaushik_Sinha_Resume_Updated_1
Kaushik_Sinha_Resume_Updated_1
 
SrinivasaVithal_CV
SrinivasaVithal_CVSrinivasaVithal_CV
SrinivasaVithal_CV
 
resume_v36
resume_v36resume_v36
resume_v36
 
Sw Software Design
Sw Software DesignSw Software Design
Sw Software Design
 
Software Architecture: introduction to the abstraction
Software Architecture: introduction to the abstractionSoftware Architecture: introduction to the abstraction
Software Architecture: introduction to the abstraction
 
kavita_resume_3
kavita_resume_3kavita_resume_3
kavita_resume_3
 
Simon Brown: Software Architecture as Code at I T.A.K.E. Unconference 2015
Simon Brown: Software Architecture as Code at I T.A.K.E. Unconference 2015Simon Brown: Software Architecture as Code at I T.A.K.E. Unconference 2015
Simon Brown: Software Architecture as Code at I T.A.K.E. Unconference 2015
 
Michael_Joshua_Validation
Michael_Joshua_ValidationMichael_Joshua_Validation
Michael_Joshua_Validation
 
resume
resumeresume
resume
 
XULEI-Resume
XULEI-ResumeXULEI-Resume
XULEI-Resume
 
XULEI-Resume
XULEI-ResumeXULEI-Resume
XULEI-Resume
 
Sarvesh_kumar
Sarvesh_kumarSarvesh_kumar
Sarvesh_kumar
 
intro.pptx
intro.pptxintro.pptx
intro.pptx
 
Vsts intro
Vsts introVsts intro
Vsts intro
 
CV Ranan Fraer Apr 2016
CV Ranan Fraer Apr 2016CV Ranan Fraer Apr 2016
CV Ranan Fraer Apr 2016
 
Krishna kv resume 2019
Krishna kv resume 2019Krishna kv resume 2019
Krishna kv resume 2019
 
Resume150721
Resume150721Resume150721
Resume150721
 
Denis Abakumov - Software Developer
Denis Abakumov - Software DeveloperDenis Abakumov - Software Developer
Denis Abakumov - Software Developer
 
Brian muirhead v1-27-12
Brian muirhead v1-27-12Brian muirhead v1-27-12
Brian muirhead v1-27-12
 

Formidable Engineering Consultants

  • 2. Introduction Neil G. Jacobson, Principal B.A.Sc. Engineering Science M.S.E.E. Computer Architecture IEEE and JEDEC Standards Development Chair, IEEE Std 1532 20+ Years Experience Xilinx, Daisy Systems, CrossCheck Technology Data Domain, SageN Research, TI, Intellitech 32 Patents Awarded Author: The In-System Configuration Handbook – A Designer’s Guide to ISC
  • 3. Specialties Software Design & Development Intellectual Property Analysis Program Management Training & Education
  • 4. Software Development Complex to Simple Desktop Applications Embedded Software Platform & Environment Experience Windows, Linux C, C++, Java, Tcl, Perl, XML ARM, MSP430
  • 5. Intellectual Property Analysis Patent Analysis Claim Chart Development Expert Witness
  • 6. Program Management Technical & Personnel Management Leadership and Guidance of Cross-Functional, Complex HW/SW Projects
  • 7. Training & Education Curriculum Development Classroom Presentation
  • 9. Design Automation Logic Simulation Fault Simulation Testability Analysis Triple Modular Redundancy Statistical SEU Analysis
  • 10. Test Automation Boundary-Scan and associated test technologies IEEE Std 1149.1 IEEE Std 1149.5 IEEE Std 1149.6 IEEE Std 1149.7 IEEE Std P1600 SVF XSVF STAPL
  • 11. Programmable Systems In-System Configuration IEEE Std 1532 STAPL SVF XSVF
  • 12. FPGA Software Triple Module Redundancy Developed, Enhanced, Maintained and Managed Xilinx’s TMRTool application for 5 years Desktop Application, Written in C++ Based on XAPP197 “TMR Design Techniques” Automate design triplication and voter insertion for FPGA netlists Support for custom macros Support for a variety of triplication strategies
  • 13. FPGA Software SEU Estimation Developed, Enhanced, Maintained and Managed Xilinx’s Cosmic application for 3 years SEU FIT rate calculation estimator Process design database to determine utilization, search for and identify critical bits, estimate FIT rate for design
  • 14. FPGA Software In-System Configuration Software & Techniques Remote Configuration Software & Techniques Chair IEEE Std 1532 Member IEEE Std 1149.1 (JTAG)