Tata AIG General Insurance Company - Insurer Innovation Award 2024
Predictive And Experimental Hardware Robustness Evaluation Hp Seminar 1997
1. Predictive versus Experimental
Approach for the Evaluation of Global
Robustness of Digital Apparatus
Piero Belforte, Paolo Fogliati
Luca Giacomello, Flavio Maggioni CSELT
Luigi Bragagnini Hewlett Packard
Carla Giachino, Emmanuel Leroux High Design Technology
Flavio Canavero Polytechnic of Turin
2. Outline
• Hardware robustness issues
• Tool requirements for testing hardware robustness
• Validation requirements for predictive tools
• The THRIS environment
• Validation examples
• THRIS application examples
4. Signal Integrity
• Most critical to manage:
– modeling for high speed/EMI
– simultaneous switching noise
• Less critical to manage:
– ringing/reflection control
– propagation delay evaluation
– crosstalk control
References:
A High-Performance Environment for Modelling and Simulation of Digital Systems - 1993 HP
High Speed Digital Systems Design & Test Symposium
Advanced Simulation and Modeling for Telecom System Hardware Design - 1994 HP
ATM/Broadband Design Symposium
5. Fault Insertion / Noise Injection
Fault Insertion: is a procedure to verify the behavior of an apparatus
in case of hardware faults
Noise Injection: is a procedure to verify noise margins within the
apparatus
– Typical procedure for physical fault insertion:
• put the system in normal operation
• introduce the fault: verify the system behavior (alarms, reconfiguration, etc)
• remove the fault: verify the system behavior (manual/automatic recovery)
6. Hardware Reliability Prediction
A “parts count” methodology applicable at early stage
“Early” evaluation of the project, for reliability fast predictions
Prediction methodology applicable to existing
Accurate prediction products, when complete data about electronic
devices used in the system are available in the CAD
environment
7. Requirements for a Reliable SI/EMI
Simulation
• Accurate modelling techniques
• Real exploitability of the simulation tool:
• powerful simulation engine (speed and complexity
management)
• integrability in the design flow
• customizability
• Experimental validation
8. Accurate Modelling
A good prediction requires accurate models of components
Data supported by Enough for low-speed
IBIS standard (< 100MHz) applications
IBIS
+ Necessary for high-speed
( > 100MHz), EMI
BTM*
* BTM= Behavioral Time Modelling
9. Why Accurate Models are
Required for EMI Prediction?
Driver waveform spectrum Radiated spectrum
10. Requirements of the Simulation Tool
• Simulation speed
• Taking into account all the effects at the same time
• Customizability and customer support
• Transparency on the applied methods
11. Requirements for EMI aspects
• Adequate validation environment
• Knowledge of the physical basis of the predictive algorythm
adopted inside the software
• Knowledge of the occurring EM phenomena
12. Considerations on the Choice of the
EMI Prediction Method
complex PCB configurations SIMPLIFIED
can be idealized and analyzed BUT models leads to
with efficient methods in the approximations
spectral domain
RIGOROUS models require
simple PCB configurations
can be fully analyzed with long computational times
BUT
rigorous 3D full-wave and are difficult to extend
methods as MoM, FDTD, to complex situations
finite elements method
13. Considerations on the Choice of the
Method: Possible Solution
A unique method is Solution adopted;
not available yet HYBRID METHOD
Analytical formulation
where enough Good trade-off
between accuracy
Numerical method ( PEEC) and simulation time
where necessary
14. Knowledge of the Occurring Phenomena When
Comparing Simulated and Measured Radiated Field
knowledge of the
simulation algorithms limitations
Definition of the best experience of
simulation setups
+ the designer
evaluation of the systematic errors of the simulation
19. SAC Performance
Measured NSA
THEORETICAL NSA OF AN IDEAL SITE SAC MEASURED NSA
NSA 5
30 4
25 3
20
2
15
1
10
DEVIATION[dB]
5
0
0 -1
-5 -2
- 10 -3
- 15 -4
- 20
-5
30 40 50 70 90 120 160 200 300 500 700 900
30 10
0 20
0 10
00
Frequency ( MHz )
F E UN YMz
R Q E C [ H]
20. Commonality Requirements
The tool must implement a common test
methodology for both manufacturers and their
clients
- design and integration tool for manufacturers
- incoming qualification and quality monitoring tool for clients
21.
22. THRIS
• Hardware/Software test environment
• Hardware: standard workstation, standard instrumentation.
Partner: HP
• Software: integration/customization of commercial software for both
predictive and experimental issues.
• Custom Front-end (CSELT patented)
• THRIS validation is performed in CSELT laboratories
• New specifications from THRIS User Group (TUG)
• During „97: New functionalities added (reliability,thermal,EMC)
25. Radiated Emission Tool Validation
(Test vehicle #1)
Line length = 20 cm
Line imped. = 50 ohm
Top view pcb thickness=1.6mm
Er = 4.5
PCB size = 20x30 cm
50 ohm coax cable
Connector
Bottom view Battery
pack
Termination
Ground plane Oscillator PCB
Copper tape
Shielded oscillator
26. ECL Oscillator Model
V
I
Logic “1”
Logic “0”
Constant R
zone
Varying R
zone
GND
Static VI characteristic S_param
STF DTF Vo
Package
Equivalent Thevenin
Output stage of the circuit of the driver
ECL driver
-0.85
-1
Dynamic characteristic
27. Validation of ECL Oscillator Model
120
1 2
S param. 100
simulation
80
Vo
dBuV/m
V(2) 50 measure
60
40
20
0
344
206,4
481,6
619,2
756,8
825,6
68,8
Electrical model
frequency [MHz]
of the ECL driver
Comparison between the spectra of
measured and simulated output
waveform V(2) of the ECL driver
with a 50ohm termination
35. Pin Forcing: Why Simulation is Needed
1 cm
Driver 3
R
7V e
Actual signal at location 1 6V c
and 2 in normal conditions 5V e
4V i
3V v
2V e
1V r
7V 0V s
-1 V 1
6V 0 10 20 30 40 50 60 2
5V TIME[nS]
location 2
4V 7V
3V location 1 6V location 1
2V 5V
1V 4V
0V 3V
-1 V 2 V location 2
0 10 20 30 40 50 60 1V
TIME[nS] 0V
-1 V
Residual noise measured at -2 V
0 10 20 30 40 50 60
location 1 and 2 when a THRIS TIME[nS]
stuck_at_0 is applied in 1
Actual signal at location 1 and 2
after one inverter stage
36. Pin Forcing: High Speed Systems
32 155Mbit/s 32 155Mbit/s
input streams output streams
Stage A Stage B Stage C
0.00 V
Fault
STM1 INPUT STREAM (155 Mbit/s)
Description: -1.30 V
3 Boards + backplane -2.00 V
0.00 V
32 155Mbit/s streams
6 16x16 switching matrices -1.30 V
FAULTY NODE (FIRST STAGE OUTPUT)
-2.00 V
0.00 V
THRIS simulation model: FAULTY OUTPUT STREAM
50000 circuit elements -1.30 V
35000 nodes -2.00 V
0.00 V
20000 timepoints OFF ON OFF ON
20‟ simulation time on typ. ws. FAULT CONTROL
-2.00 V
0.00 0.25 0.50 0.75 1.00 1.25 1.50 1.75 2.00
TIM E[uS]
37. Noise Injection: Noise Margin Evaluation
-0.5 V
Normal operation
-0.7 V
-0.9 V
5mA current injection
-0.5 V
-1.1 V
-0.7 V
-1.3 V
-1.5 V
-0.9 V
12mA current injection
-0.5 V
-1.1 V
-1.7 V
-0.7 V
-1.3 V
-1.9 V -0.9 V
-1.5 V
0.0 2.0 4.0 6.0 8.0 10.0 12.0
-1.1 V
TIME[nS]
-1.7 V
-1.3 V
-1.9 V
-1.5 V
0.0 2.0 4.0 6.0 8.0 10.0 12.0
N TIME[nS]
-1.7 V
ecl interconnection
-1.9 V
0.0 2.0 4.0 6.0 8.0 10.0 12.0
TIME[nS]
output testpoint
41. Conclusions
• EMI behavior of electronic equipment must be optimized in early design
stage. Simulation is the key.
• The simulation tool should be accurately validated versus measurements in
suitable site (e.g. accreditated EMC labs).
• Reliable EMI simulations require accurate SI models based on wide -band
measurements on components (e.g.: TDR, network analyzer, ecc).
• Measurements are still mandatory for the certification phase. If some
problems are detected, corrective actions can be experimented by means of
simulation (e.g. What-if analysis)
• Specific EMI measurements executed after installation can identify
problems due to the environment impact, even if the device under test has
been already certified.
42. THRIS Solutions
WHO BENEFITS
Designers, R&D Optimized design,
THRIS_SI engineers redesign cycle reduction
Hardware/software Increased tests
THRIS_IG system integration coverage,
engineers increased system level
robustness
THRIS_EMC Designers, R&D
engineers, EMC EMI problems found and
specialists fixed at design stage
43. THRIS Resources
THRIS_SI THRIS_IG THRIS_EMC
Workstation x x x
VEE x x
VXI, Front_end x
EMC instruments x
THRIS manager x x x
Fault insertion test suite x
Post-layout analysis package x x x
Crosstalk, bouncing analysis x
EMI radiated emissions analysis x
What-IF analysis opt. opt. opt.
Modeling development suite opt. opt.