SlideShare une entreprise Scribd logo
1  sur  81
Télécharger pour lire hors ligne
Satisfiability Modulo Theories
Lezione 2 - An Eager Approach: Solving Bit-Vectors
(slides revision: Saturday 14th
March, 2015, 11:46)
Roberto Bruttomesso
Seminario di Logica Matematica
(Corso Prof. Silvio Ghilardi)
27 Ottobre 2011
R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 1 / 27
Recall from last lecture . . .
Approaches to solve SMT formulæ are based on the observation that
SMT can be reduced to SAT, i.e., the purely Boolean Satisfiability
Problem
R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 2 / 27
Recall from last lecture . . .
Approaches to solve SMT formulæ are based on the observation that
SMT can be reduced to SAT, i.e., the purely Boolean Satisfiability
Problem
sat / unsat
SMT formula ϕ
ψ
Encoder SAT-solver
R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 2 / 27
Outline
1 Bit-Vectors
Syntax
Semantic
Examples
2 Solving Bit-Vectors
Bit-Blasting
Simplifications
R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 3 / 27
Introduction
Bit-Vectors are extremely useful data structures, used to symbolically
represent hardware and software constructs (see later)
R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 4 / 27
Introduction
Bit-Vectors are extremely useful data structures, used to symbolically
represent hardware and software constructs (see later)
The world of Bit-Vectors is a finite world, i.e., with Bit-Vectors it is
not possible to represent/handle arbitrarily large numbers
R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 4 / 27
Introduction
Bit-Vectors are extremely useful data structures, used to symbolically
represent hardware and software constructs (see later)
The world of Bit-Vectors is a finite world, i.e., with Bit-Vectors it is
not possible to represent/handle arbitrarily large numbers
Indeed, when speaking about Bit-Vectors we always associate a width
(which is usually a power of 2, often 32 or 64)
R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 4 / 27
Introduction
Bit-Vectors are extremely useful data structures, used to symbolically
represent hardware and software constructs (see later)
The world of Bit-Vectors is a finite world, i.e., with Bit-Vectors it is
not possible to represent/handle arbitrarily large numbers
Indeed, when speaking about Bit-Vectors we always associate a width
(which is usually a power of 2, often 32 or 64)
The width specifies the (maximum) number of bits used to represent
variables and terms
R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 4 / 27
Introduction
Bit-Vectors are extremely useful data structures, used to symbolically
represent hardware and software constructs (see later)
The world of Bit-Vectors is a finite world, i.e., with Bit-Vectors it is
not possible to represent/handle arbitrarily large numbers
Indeed, when speaking about Bit-Vectors we always associate a width
(which is usually a power of 2, often 32 or 64)
The width specifies the (maximum) number of bits used to represent
variables and terms
Bit-Vector formulæ are mathematically characterized by the theory of
Bit-Vectors BV
R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 4 / 27
Bit-Vectors
A bit-vector is an array of bits
0
1 1 0 0 1 1
a[3] b[3]
2 1 0 2 1
R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 5 / 27
Bit-Vectors
A bit-vector is an array of bits
0
1 1 0 0 1 1
a[3] b[3]
2 1 0 2 1
Selection (or Extraction): a[3][1 : 0]
1 0
1 0
R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 5 / 27
Bit-Vectors
A bit-vector is an array of bits
0
1 1 0 0 1 1
a[3] b[3]
2 1 0 2 1
Selection (or Extraction): a[3][1 : 0]
1 0
1 0
Notice that
a[n][i : j] returns a Bit-Vector of width i − j + 1 (0 ≤ j ≤ i ≤ n − 1)
R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 5 / 27
Bit-Vectors
A bit-vector is an array of bits
0
1 1 0 0 1 1
a[3] b[3]
2 1 0 2 1
Selection (or Extraction): a[3][1 : 0]
1 0
1 0
Notice that
a[n][i : j] returns a Bit-Vector of width i − j + 1 (0 ≤ j ≤ i ≤ n − 1)
a[n][n − 1 : 0]
R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 5 / 27
Bit-Vectors
A bit-vector is an array of bits
0
1 1 0 0 1 1
a[3] b[3]
2 1 0 2 1
Selection (or Extraction): a[3][1 : 0]
1 0
1 0
Notice that
a[n][i : j] returns a Bit-Vector of width i − j + 1 (0 ≤ j ≤ i ≤ n − 1)
a[n][n − 1 : 0] = a[n]
R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 5 / 27
Bit-Vectors
A bit-vector is an array of bits
0
1 1 0 0 1 1
a[3] b[3]
2 1 0 2 1
Selection (or Extraction): a[3][1 : 0]
1 0
1 0
Notice that
a[n][i : j] returns a Bit-Vector of width i − j + 1 (0 ≤ j ≤ i ≤ n − 1)
a[n][n − 1 : 0] = a[n]
Selection has precedence over any other operator
R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 5 / 27
Bit-Vectors
A bit-vector is an array of bits
0
1 1 0 0 1 1
a[3] b[3]
2 1 0 2 1
Concatenation a[3] :: b[3]
1 1 0
5 34
0 1 1
2 1 0
R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 6 / 27
Bit-Vectors
A bit-vector is an array of bits
0
1 1 0 0 1 1
a[3] b[3]
2 1 0 2 1
Concatenation a[3] :: b[3]
1 1 0
5 34
0 1 1
2 1 0
Notice that
a[n] :: b[m] returns a Bit-Vector of width n + m
R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 6 / 27
Bit-Vectors
A bit-vector is an array of bits
0
1 1 0 0 1 1
a[3] b[3]
2 1 0 2 1
Concatenation a[3] :: b[3]
1 1 0
5 34
0 1 1
2 1 0
Notice that
a[n] :: b[m] returns a Bit-Vector of width n + m
a[n][n − 1 : i] :: a[n][i − 1 : 0]
R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 6 / 27
Bit-Vectors
A bit-vector is an array of bits
0
1 1 0 0 1 1
a[3] b[3]
2 1 0 2 1
Concatenation a[3] :: b[3]
1 1 0
5 34
0 1 1
2 1 0
Notice that
a[n] :: b[m] returns a Bit-Vector of width n + m
a[n][n − 1 : i] :: a[n][i − 1 : 0] = a[n][n − 1 : 0]
R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 6 / 27
Bit-Vectors
A bit-vector is an array of bits
0
1 1 0 0 1 1
a[3] b[3]
2 1 0 2 1
Concatenation a[3] :: b[3]
1 1 0
5 34
0 1 1
2 1 0
Notice that
a[n] :: b[m] returns a Bit-Vector of width n + m
a[n][n − 1 : i] :: a[n][i − 1 : 0] = a[n][n − 1 : 0] = a[n]
R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 6 / 27
Bit-Vectors
A bit-vector is an array of bits
0
1 1 0 0 1 1
a[3] b[3]
2 1 0 2 1
Arithmetic a[3] + b[3]
0 0 1
2 1 0
1
R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 7 / 27
Bit-Vectors
A bit-vector is an array of bits
0
1 1 0 0 1 1
a[3] b[3]
2 1 0 2 1
Arithmetic a[3] + b[3]
0 0 1
2 1 0
1
Notice that
To be precise, we should have written a[3] +[3] b[3] (widths must be
the same)
Semantic is that of modular arithmetic
R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 7 / 27
Bit-Vectors
A bit-vector is an array of bits
0
1 1 0 0 1 1
a[3] b[3]
2 1 0 2 1
Bitwise a[3] AND b[3]
0 1 0
2 1 0
R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 8 / 27
Bit-Vectors
A bit-vector is an array of bits
0
1 1 0 0 1 1
a[3] b[3]
2 1 0 2 1
Bitwise a[3] AND b[3]
0 1 0
2 1 0
Notice that
Again, to be precise, we should have written a[3] AND [3]b[3]
(widths must be the same)
Used to compute bit-mask operations
R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 8 / 27
A (non-exhaustive) list of operators and predicates
Each Bit-Vector term of width n, is associated with a sort BV[n] (n ≥ 1)
R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 9 / 27
A (non-exhaustive) list of operators and predicates
Each Bit-Vector term of width n, is associated with a sort BV[n] (n ≥ 1)
Name Symb Type Signature
Selection [i : j]
Core
BV[n] → BV[i−j+1]
Concatenation :: BV[n] × BV[m] → BV[n+m]
Addition +
Arith.
BV[n] × BV[n] → BV[n]
Subtraction − BV[n] × BV[n] → BV[n]
Multiplication ∗ BV[n] × BV[n] → BV[n]
Less than (signed) <s BV[n] × BV[n] → Bool
Less than (unsigned) <u BV[n] × BV[n] → Bool
Bitwise and AND
Bitwise
BV[n] × BV[n] → BV[n]
Bitwise or OR BV[n] × BV[n] → BV[n]
Bitwise not NOT BV[n] → BV[n]
R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 9 / 27
A (non-exhaustive) list of operators and predicates
Each Bit-Vector term of width n, is associated with a sort BV[n] (n ≥ 1)
Name Symb Type Signature
Selection [i : j]
Core
BV[n] → BV[i−j+1]
Concatenation :: BV[n] × BV[m] → BV[n+m]
Addition +
Arith.
BV[n] × BV[n] → BV[n]
Subtraction − BV[n] × BV[n] → BV[n]
Multiplication ∗ BV[n] × BV[n] → BV[n]
Less than (signed) <s BV[n] × BV[n] → Bool
Less than (unsigned) <u BV[n] × BV[n] → Bool
Bitwise and AND
Bitwise
BV[n] × BV[n] → BV[n]
Bitwise or OR BV[n] × BV[n] → BV[n]
Bitwise not NOT BV[n] → BV[n]
Moreover, we have constants, e.g., 101101[6]
R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 9 / 27
Bit-Vector semantic
Each sort BV[n] is associated with a domain Dn = {0, 1, . . . , 2n−1}
R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 10 / 27
Bit-Vector semantic
Each sort BV[n] is associated with a domain Dn = {0, 1, . . . , 2n−1}
For example BV[4] is associated with D4 = {0, 1, . . . , 15}
R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 10 / 27
Bit-Vector semantic
Each sort BV[n] is associated with a domain Dn = {0, 1, . . . , 2n−1}
For example BV[4] is associated with D4 = {0, 1, . . . , 15}
As usual, the semantic for the other terms depends on a particular assignment to the
variables
R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 10 / 27
Bit-Vector semantic
Each sort BV[n] is associated with a domain Dn = {0, 1, . . . , 2n−1}
For example BV[4] is associated with D4 = {0, 1, . . . , 15}
As usual, the semantic for the other terms depends on a particular assignment to the
variables
Each variable x[n] is associated with a function [[x[n]]] of type Dn → {0, 1}
R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 10 / 27
Bit-Vector semantic
Each sort BV[n] is associated with a domain Dn = {0, 1, . . . , 2n−1}
For example BV[4] is associated with D4 = {0, 1, . . . , 15}
As usual, the semantic for the other terms depends on a particular assignment to the
variables
Each variable x[n] is associated with a function [[x[n]]] of type Dn → {0, 1}
[[x[3]]]: 1 0 0 0
2
1
0
1
[[x[3]]]:
nat3([[x[3]]]): 4
R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 10 / 27
Bit-Vector semantic
Each sort BV[n] is associated with a domain Dn = {0, 1, . . . , 2n−1}
For example BV[4] is associated with D4 = {0, 1, . . . , 15}
As usual, the semantic for the other terms depends on a particular assignment to the
variables
Each variable x[n] is associated with a function [[x[n]]] of type Dn → {0, 1}
[[x[3]]]: 1 0 0 0
2
1
0
1
[[x[3]]]:
nat3([[x[3]]]): 4
natn( ) is a helper meta-function, to facilitate the presentation
R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 10 / 27
Bit-Vector semantic
[[c[n]]] := λx ∈ [0, n − 1].
0 if the x-th bit is 0
1 otherwise
[[t[l] :: s[k]]] := λx ∈ [0, . . . , l + k − 1].
[[s[n]]](x) if x < l
[[t[n]]](x − l) otherwise
[[t[n][i : j]]] := λx ∈ [0, i − j + 1]. [[t[n]]](x + j)
[[t[n] + s[n]]] := nat−1
n (natn([[t[n]]]) + natn([[s[n]]])) % 2n
[[t[n] AND s[n]]] := λx ∈ [0, n − 1].



0 if [[t[n]]](x) = 0
0 if [[s[n]]](x) = 0
1 otherwise
[[t[n] <u s[n]]] :=
if natn([[t[n]]]) <u natn([[s[n]]])
⊥ otherwise
R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 11 / 27
Example 1: C code
Pseudo-code
i := 1
while ( i > 0 )
i := i + 1
R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 12 / 27
Example 1: C code
Pseudo-code
i := 1
while ( i > 0 )
i := i + 1
C equivalent
unsigned i = 1;
while ( i > 0 )
i = i + 1;
R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 12 / 27
Example 2: C code
Evaluation of BV[32] with C
unsigned a = 0xFFFF0000;
unsigned b = 0x0000FFFF;
printf( "a + b : %8Xn", a + b );
printf( "a * b : %8Xn", a * b );
printf( "a AND b : %8Xn", a & b );
printf( "a OR b : %8Xn", a | b );
R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 13 / 27
Example 3: Circuit
module counter(clk, count);
input clk ;
output [2:0] count ;
wire cin ;
reg [2:0] count ;
assign cin = ~count [0] & ~count [1] & ~count [2];
initial begin
count = 3’b0;
end
always @ ( posedge clk )
begin
count [0] <= cin;
count [1] <= count [0];
count [2] <= count [1];
end
end module
100000 001 010
R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 14 / 27
Outline
1 Bit-Vectors
Syntax
Semantic
Examples
2 Solving Bit-Vectors
Bit-Blasting
Simplifications
R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 15 / 27
Bit-Blasting
Our goal is to devise an automatic decision procedure (SMT-solver) to
check the satisfiability of a given Bit-Vector formula
R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 16 / 27
Bit-Blasting
Our goal is to devise an automatic decision procedure (SMT-solver) to
check the satisfiability of a given Bit-Vector formula
State-of-the-art techniques are based on reduction to SAT. It is called
bit-blasting
R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 16 / 27
Bit-Blasting
Our goal is to devise an automatic decision procedure (SMT-solver) to
check the satisfiability of a given Bit-Vector formula
State-of-the-art techniques are based on reduction to SAT. It is called
bit-blasting
the formula is seen as a circuit, in which variables and constants
are inputs, while other terms are intermediate nodes. The
outermost Boolean connective or predicate represents the output
R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 16 / 27
Bit-Blasting
Our goal is to devise an automatic decision procedure (SMT-solver) to
check the satisfiability of a given Bit-Vector formula
State-of-the-art techniques are based on reduction to SAT. It is called
bit-blasting
the formula is seen as a circuit, in which variables and constants
are inputs, while other terms are intermediate nodes. The
outermost Boolean connective or predicate represents the output
each variable is assigned to a vector of Boolean variables (n
variables for a variable of sort BV[n])
R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 16 / 27
Bit-Blasting
Our goal is to devise an automatic decision procedure (SMT-solver) to
check the satisfiability of a given Bit-Vector formula
State-of-the-art techniques are based on reduction to SAT. It is called
bit-blasting
the formula is seen as a circuit, in which variables and constants
are inputs, while other terms are intermediate nodes. The
outermost Boolean connective or predicate represents the output
each variable is assigned to a vector of Boolean variables (n
variables for a variable of sort BV[n])
each intermediate node is assigned to a vector of Boolean formulæ
(n formulæ for a term of sort BV[n])
R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 16 / 27
Bit-Blasting
(a[2] AND b[4][1 : 0]) = (c[2] + d[2])
[1 : 0]
+
=
AND
out[1]
int3[2]int2[2]
int1[2]
d[2]c[2]b[4]a[2]
R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 17 / 27
Bit-Blasting
(a[2] AND b[4][1 : 0]) = (c[2] + d[2])
[1 : 0]
a1
a0
+
=
AND
out[1]
int3[2]int2[2]
int1[2]
d[2]c[2]b[4]
R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 17 / 27
Bit-Blasting
(a[2] AND b[4][1 : 0]) = (c[2] + d[2])
[1 : 0]
a1
a0
b3
b2
b1
b0
+
=
AND
out[1]
int3[2]int2[2]
int1[2]
d[2]c[2]
R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 17 / 27
Bit-Blasting
(a[2] AND b[4][1 : 0]) = (c[2] + d[2])
[1 : 0]
a1
a0
b3
b2
b1
b0
c1
c0
+
=
AND
out[1]
int3[2]int2[2]
int1[2]
d[2]
R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 17 / 27
Bit-Blasting
(a[2] AND b[4][1 : 0]) = (c[2] + d[2])
[1 : 0]
a1
a0
b3
b2
b1
b0
c1
c0
d1
d0
+
=
AND
out[1]
int3[2]int2[2]
int1[2]
R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 17 / 27
Bit-Blasting
(a[2] AND b[4][1 : 0]) = (c[2] + d[2])
[1 : 0]
a1
a0
b3
b2
b1
b0
c1
c0
d1
d0
+
=
b1
b0
AND
out[1]
int3[2]int2[2]
R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 17 / 27
Bit-Blasting
(a[2] AND b[4][1 : 0]) = (c[2] + d[2])
[1 : 0]
a1
a0
b3
b2
b1
b0
c1
c0
d1
d0
+
=
b1
b0
b1
∧ a1
b0
∧ a0
AND
out[1]
int3[2]
R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 17 / 27
Bit-Blasting
(a[2] AND b[4][1 : 0]) = (c[2] + d[2])
[1 : 0]
a1
a0
b3
b2
b1
b0
c1
c0
d1
d0
+
=
b1
b0
c0
⊕ d0
c1
⊕ d1
⊕
(c0
∧ d0
)b1
∧ a1
b0
∧ a0
AND
out[1]
R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 17 / 27
Bit-Blasting
(a[2] AND b[4][1 : 0]) = (c[2] + d[2])
[1 : 0]
a1
a0
b3
b2
b1
b0
c1
c0
d1
d0
+
=
b1
b0
c0
⊕ d0
c1
⊕ d1
⊕
(c0
∧ d0
)b1
∧ a1
b0
∧ a0
((b1
∧ a1
) ↔ (c1
⊕ . . .))∧
((b0
∧ a0
) ↔ (c0
⊕ d0
))
AND
R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 17 / 27
Bit-Blasting
(a[2] AND b[4][1 : 0]) = (c[2] + d[2])
[1 : 0]
a1
a0
b3
b2
b1
b0
c1
c0
d1
d0
+
=
b1
b0
c0
⊕ d0
c1
⊕ d1
⊕
(c0
∧ d0
)b1
∧ a1
b0
∧ a0
((b1
∧ a1
) ↔ (c1
⊕ . . .))∧
((b0
∧ a0
) ↔ (c0
⊕ d0
))
AND
((b1 ∧ a1) ↔ (c1 ⊕ d1 ⊕ (c0 ∧ d0))) ∧ ((b0 ∧ a0) ↔ (c0 ⊕ d0))
R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 17 / 27
Bit-Blasing Algorithm (1)
BB := {}, C := {}
Procedure Bit-Blast-Term( t : BV[n] term )
if ( t ∈ C ) return; // If already in cache, skip
else C := C ∪ t // Put in cache
R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 18 / 27
Bit-Blasing Algorithm (1)
BB := {}, C := {}
Procedure Bit-Blast-Term( t : BV[n] term )
if ( t ∈ C ) return; // If already in cache, skip
else C := C ∪ t // Put in cache
if ( t is a BV[n] variable )
// Let x be the name of the variable
BB := BB ∪ {x → [xn−1
, . . . , x0
]}
// where xi
are fresh Boolean variables
R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 18 / 27
Bit-Blasing Algorithm (1)
BB := {}, C := {}
Procedure Bit-Blast-Term( t : BV[n] term )
if ( t ∈ C ) return; // If already in cache, skip
else C := C ∪ t // Put in cache
if ( t is a BV[n] variable )
// Let x be the name of the variable
BB := BB ∪ {x → [xn−1
, . . . , x0
]}
// where xi
are fresh Boolean variables
else if ( t is a BV[n] constant )
// Let c be the constant
BB := BB ∪ {c → [cn−1
, . . . , c0
]}
// where ci
is ⊥ if the i-th bit of c is 0, otherwise
R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 18 / 27
Bit-Blasing Algorithm (1)
BB := {}, C := {}
Procedure Bit-Blast-Term( t : BV[n] term )
if ( t ∈ C ) return; // If already in cache, skip
else C := C ∪ t // Put in cache
if ( t is a BV[n] variable )
// Let x be the name of the variable
BB := BB ∪ {x → [xn−1
, . . . , x0
]}
// where xi
are fresh Boolean variables
else if ( t is a BV[n] constant )
// Let c be the constant
BB := BB ∪ {c → [cn−1
, . . . , c0
]}
// where ci
is ⊥ if the i-th bit of c is 0, otherwise
else if ( t is (t1 AND t2), and t1, t2 are BV[n] terms )
Bit-Blast-Term( t1 )
Bit-Blast-Term( t2 )
BB := BB ∪ {t → [BB(t1, n − 1) ∧ BB(t2, n − 1), . . . , BB(t1, 0) ∧ BB(t2, 0)]}
. . .
where BB(t, i) means:
1 retrieve the correspondence t → [tn
− 1, . . . , t0
], and
2 return ti
R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 18 / 27
Bit-Blasing Algorithm (2)
Procedure Bit-Blast( ϕ : BV[n] formula )
if ( ϕ is (t1 = t2), and t1, t2 are BV[n] terms )
Bit-Blast-Term( t1 )
Bit-Blast-Term( t2 )
BB := BB ∪ {ϕ → ((BB(t1, n − 1) ↔ BB(t2, n − 1)) ∧ . . . ∧ (BB(t1, 0) ↔ BB(t2, 0)))}
R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 19 / 27
Bit-Blasing Algorithm (2)
Procedure Bit-Blast( ϕ : BV[n] formula )
if ( ϕ is (t1 = t2), and t1, t2 are BV[n] terms )
Bit-Blast-Term( t1 )
Bit-Blast-Term( t2 )
BB := BB ∪ {ϕ → ((BB(t1, n − 1) ↔ BB(t2, n − 1)) ∧ . . . ∧ (BB(t1, 0) ↔ BB(t2, 0)))}
else if ( ϕ is (t1 <u t2), and t1, t2 are BV[n] terms )
Bit-Blast-Term( t1 )
Bit-Blast-Term( t2 )
BB := BB ∪ {. . .}
R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 19 / 27
Bit-Blasing Algorithm (2)
Procedure Bit-Blast( ϕ : BV[n] formula )
if ( ϕ is (t1 = t2), and t1, t2 are BV[n] terms )
Bit-Blast-Term( t1 )
Bit-Blast-Term( t2 )
BB := BB ∪ {ϕ → ((BB(t1, n − 1) ↔ BB(t2, n − 1)) ∧ . . . ∧ (BB(t1, 0) ↔ BB(t2, 0)))}
else if ( ϕ is (t1 <u t2), and t1, t2 are BV[n] terms )
Bit-Blast-Term( t1 )
Bit-Blast-Term( t2 )
BB := BB ∪ {. . .}
else if ( ϕ is ϕ1 ∧ ϕ2 are BV[n] formula )
Bit-Blast( ϕ1 )
Bit-Blast( ϕ2 )
BB := BB ∪ {ϕ → (BB(ϕ1) ∧ BB(ϕ2))}
. . .
where BB(ϕ) means:
1 retrieve the correspondence ϕ → ψ, and
2 return ψ
R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 19 / 27
SMT via Bit-Blasing
sat / unsat
SMT formula ϕ
ψ
Bit-Blaster SAT-solver
R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 20 / 27
Bit-Blasing pros and cons
Pros
Very easy to write, if compared to write a native Bit-Vector solver
R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 21 / 27
Bit-Blasing pros and cons
Pros
Very easy to write, if compared to write a native Bit-Vector solver
Boolean model from SAT can be mapped back to a model for each Bit-Vector
variable. If x[n] was bit-blasted as xn−1, . . . , x0
retrieve SAT assignment for each xi
(e.g., x0
= , x1
= ⊥)
construct actual value for x[n] by mapping to 1 and ⊥ to 0 (e.g.,
x[2] = 01)
R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 21 / 27
Bit-Blasing pros and cons
Pros
Very easy to write, if compared to write a native Bit-Vector solver
Boolean model from SAT can be mapped back to a model for each Bit-Vector
variable. If x[n] was bit-blasted as xn−1, . . . , x0
retrieve SAT assignment for each xi
(e.g., x0
= , x1
= ⊥)
construct actual value for x[n] by mapping to 1 and ⊥ to 0 (e.g.,
x[2] = 01)
Cons
Does not scale very well. Consider the formula
¬(x[n] = 0[32]) ∧ (x[n] AND y[n]) = (x[n] + y[n]). It is unsat for every n.
R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 21 / 27
Bit-Blasing pros and cons
Pros
Very easy to write, if compared to write a native Bit-Vector solver
Boolean model from SAT can be mapped back to a model for each Bit-Vector
variable. If x[n] was bit-blasted as xn−1, . . . , x0
retrieve SAT assignment for each xi
(e.g., x0
= , x1
= ⊥)
construct actual value for x[n] by mapping to 1 and ⊥ to 0 (e.g.,
x[2] = 01)
Cons
Does not scale very well. Consider the formula
¬(x[n] = 0[32]) ∧ (x[n] AND y[n]) = (x[n] + y[n]). It is unsat for every n. But to
prove it for n = 32 requires 64 Boolean variables, to prove it with n = 1024 requires
2048 Boolean variables
R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 21 / 27
Bit-Blasing pros and cons
Pros
Very easy to write, if compared to write a native Bit-Vector solver
Boolean model from SAT can be mapped back to a model for each Bit-Vector
variable. If x[n] was bit-blasted as xn−1, . . . , x0
retrieve SAT assignment for each xi
(e.g., x0
= , x1
= ⊥)
construct actual value for x[n] by mapping to 1 and ⊥ to 0 (e.g.,
x[2] = 01)
Cons
Does not scale very well. Consider the formula
¬(x[n] = 0[32]) ∧ (x[n] AND y[n]) = (x[n] + y[n]). It is unsat for every n. But to
prove it for n = 32 requires 64 Boolean variables, to prove it with n = 1024 requires
2048 Boolean variables
It destroys the structure of the formula. In the encoding x[32] is not seen as a “single
object” but each xi is unrelated and independent
R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 21 / 27
Simplifications
We use simplification rules to fight the two problems in previous slide, before bit-blasting
everything
R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 22 / 27
Simplifications
We use simplification rules to fight the two problems in previous slide, before bit-blasting
everything
ψ
SMT formula ϕ
SAT-solver
sat / unsat
Bit-Blaster
Simplifications
R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 22 / 27
Simplifications
We use simplification rules to fight the two problems in previous slide, before bit-blasting
everything
ψ
SMT formula ϕ
SAT-solver
sat / unsat
Bit-Blaster
Simplifications
Simplifications exploit properties of Bit-Vectors to try to reduce the complexity of the
formula. We see here some examples, but many more rules do exist. Also, it is very
important the way they are combined together
R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 22 / 27
Trivial Simplifications
The following are trivial consequences of the semantic of Bit-Vectors
and formulæ in general
R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 23 / 27
Trivial Simplifications
The following are trivial consequences of the semantic of Bit-Vectors
and formulæ in general
Bit-Vectors trivial simplifications
t = t ⇒ for a generic term
c = d ⇒ ⊥ for two different constants c and d
t AND 0 . . . 0 ⇒ 0 . . . 0 for a generic term
. . .
R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 23 / 27
Trivial Simplifications
The following are trivial consequences of the semantic of Bit-Vectors
and formulæ in general
Bit-Vectors trivial simplifications
t = t ⇒ for a generic term
c = d ⇒ ⊥ for two different constants c and d
t AND 0 . . . 0 ⇒ 0 . . . 0 for a generic term
. . .
ϕ ∧ ϕ ⇒ ϕ for a generic formula
ϕ ∧ ⇒ ϕ for a generic formula
ϕ ∨ ⇒ for a generic formula
. . .
R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 23 / 27
Ground Term evaluation
If a term is ground, i.e., it contains no variables, then it can be always
simplified to a single constant
R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 24 / 27
Ground Term evaluation
If a term is ground, i.e., it contains no variables, then it can be always
simplified to a single constant
Examples:
0000 :: 1000 ⇒ 00001000
0010[1 : 0] ⇒ 10
0100 + 0101 ⇒ 1001
R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 24 / 27
Variable Elimination Rule
Suppose that the input formula ϕ is of the kind
ϕ ∧ (x[n] = t[n])
where x[n] is a variable, and t[n] is a term not containing x[n]
R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 25 / 27
Variable Elimination Rule
Suppose that the input formula ϕ is of the kind
ϕ ∧ (x[n] = t[n])
where x[n] is a variable, and t[n] is a term not containing x[n]
then we can rewrite ϕ as
ϕ [t[n]/x[n]]
i.e., we replace every occurrence of x[n] by t[n].
R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 25 / 27
Variable Elimination Rule
Suppose that the input formula ϕ is of the kind
ϕ ∧ (x[n] = t[n])
where x[n] is a variable, and t[n] is a term not containing x[n]
then we can rewrite ϕ as
ϕ [t[n]/x[n]]
i.e., we replace every occurrence of x[n] by t[n]. We save n Boolean
variables in the reduction to SAT
R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 25 / 27
Concatenation Elimination Rule
Suppose that we have the equality
t[n] :: s[m] = r[n] :: u[m]
then, because the concatenations match, we can rewrite it as
R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 26 / 27
Concatenation Elimination Rule
Suppose that we have the equality
t[n] :: s[m] = r[n] :: u[m]
then, because the concatenations match, we can rewrite it as
(t[n] = r[n]) ∧ (s[m] = u[m])
this rewriting may give more opportunity for applications of previous
rules
R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 26 / 27
Exercizes
1 Complete the missing cases in procedures Bit-Blast-Term and
Bit-Blast
2 Bit-Blast the formula ¬(x[3] = 000) ∧ (x[3] AND y[3]) = (x[3] + y[3])
3 Simplify the formula (x[4] :: y[4]) = (z[4] :: x[4]) ∧ ¬(y[4] = z[4])
R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 27 / 27

Contenu connexe

Plus de Roberto Bruttomesso (10)

smtlecture.10
smtlecture.10smtlecture.10
smtlecture.10
 
smtlecture.9
smtlecture.9smtlecture.9
smtlecture.9
 
smtlecture.8
smtlecture.8smtlecture.8
smtlecture.8
 
smtlecture.7
smtlecture.7smtlecture.7
smtlecture.7
 
smtlecture.6
smtlecture.6smtlecture.6
smtlecture.6
 
smtlecture.5
smtlecture.5smtlecture.5
smtlecture.5
 
smtlecture.4
smtlecture.4smtlecture.4
smtlecture.4
 
smtlecture.3
smtlecture.3smtlecture.3
smtlecture.3
 
satandsmt.stpetersburg
satandsmt.stpetersburgsatandsmt.stpetersburg
satandsmt.stpetersburg
 
smtlectures.1
smtlectures.1smtlectures.1
smtlectures.1
 

Dernier

Graduate Outcomes Presentation Slides - English
Graduate Outcomes Presentation Slides - EnglishGraduate Outcomes Presentation Slides - English
Graduate Outcomes Presentation Slides - Englishneillewis46
 
SOC 101 Demonstration of Learning Presentation
SOC 101 Demonstration of Learning PresentationSOC 101 Demonstration of Learning Presentation
SOC 101 Demonstration of Learning Presentationcamerronhm
 
ComPTIA Overview | Comptia Security+ Book SY0-701
ComPTIA Overview | Comptia Security+ Book SY0-701ComPTIA Overview | Comptia Security+ Book SY0-701
ComPTIA Overview | Comptia Security+ Book SY0-701bronxfugly43
 
UGC NET Paper 1 Mathematical Reasoning & Aptitude.pdf
UGC NET Paper 1 Mathematical Reasoning & Aptitude.pdfUGC NET Paper 1 Mathematical Reasoning & Aptitude.pdf
UGC NET Paper 1 Mathematical Reasoning & Aptitude.pdfNirmal Dwivedi
 
How to Create and Manage Wizard in Odoo 17
How to Create and Manage Wizard in Odoo 17How to Create and Manage Wizard in Odoo 17
How to Create and Manage Wizard in Odoo 17Celine George
 
Single or Multiple melodic lines structure
Single or Multiple melodic lines structureSingle or Multiple melodic lines structure
Single or Multiple melodic lines structuredhanjurrannsibayan2
 
Jual Obat Aborsi Hongkong ( Asli No.1 ) 085657271886 Obat Penggugur Kandungan...
Jual Obat Aborsi Hongkong ( Asli No.1 ) 085657271886 Obat Penggugur Kandungan...Jual Obat Aborsi Hongkong ( Asli No.1 ) 085657271886 Obat Penggugur Kandungan...
Jual Obat Aborsi Hongkong ( Asli No.1 ) 085657271886 Obat Penggugur Kandungan...ZurliaSoop
 
Mixin Classes in Odoo 17 How to Extend Models Using Mixin Classes
Mixin Classes in Odoo 17  How to Extend Models Using Mixin ClassesMixin Classes in Odoo 17  How to Extend Models Using Mixin Classes
Mixin Classes in Odoo 17 How to Extend Models Using Mixin ClassesCeline George
 
Making communications land - Are they received and understood as intended? we...
Making communications land - Are they received and understood as intended? we...Making communications land - Are they received and understood as intended? we...
Making communications land - Are they received and understood as intended? we...Association for Project Management
 
The basics of sentences session 3pptx.pptx
The basics of sentences session 3pptx.pptxThe basics of sentences session 3pptx.pptx
The basics of sentences session 3pptx.pptxheathfieldcps1
 
Micro-Scholarship, What it is, How can it help me.pdf
Micro-Scholarship, What it is, How can it help me.pdfMicro-Scholarship, What it is, How can it help me.pdf
Micro-Scholarship, What it is, How can it help me.pdfPoh-Sun Goh
 
Vishram Singh - Textbook of Anatomy Upper Limb and Thorax.. Volume 1 (1).pdf
Vishram Singh - Textbook of Anatomy  Upper Limb and Thorax.. Volume 1 (1).pdfVishram Singh - Textbook of Anatomy  Upper Limb and Thorax.. Volume 1 (1).pdf
Vishram Singh - Textbook of Anatomy Upper Limb and Thorax.. Volume 1 (1).pdfssuserdda66b
 
ICT Role in 21st Century Education & its Challenges.pptx
ICT Role in 21st Century Education & its Challenges.pptxICT Role in 21st Century Education & its Challenges.pptx
ICT Role in 21st Century Education & its Challenges.pptxAreebaZafar22
 
ICT role in 21st century education and it's challenges.
ICT role in 21st century education and it's challenges.ICT role in 21st century education and it's challenges.
ICT role in 21st century education and it's challenges.MaryamAhmad92
 
How to Give a Domain for a Field in Odoo 17
How to Give a Domain for a Field in Odoo 17How to Give a Domain for a Field in Odoo 17
How to Give a Domain for a Field in Odoo 17Celine George
 
Fostering Friendships - Enhancing Social Bonds in the Classroom
Fostering Friendships - Enhancing Social Bonds  in the ClassroomFostering Friendships - Enhancing Social Bonds  in the Classroom
Fostering Friendships - Enhancing Social Bonds in the ClassroomPooky Knightsmith
 
Application orientated numerical on hev.ppt
Application orientated numerical on hev.pptApplication orientated numerical on hev.ppt
Application orientated numerical on hev.pptRamjanShidvankar
 
Explore beautiful and ugly buildings. Mathematics helps us create beautiful d...
Explore beautiful and ugly buildings. Mathematics helps us create beautiful d...Explore beautiful and ugly buildings. Mathematics helps us create beautiful d...
Explore beautiful and ugly buildings. Mathematics helps us create beautiful d...christianmathematics
 
2024-NATIONAL-LEARNING-CAMP-AND-OTHER.pptx
2024-NATIONAL-LEARNING-CAMP-AND-OTHER.pptx2024-NATIONAL-LEARNING-CAMP-AND-OTHER.pptx
2024-NATIONAL-LEARNING-CAMP-AND-OTHER.pptxMaritesTamaniVerdade
 
General Principles of Intellectual Property: Concepts of Intellectual Proper...
General Principles of Intellectual Property: Concepts of Intellectual  Proper...General Principles of Intellectual Property: Concepts of Intellectual  Proper...
General Principles of Intellectual Property: Concepts of Intellectual Proper...Poonam Aher Patil
 

Dernier (20)

Graduate Outcomes Presentation Slides - English
Graduate Outcomes Presentation Slides - EnglishGraduate Outcomes Presentation Slides - English
Graduate Outcomes Presentation Slides - English
 
SOC 101 Demonstration of Learning Presentation
SOC 101 Demonstration of Learning PresentationSOC 101 Demonstration of Learning Presentation
SOC 101 Demonstration of Learning Presentation
 
ComPTIA Overview | Comptia Security+ Book SY0-701
ComPTIA Overview | Comptia Security+ Book SY0-701ComPTIA Overview | Comptia Security+ Book SY0-701
ComPTIA Overview | Comptia Security+ Book SY0-701
 
UGC NET Paper 1 Mathematical Reasoning & Aptitude.pdf
UGC NET Paper 1 Mathematical Reasoning & Aptitude.pdfUGC NET Paper 1 Mathematical Reasoning & Aptitude.pdf
UGC NET Paper 1 Mathematical Reasoning & Aptitude.pdf
 
How to Create and Manage Wizard in Odoo 17
How to Create and Manage Wizard in Odoo 17How to Create and Manage Wizard in Odoo 17
How to Create and Manage Wizard in Odoo 17
 
Single or Multiple melodic lines structure
Single or Multiple melodic lines structureSingle or Multiple melodic lines structure
Single or Multiple melodic lines structure
 
Jual Obat Aborsi Hongkong ( Asli No.1 ) 085657271886 Obat Penggugur Kandungan...
Jual Obat Aborsi Hongkong ( Asli No.1 ) 085657271886 Obat Penggugur Kandungan...Jual Obat Aborsi Hongkong ( Asli No.1 ) 085657271886 Obat Penggugur Kandungan...
Jual Obat Aborsi Hongkong ( Asli No.1 ) 085657271886 Obat Penggugur Kandungan...
 
Mixin Classes in Odoo 17 How to Extend Models Using Mixin Classes
Mixin Classes in Odoo 17  How to Extend Models Using Mixin ClassesMixin Classes in Odoo 17  How to Extend Models Using Mixin Classes
Mixin Classes in Odoo 17 How to Extend Models Using Mixin Classes
 
Making communications land - Are they received and understood as intended? we...
Making communications land - Are they received and understood as intended? we...Making communications land - Are they received and understood as intended? we...
Making communications land - Are they received and understood as intended? we...
 
The basics of sentences session 3pptx.pptx
The basics of sentences session 3pptx.pptxThe basics of sentences session 3pptx.pptx
The basics of sentences session 3pptx.pptx
 
Micro-Scholarship, What it is, How can it help me.pdf
Micro-Scholarship, What it is, How can it help me.pdfMicro-Scholarship, What it is, How can it help me.pdf
Micro-Scholarship, What it is, How can it help me.pdf
 
Vishram Singh - Textbook of Anatomy Upper Limb and Thorax.. Volume 1 (1).pdf
Vishram Singh - Textbook of Anatomy  Upper Limb and Thorax.. Volume 1 (1).pdfVishram Singh - Textbook of Anatomy  Upper Limb and Thorax.. Volume 1 (1).pdf
Vishram Singh - Textbook of Anatomy Upper Limb and Thorax.. Volume 1 (1).pdf
 
ICT Role in 21st Century Education & its Challenges.pptx
ICT Role in 21st Century Education & its Challenges.pptxICT Role in 21st Century Education & its Challenges.pptx
ICT Role in 21st Century Education & its Challenges.pptx
 
ICT role in 21st century education and it's challenges.
ICT role in 21st century education and it's challenges.ICT role in 21st century education and it's challenges.
ICT role in 21st century education and it's challenges.
 
How to Give a Domain for a Field in Odoo 17
How to Give a Domain for a Field in Odoo 17How to Give a Domain for a Field in Odoo 17
How to Give a Domain for a Field in Odoo 17
 
Fostering Friendships - Enhancing Social Bonds in the Classroom
Fostering Friendships - Enhancing Social Bonds  in the ClassroomFostering Friendships - Enhancing Social Bonds  in the Classroom
Fostering Friendships - Enhancing Social Bonds in the Classroom
 
Application orientated numerical on hev.ppt
Application orientated numerical on hev.pptApplication orientated numerical on hev.ppt
Application orientated numerical on hev.ppt
 
Explore beautiful and ugly buildings. Mathematics helps us create beautiful d...
Explore beautiful and ugly buildings. Mathematics helps us create beautiful d...Explore beautiful and ugly buildings. Mathematics helps us create beautiful d...
Explore beautiful and ugly buildings. Mathematics helps us create beautiful d...
 
2024-NATIONAL-LEARNING-CAMP-AND-OTHER.pptx
2024-NATIONAL-LEARNING-CAMP-AND-OTHER.pptx2024-NATIONAL-LEARNING-CAMP-AND-OTHER.pptx
2024-NATIONAL-LEARNING-CAMP-AND-OTHER.pptx
 
General Principles of Intellectual Property: Concepts of Intellectual Proper...
General Principles of Intellectual Property: Concepts of Intellectual  Proper...General Principles of Intellectual Property: Concepts of Intellectual  Proper...
General Principles of Intellectual Property: Concepts of Intellectual Proper...
 

smtlectures.2

  • 1. Satisfiability Modulo Theories Lezione 2 - An Eager Approach: Solving Bit-Vectors (slides revision: Saturday 14th March, 2015, 11:46) Roberto Bruttomesso Seminario di Logica Matematica (Corso Prof. Silvio Ghilardi) 27 Ottobre 2011 R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 1 / 27
  • 2. Recall from last lecture . . . Approaches to solve SMT formulæ are based on the observation that SMT can be reduced to SAT, i.e., the purely Boolean Satisfiability Problem R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 2 / 27
  • 3. Recall from last lecture . . . Approaches to solve SMT formulæ are based on the observation that SMT can be reduced to SAT, i.e., the purely Boolean Satisfiability Problem sat / unsat SMT formula ϕ ψ Encoder SAT-solver R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 2 / 27
  • 4. Outline 1 Bit-Vectors Syntax Semantic Examples 2 Solving Bit-Vectors Bit-Blasting Simplifications R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 3 / 27
  • 5. Introduction Bit-Vectors are extremely useful data structures, used to symbolically represent hardware and software constructs (see later) R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 4 / 27
  • 6. Introduction Bit-Vectors are extremely useful data structures, used to symbolically represent hardware and software constructs (see later) The world of Bit-Vectors is a finite world, i.e., with Bit-Vectors it is not possible to represent/handle arbitrarily large numbers R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 4 / 27
  • 7. Introduction Bit-Vectors are extremely useful data structures, used to symbolically represent hardware and software constructs (see later) The world of Bit-Vectors is a finite world, i.e., with Bit-Vectors it is not possible to represent/handle arbitrarily large numbers Indeed, when speaking about Bit-Vectors we always associate a width (which is usually a power of 2, often 32 or 64) R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 4 / 27
  • 8. Introduction Bit-Vectors are extremely useful data structures, used to symbolically represent hardware and software constructs (see later) The world of Bit-Vectors is a finite world, i.e., with Bit-Vectors it is not possible to represent/handle arbitrarily large numbers Indeed, when speaking about Bit-Vectors we always associate a width (which is usually a power of 2, often 32 or 64) The width specifies the (maximum) number of bits used to represent variables and terms R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 4 / 27
  • 9. Introduction Bit-Vectors are extremely useful data structures, used to symbolically represent hardware and software constructs (see later) The world of Bit-Vectors is a finite world, i.e., with Bit-Vectors it is not possible to represent/handle arbitrarily large numbers Indeed, when speaking about Bit-Vectors we always associate a width (which is usually a power of 2, often 32 or 64) The width specifies the (maximum) number of bits used to represent variables and terms Bit-Vector formulæ are mathematically characterized by the theory of Bit-Vectors BV R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 4 / 27
  • 10. Bit-Vectors A bit-vector is an array of bits 0 1 1 0 0 1 1 a[3] b[3] 2 1 0 2 1 R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 5 / 27
  • 11. Bit-Vectors A bit-vector is an array of bits 0 1 1 0 0 1 1 a[3] b[3] 2 1 0 2 1 Selection (or Extraction): a[3][1 : 0] 1 0 1 0 R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 5 / 27
  • 12. Bit-Vectors A bit-vector is an array of bits 0 1 1 0 0 1 1 a[3] b[3] 2 1 0 2 1 Selection (or Extraction): a[3][1 : 0] 1 0 1 0 Notice that a[n][i : j] returns a Bit-Vector of width i − j + 1 (0 ≤ j ≤ i ≤ n − 1) R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 5 / 27
  • 13. Bit-Vectors A bit-vector is an array of bits 0 1 1 0 0 1 1 a[3] b[3] 2 1 0 2 1 Selection (or Extraction): a[3][1 : 0] 1 0 1 0 Notice that a[n][i : j] returns a Bit-Vector of width i − j + 1 (0 ≤ j ≤ i ≤ n − 1) a[n][n − 1 : 0] R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 5 / 27
  • 14. Bit-Vectors A bit-vector is an array of bits 0 1 1 0 0 1 1 a[3] b[3] 2 1 0 2 1 Selection (or Extraction): a[3][1 : 0] 1 0 1 0 Notice that a[n][i : j] returns a Bit-Vector of width i − j + 1 (0 ≤ j ≤ i ≤ n − 1) a[n][n − 1 : 0] = a[n] R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 5 / 27
  • 15. Bit-Vectors A bit-vector is an array of bits 0 1 1 0 0 1 1 a[3] b[3] 2 1 0 2 1 Selection (or Extraction): a[3][1 : 0] 1 0 1 0 Notice that a[n][i : j] returns a Bit-Vector of width i − j + 1 (0 ≤ j ≤ i ≤ n − 1) a[n][n − 1 : 0] = a[n] Selection has precedence over any other operator R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 5 / 27
  • 16. Bit-Vectors A bit-vector is an array of bits 0 1 1 0 0 1 1 a[3] b[3] 2 1 0 2 1 Concatenation a[3] :: b[3] 1 1 0 5 34 0 1 1 2 1 0 R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 6 / 27
  • 17. Bit-Vectors A bit-vector is an array of bits 0 1 1 0 0 1 1 a[3] b[3] 2 1 0 2 1 Concatenation a[3] :: b[3] 1 1 0 5 34 0 1 1 2 1 0 Notice that a[n] :: b[m] returns a Bit-Vector of width n + m R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 6 / 27
  • 18. Bit-Vectors A bit-vector is an array of bits 0 1 1 0 0 1 1 a[3] b[3] 2 1 0 2 1 Concatenation a[3] :: b[3] 1 1 0 5 34 0 1 1 2 1 0 Notice that a[n] :: b[m] returns a Bit-Vector of width n + m a[n][n − 1 : i] :: a[n][i − 1 : 0] R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 6 / 27
  • 19. Bit-Vectors A bit-vector is an array of bits 0 1 1 0 0 1 1 a[3] b[3] 2 1 0 2 1 Concatenation a[3] :: b[3] 1 1 0 5 34 0 1 1 2 1 0 Notice that a[n] :: b[m] returns a Bit-Vector of width n + m a[n][n − 1 : i] :: a[n][i − 1 : 0] = a[n][n − 1 : 0] R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 6 / 27
  • 20. Bit-Vectors A bit-vector is an array of bits 0 1 1 0 0 1 1 a[3] b[3] 2 1 0 2 1 Concatenation a[3] :: b[3] 1 1 0 5 34 0 1 1 2 1 0 Notice that a[n] :: b[m] returns a Bit-Vector of width n + m a[n][n − 1 : i] :: a[n][i − 1 : 0] = a[n][n − 1 : 0] = a[n] R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 6 / 27
  • 21. Bit-Vectors A bit-vector is an array of bits 0 1 1 0 0 1 1 a[3] b[3] 2 1 0 2 1 Arithmetic a[3] + b[3] 0 0 1 2 1 0 1 R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 7 / 27
  • 22. Bit-Vectors A bit-vector is an array of bits 0 1 1 0 0 1 1 a[3] b[3] 2 1 0 2 1 Arithmetic a[3] + b[3] 0 0 1 2 1 0 1 Notice that To be precise, we should have written a[3] +[3] b[3] (widths must be the same) Semantic is that of modular arithmetic R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 7 / 27
  • 23. Bit-Vectors A bit-vector is an array of bits 0 1 1 0 0 1 1 a[3] b[3] 2 1 0 2 1 Bitwise a[3] AND b[3] 0 1 0 2 1 0 R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 8 / 27
  • 24. Bit-Vectors A bit-vector is an array of bits 0 1 1 0 0 1 1 a[3] b[3] 2 1 0 2 1 Bitwise a[3] AND b[3] 0 1 0 2 1 0 Notice that Again, to be precise, we should have written a[3] AND [3]b[3] (widths must be the same) Used to compute bit-mask operations R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 8 / 27
  • 25. A (non-exhaustive) list of operators and predicates Each Bit-Vector term of width n, is associated with a sort BV[n] (n ≥ 1) R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 9 / 27
  • 26. A (non-exhaustive) list of operators and predicates Each Bit-Vector term of width n, is associated with a sort BV[n] (n ≥ 1) Name Symb Type Signature Selection [i : j] Core BV[n] → BV[i−j+1] Concatenation :: BV[n] × BV[m] → BV[n+m] Addition + Arith. BV[n] × BV[n] → BV[n] Subtraction − BV[n] × BV[n] → BV[n] Multiplication ∗ BV[n] × BV[n] → BV[n] Less than (signed) <s BV[n] × BV[n] → Bool Less than (unsigned) <u BV[n] × BV[n] → Bool Bitwise and AND Bitwise BV[n] × BV[n] → BV[n] Bitwise or OR BV[n] × BV[n] → BV[n] Bitwise not NOT BV[n] → BV[n] R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 9 / 27
  • 27. A (non-exhaustive) list of operators and predicates Each Bit-Vector term of width n, is associated with a sort BV[n] (n ≥ 1) Name Symb Type Signature Selection [i : j] Core BV[n] → BV[i−j+1] Concatenation :: BV[n] × BV[m] → BV[n+m] Addition + Arith. BV[n] × BV[n] → BV[n] Subtraction − BV[n] × BV[n] → BV[n] Multiplication ∗ BV[n] × BV[n] → BV[n] Less than (signed) <s BV[n] × BV[n] → Bool Less than (unsigned) <u BV[n] × BV[n] → Bool Bitwise and AND Bitwise BV[n] × BV[n] → BV[n] Bitwise or OR BV[n] × BV[n] → BV[n] Bitwise not NOT BV[n] → BV[n] Moreover, we have constants, e.g., 101101[6] R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 9 / 27
  • 28. Bit-Vector semantic Each sort BV[n] is associated with a domain Dn = {0, 1, . . . , 2n−1} R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 10 / 27
  • 29. Bit-Vector semantic Each sort BV[n] is associated with a domain Dn = {0, 1, . . . , 2n−1} For example BV[4] is associated with D4 = {0, 1, . . . , 15} R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 10 / 27
  • 30. Bit-Vector semantic Each sort BV[n] is associated with a domain Dn = {0, 1, . . . , 2n−1} For example BV[4] is associated with D4 = {0, 1, . . . , 15} As usual, the semantic for the other terms depends on a particular assignment to the variables R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 10 / 27
  • 31. Bit-Vector semantic Each sort BV[n] is associated with a domain Dn = {0, 1, . . . , 2n−1} For example BV[4] is associated with D4 = {0, 1, . . . , 15} As usual, the semantic for the other terms depends on a particular assignment to the variables Each variable x[n] is associated with a function [[x[n]]] of type Dn → {0, 1} R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 10 / 27
  • 32. Bit-Vector semantic Each sort BV[n] is associated with a domain Dn = {0, 1, . . . , 2n−1} For example BV[4] is associated with D4 = {0, 1, . . . , 15} As usual, the semantic for the other terms depends on a particular assignment to the variables Each variable x[n] is associated with a function [[x[n]]] of type Dn → {0, 1} [[x[3]]]: 1 0 0 0 2 1 0 1 [[x[3]]]: nat3([[x[3]]]): 4 R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 10 / 27
  • 33. Bit-Vector semantic Each sort BV[n] is associated with a domain Dn = {0, 1, . . . , 2n−1} For example BV[4] is associated with D4 = {0, 1, . . . , 15} As usual, the semantic for the other terms depends on a particular assignment to the variables Each variable x[n] is associated with a function [[x[n]]] of type Dn → {0, 1} [[x[3]]]: 1 0 0 0 2 1 0 1 [[x[3]]]: nat3([[x[3]]]): 4 natn( ) is a helper meta-function, to facilitate the presentation R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 10 / 27
  • 34. Bit-Vector semantic [[c[n]]] := λx ∈ [0, n − 1]. 0 if the x-th bit is 0 1 otherwise [[t[l] :: s[k]]] := λx ∈ [0, . . . , l + k − 1]. [[s[n]]](x) if x < l [[t[n]]](x − l) otherwise [[t[n][i : j]]] := λx ∈ [0, i − j + 1]. [[t[n]]](x + j) [[t[n] + s[n]]] := nat−1 n (natn([[t[n]]]) + natn([[s[n]]])) % 2n [[t[n] AND s[n]]] := λx ∈ [0, n − 1].    0 if [[t[n]]](x) = 0 0 if [[s[n]]](x) = 0 1 otherwise [[t[n] <u s[n]]] := if natn([[t[n]]]) <u natn([[s[n]]]) ⊥ otherwise R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 11 / 27
  • 35. Example 1: C code Pseudo-code i := 1 while ( i > 0 ) i := i + 1 R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 12 / 27
  • 36. Example 1: C code Pseudo-code i := 1 while ( i > 0 ) i := i + 1 C equivalent unsigned i = 1; while ( i > 0 ) i = i + 1; R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 12 / 27
  • 37. Example 2: C code Evaluation of BV[32] with C unsigned a = 0xFFFF0000; unsigned b = 0x0000FFFF; printf( "a + b : %8Xn", a + b ); printf( "a * b : %8Xn", a * b ); printf( "a AND b : %8Xn", a & b ); printf( "a OR b : %8Xn", a | b ); R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 13 / 27
  • 38. Example 3: Circuit module counter(clk, count); input clk ; output [2:0] count ; wire cin ; reg [2:0] count ; assign cin = ~count [0] & ~count [1] & ~count [2]; initial begin count = 3’b0; end always @ ( posedge clk ) begin count [0] <= cin; count [1] <= count [0]; count [2] <= count [1]; end end module 100000 001 010 R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 14 / 27
  • 39. Outline 1 Bit-Vectors Syntax Semantic Examples 2 Solving Bit-Vectors Bit-Blasting Simplifications R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 15 / 27
  • 40. Bit-Blasting Our goal is to devise an automatic decision procedure (SMT-solver) to check the satisfiability of a given Bit-Vector formula R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 16 / 27
  • 41. Bit-Blasting Our goal is to devise an automatic decision procedure (SMT-solver) to check the satisfiability of a given Bit-Vector formula State-of-the-art techniques are based on reduction to SAT. It is called bit-blasting R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 16 / 27
  • 42. Bit-Blasting Our goal is to devise an automatic decision procedure (SMT-solver) to check the satisfiability of a given Bit-Vector formula State-of-the-art techniques are based on reduction to SAT. It is called bit-blasting the formula is seen as a circuit, in which variables and constants are inputs, while other terms are intermediate nodes. The outermost Boolean connective or predicate represents the output R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 16 / 27
  • 43. Bit-Blasting Our goal is to devise an automatic decision procedure (SMT-solver) to check the satisfiability of a given Bit-Vector formula State-of-the-art techniques are based on reduction to SAT. It is called bit-blasting the formula is seen as a circuit, in which variables and constants are inputs, while other terms are intermediate nodes. The outermost Boolean connective or predicate represents the output each variable is assigned to a vector of Boolean variables (n variables for a variable of sort BV[n]) R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 16 / 27
  • 44. Bit-Blasting Our goal is to devise an automatic decision procedure (SMT-solver) to check the satisfiability of a given Bit-Vector formula State-of-the-art techniques are based on reduction to SAT. It is called bit-blasting the formula is seen as a circuit, in which variables and constants are inputs, while other terms are intermediate nodes. The outermost Boolean connective or predicate represents the output each variable is assigned to a vector of Boolean variables (n variables for a variable of sort BV[n]) each intermediate node is assigned to a vector of Boolean formulæ (n formulæ for a term of sort BV[n]) R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 16 / 27
  • 45. Bit-Blasting (a[2] AND b[4][1 : 0]) = (c[2] + d[2]) [1 : 0] + = AND out[1] int3[2]int2[2] int1[2] d[2]c[2]b[4]a[2] R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 17 / 27
  • 46. Bit-Blasting (a[2] AND b[4][1 : 0]) = (c[2] + d[2]) [1 : 0] a1 a0 + = AND out[1] int3[2]int2[2] int1[2] d[2]c[2]b[4] R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 17 / 27
  • 47. Bit-Blasting (a[2] AND b[4][1 : 0]) = (c[2] + d[2]) [1 : 0] a1 a0 b3 b2 b1 b0 + = AND out[1] int3[2]int2[2] int1[2] d[2]c[2] R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 17 / 27
  • 48. Bit-Blasting (a[2] AND b[4][1 : 0]) = (c[2] + d[2]) [1 : 0] a1 a0 b3 b2 b1 b0 c1 c0 + = AND out[1] int3[2]int2[2] int1[2] d[2] R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 17 / 27
  • 49. Bit-Blasting (a[2] AND b[4][1 : 0]) = (c[2] + d[2]) [1 : 0] a1 a0 b3 b2 b1 b0 c1 c0 d1 d0 + = AND out[1] int3[2]int2[2] int1[2] R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 17 / 27
  • 50. Bit-Blasting (a[2] AND b[4][1 : 0]) = (c[2] + d[2]) [1 : 0] a1 a0 b3 b2 b1 b0 c1 c0 d1 d0 + = b1 b0 AND out[1] int3[2]int2[2] R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 17 / 27
  • 51. Bit-Blasting (a[2] AND b[4][1 : 0]) = (c[2] + d[2]) [1 : 0] a1 a0 b3 b2 b1 b0 c1 c0 d1 d0 + = b1 b0 b1 ∧ a1 b0 ∧ a0 AND out[1] int3[2] R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 17 / 27
  • 52. Bit-Blasting (a[2] AND b[4][1 : 0]) = (c[2] + d[2]) [1 : 0] a1 a0 b3 b2 b1 b0 c1 c0 d1 d0 + = b1 b0 c0 ⊕ d0 c1 ⊕ d1 ⊕ (c0 ∧ d0 )b1 ∧ a1 b0 ∧ a0 AND out[1] R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 17 / 27
  • 53. Bit-Blasting (a[2] AND b[4][1 : 0]) = (c[2] + d[2]) [1 : 0] a1 a0 b3 b2 b1 b0 c1 c0 d1 d0 + = b1 b0 c0 ⊕ d0 c1 ⊕ d1 ⊕ (c0 ∧ d0 )b1 ∧ a1 b0 ∧ a0 ((b1 ∧ a1 ) ↔ (c1 ⊕ . . .))∧ ((b0 ∧ a0 ) ↔ (c0 ⊕ d0 )) AND R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 17 / 27
  • 54. Bit-Blasting (a[2] AND b[4][1 : 0]) = (c[2] + d[2]) [1 : 0] a1 a0 b3 b2 b1 b0 c1 c0 d1 d0 + = b1 b0 c0 ⊕ d0 c1 ⊕ d1 ⊕ (c0 ∧ d0 )b1 ∧ a1 b0 ∧ a0 ((b1 ∧ a1 ) ↔ (c1 ⊕ . . .))∧ ((b0 ∧ a0 ) ↔ (c0 ⊕ d0 )) AND ((b1 ∧ a1) ↔ (c1 ⊕ d1 ⊕ (c0 ∧ d0))) ∧ ((b0 ∧ a0) ↔ (c0 ⊕ d0)) R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 17 / 27
  • 55. Bit-Blasing Algorithm (1) BB := {}, C := {} Procedure Bit-Blast-Term( t : BV[n] term ) if ( t ∈ C ) return; // If already in cache, skip else C := C ∪ t // Put in cache R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 18 / 27
  • 56. Bit-Blasing Algorithm (1) BB := {}, C := {} Procedure Bit-Blast-Term( t : BV[n] term ) if ( t ∈ C ) return; // If already in cache, skip else C := C ∪ t // Put in cache if ( t is a BV[n] variable ) // Let x be the name of the variable BB := BB ∪ {x → [xn−1 , . . . , x0 ]} // where xi are fresh Boolean variables R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 18 / 27
  • 57. Bit-Blasing Algorithm (1) BB := {}, C := {} Procedure Bit-Blast-Term( t : BV[n] term ) if ( t ∈ C ) return; // If already in cache, skip else C := C ∪ t // Put in cache if ( t is a BV[n] variable ) // Let x be the name of the variable BB := BB ∪ {x → [xn−1 , . . . , x0 ]} // where xi are fresh Boolean variables else if ( t is a BV[n] constant ) // Let c be the constant BB := BB ∪ {c → [cn−1 , . . . , c0 ]} // where ci is ⊥ if the i-th bit of c is 0, otherwise R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 18 / 27
  • 58. Bit-Blasing Algorithm (1) BB := {}, C := {} Procedure Bit-Blast-Term( t : BV[n] term ) if ( t ∈ C ) return; // If already in cache, skip else C := C ∪ t // Put in cache if ( t is a BV[n] variable ) // Let x be the name of the variable BB := BB ∪ {x → [xn−1 , . . . , x0 ]} // where xi are fresh Boolean variables else if ( t is a BV[n] constant ) // Let c be the constant BB := BB ∪ {c → [cn−1 , . . . , c0 ]} // where ci is ⊥ if the i-th bit of c is 0, otherwise else if ( t is (t1 AND t2), and t1, t2 are BV[n] terms ) Bit-Blast-Term( t1 ) Bit-Blast-Term( t2 ) BB := BB ∪ {t → [BB(t1, n − 1) ∧ BB(t2, n − 1), . . . , BB(t1, 0) ∧ BB(t2, 0)]} . . . where BB(t, i) means: 1 retrieve the correspondence t → [tn − 1, . . . , t0 ], and 2 return ti R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 18 / 27
  • 59. Bit-Blasing Algorithm (2) Procedure Bit-Blast( ϕ : BV[n] formula ) if ( ϕ is (t1 = t2), and t1, t2 are BV[n] terms ) Bit-Blast-Term( t1 ) Bit-Blast-Term( t2 ) BB := BB ∪ {ϕ → ((BB(t1, n − 1) ↔ BB(t2, n − 1)) ∧ . . . ∧ (BB(t1, 0) ↔ BB(t2, 0)))} R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 19 / 27
  • 60. Bit-Blasing Algorithm (2) Procedure Bit-Blast( ϕ : BV[n] formula ) if ( ϕ is (t1 = t2), and t1, t2 are BV[n] terms ) Bit-Blast-Term( t1 ) Bit-Blast-Term( t2 ) BB := BB ∪ {ϕ → ((BB(t1, n − 1) ↔ BB(t2, n − 1)) ∧ . . . ∧ (BB(t1, 0) ↔ BB(t2, 0)))} else if ( ϕ is (t1 <u t2), and t1, t2 are BV[n] terms ) Bit-Blast-Term( t1 ) Bit-Blast-Term( t2 ) BB := BB ∪ {. . .} R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 19 / 27
  • 61. Bit-Blasing Algorithm (2) Procedure Bit-Blast( ϕ : BV[n] formula ) if ( ϕ is (t1 = t2), and t1, t2 are BV[n] terms ) Bit-Blast-Term( t1 ) Bit-Blast-Term( t2 ) BB := BB ∪ {ϕ → ((BB(t1, n − 1) ↔ BB(t2, n − 1)) ∧ . . . ∧ (BB(t1, 0) ↔ BB(t2, 0)))} else if ( ϕ is (t1 <u t2), and t1, t2 are BV[n] terms ) Bit-Blast-Term( t1 ) Bit-Blast-Term( t2 ) BB := BB ∪ {. . .} else if ( ϕ is ϕ1 ∧ ϕ2 are BV[n] formula ) Bit-Blast( ϕ1 ) Bit-Blast( ϕ2 ) BB := BB ∪ {ϕ → (BB(ϕ1) ∧ BB(ϕ2))} . . . where BB(ϕ) means: 1 retrieve the correspondence ϕ → ψ, and 2 return ψ R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 19 / 27
  • 62. SMT via Bit-Blasing sat / unsat SMT formula ϕ ψ Bit-Blaster SAT-solver R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 20 / 27
  • 63. Bit-Blasing pros and cons Pros Very easy to write, if compared to write a native Bit-Vector solver R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 21 / 27
  • 64. Bit-Blasing pros and cons Pros Very easy to write, if compared to write a native Bit-Vector solver Boolean model from SAT can be mapped back to a model for each Bit-Vector variable. If x[n] was bit-blasted as xn−1, . . . , x0 retrieve SAT assignment for each xi (e.g., x0 = , x1 = ⊥) construct actual value for x[n] by mapping to 1 and ⊥ to 0 (e.g., x[2] = 01) R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 21 / 27
  • 65. Bit-Blasing pros and cons Pros Very easy to write, if compared to write a native Bit-Vector solver Boolean model from SAT can be mapped back to a model for each Bit-Vector variable. If x[n] was bit-blasted as xn−1, . . . , x0 retrieve SAT assignment for each xi (e.g., x0 = , x1 = ⊥) construct actual value for x[n] by mapping to 1 and ⊥ to 0 (e.g., x[2] = 01) Cons Does not scale very well. Consider the formula ¬(x[n] = 0[32]) ∧ (x[n] AND y[n]) = (x[n] + y[n]). It is unsat for every n. R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 21 / 27
  • 66. Bit-Blasing pros and cons Pros Very easy to write, if compared to write a native Bit-Vector solver Boolean model from SAT can be mapped back to a model for each Bit-Vector variable. If x[n] was bit-blasted as xn−1, . . . , x0 retrieve SAT assignment for each xi (e.g., x0 = , x1 = ⊥) construct actual value for x[n] by mapping to 1 and ⊥ to 0 (e.g., x[2] = 01) Cons Does not scale very well. Consider the formula ¬(x[n] = 0[32]) ∧ (x[n] AND y[n]) = (x[n] + y[n]). It is unsat for every n. But to prove it for n = 32 requires 64 Boolean variables, to prove it with n = 1024 requires 2048 Boolean variables R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 21 / 27
  • 67. Bit-Blasing pros and cons Pros Very easy to write, if compared to write a native Bit-Vector solver Boolean model from SAT can be mapped back to a model for each Bit-Vector variable. If x[n] was bit-blasted as xn−1, . . . , x0 retrieve SAT assignment for each xi (e.g., x0 = , x1 = ⊥) construct actual value for x[n] by mapping to 1 and ⊥ to 0 (e.g., x[2] = 01) Cons Does not scale very well. Consider the formula ¬(x[n] = 0[32]) ∧ (x[n] AND y[n]) = (x[n] + y[n]). It is unsat for every n. But to prove it for n = 32 requires 64 Boolean variables, to prove it with n = 1024 requires 2048 Boolean variables It destroys the structure of the formula. In the encoding x[32] is not seen as a “single object” but each xi is unrelated and independent R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 21 / 27
  • 68. Simplifications We use simplification rules to fight the two problems in previous slide, before bit-blasting everything R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 22 / 27
  • 69. Simplifications We use simplification rules to fight the two problems in previous slide, before bit-blasting everything ψ SMT formula ϕ SAT-solver sat / unsat Bit-Blaster Simplifications R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 22 / 27
  • 70. Simplifications We use simplification rules to fight the two problems in previous slide, before bit-blasting everything ψ SMT formula ϕ SAT-solver sat / unsat Bit-Blaster Simplifications Simplifications exploit properties of Bit-Vectors to try to reduce the complexity of the formula. We see here some examples, but many more rules do exist. Also, it is very important the way they are combined together R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 22 / 27
  • 71. Trivial Simplifications The following are trivial consequences of the semantic of Bit-Vectors and formulæ in general R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 23 / 27
  • 72. Trivial Simplifications The following are trivial consequences of the semantic of Bit-Vectors and formulæ in general Bit-Vectors trivial simplifications t = t ⇒ for a generic term c = d ⇒ ⊥ for two different constants c and d t AND 0 . . . 0 ⇒ 0 . . . 0 for a generic term . . . R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 23 / 27
  • 73. Trivial Simplifications The following are trivial consequences of the semantic of Bit-Vectors and formulæ in general Bit-Vectors trivial simplifications t = t ⇒ for a generic term c = d ⇒ ⊥ for two different constants c and d t AND 0 . . . 0 ⇒ 0 . . . 0 for a generic term . . . ϕ ∧ ϕ ⇒ ϕ for a generic formula ϕ ∧ ⇒ ϕ for a generic formula ϕ ∨ ⇒ for a generic formula . . . R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 23 / 27
  • 74. Ground Term evaluation If a term is ground, i.e., it contains no variables, then it can be always simplified to a single constant R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 24 / 27
  • 75. Ground Term evaluation If a term is ground, i.e., it contains no variables, then it can be always simplified to a single constant Examples: 0000 :: 1000 ⇒ 00001000 0010[1 : 0] ⇒ 10 0100 + 0101 ⇒ 1001 R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 24 / 27
  • 76. Variable Elimination Rule Suppose that the input formula ϕ is of the kind ϕ ∧ (x[n] = t[n]) where x[n] is a variable, and t[n] is a term not containing x[n] R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 25 / 27
  • 77. Variable Elimination Rule Suppose that the input formula ϕ is of the kind ϕ ∧ (x[n] = t[n]) where x[n] is a variable, and t[n] is a term not containing x[n] then we can rewrite ϕ as ϕ [t[n]/x[n]] i.e., we replace every occurrence of x[n] by t[n]. R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 25 / 27
  • 78. Variable Elimination Rule Suppose that the input formula ϕ is of the kind ϕ ∧ (x[n] = t[n]) where x[n] is a variable, and t[n] is a term not containing x[n] then we can rewrite ϕ as ϕ [t[n]/x[n]] i.e., we replace every occurrence of x[n] by t[n]. We save n Boolean variables in the reduction to SAT R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 25 / 27
  • 79. Concatenation Elimination Rule Suppose that we have the equality t[n] :: s[m] = r[n] :: u[m] then, because the concatenations match, we can rewrite it as R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 26 / 27
  • 80. Concatenation Elimination Rule Suppose that we have the equality t[n] :: s[m] = r[n] :: u[m] then, because the concatenations match, we can rewrite it as (t[n] = r[n]) ∧ (s[m] = u[m]) this rewriting may give more opportunity for applications of previous rules R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 26 / 27
  • 81. Exercizes 1 Complete the missing cases in procedures Bit-Blast-Term and Bit-Blast 2 Bit-Blast the formula ¬(x[3] = 000) ∧ (x[3] AND y[3]) = (x[3] + y[3]) 3 Simplify the formula (x[4] :: y[4]) = (z[4] :: x[4]) ∧ ¬(y[4] = z[4]) R. Bruttomesso (SMT) Bit-Vectors 27 Ottobre 2011 27 / 27