L8 understanding-atmega328 p-1

Understanding Atmega328P Microcontroller
(Lecture-8)
R S Ananda Murthy
Associate Professor and Head
Department of Electrical & Electronics Engineering,
Sri Jayachamarajendra College of Engineering,
Mysore 570 006
R S Ananda Murthy Understanding Atmega328P Microcontroller

Atmega328P Features
High Performance, Low Power Atmel AVR 8-Bit
Microcontroller Family.
Advanced RISC Harvard Architecture
131 Powerful Instructions – Most Single Clock Cycle
Execution
32×8 General Purpose Working Registers
Fully Static Operation (with power on, the contents of
registers remain intact even with no clock signal)
Up to 20 MIPS Throughput at 20 MHz
On-chip 2-cycle Multiplier
Operating Voltage
1.8 V to 5.5 V
Temperature Range
−40◦ C to 85◦ C

Atmega328P Features
High Endurance Non-volatile Memory Segments
32 K Bytes of In-System Self-Programmable Flash program
memory
1 K Bytes EEPROM
2 K Bytes Internal SRAM
Write/Erase Cycles: 10,000 Flash/100,000 EEPROM
Optional Boot Code Section with Independent Lock Bits
Programming Lock for Software Security
I/O and Packages
23 Programmable I/O Lines
28-pin PDIP, 32-lead TQFP, 28-pad QFN/MLF and 32-pad
QFN/MLF

Atmega328P Features
Peripheral Features
Two 8-bit Timer/Counters with Separate Prescaler and
Compare Mode
One 16-bit Timer/Counter with Separate Prescaler,
Compare Mode, and Capture Mode
Real Time Counter with Separate Oscillator
Six PWM Channels
8-channel 10-bit ADC in TQFP and QFN/MLF package
6-channel 10-bit ADC in PDIP Package
Programmable Serial USART
Master/Slave SPI Serial Interface
Byte-oriented 2-wire Serial Interface (Philips I2C
compatible)
Programmable Watchdog Timer with Separate On-chip
Oscillator
On-chip Analog Comparator
Interrupt and Wake-up on Pin Change

Atmega328P Features
Special Microcontroller Features
Power-on Reset and Programmable Brown-out Detection
Internal Calibrated Oscillator
External and Internal Interrupt Sources
Six Sleep Modes: Idle, ADC Noise Reduction, Power-save,
Power-down, Standby, and Extended Standby
Speed Grade
0 - 4 MHz @ 1.8 - 5.5V, 0 - 10 MHz @ 2.7 - 5.5 V, 0 -
20MHz @ 4.5 - 5.5 V
Power Consumption at 1 MHz, 1.8 V, 25◦C
Active Mode: 0.2mA
Power-down Mode: 0.1µA
Power-save Mode: 0.75µA (Including 32kHz RTC)

Types of Atmega328P Packages
28-Pin Plastic Dual In-line Package (PDIP)

32-pin Thin Quad Flat Package (TQFP)

32-pin Micro Lead Frame (MLF) or
Quad Flat No-leads (QFN) package.
A similar 28-pin package is also available.

Atmega328P PDIP Pinout Details
Many pins have more than one function

Atmega328P PDIP Signals

Atmega328P 32-TQFP Signals

Atmega328P 32-MLF Signals

Pin Descriptions of Atmega328P
Vcc – Supply voltage.
GND – Ground.
Port B (PB7:0) XTAL1/XTAL2/TOSC1/TOSC2 – 8-bit
bi-directional I/O port with internal pull-up resistors.
Across PB7 and PB6 external oscillator or quartz crystal
should be connected to generate chip clock signal if
internal oscillator is not used.
PB7 and PB6 is used as TOSC2...1 input for the
Asynchronous Timer/Counter2 if the AS2 bit in ASSR is
set, when internal chip clock is used.

Port C (PC5:0) – These are six lines of 7-bit bi-directional
I/O port with internal pull-up resistors.
PC6/RESET – Depending upon how the chip is
programmed, this pin can be used as an I/O pin or as input
to reset the MCU.
Port D (PD7:0) – 8-bit bi-directional I/O port with internal
pull-up resistors.

AVcc – supply voltage pin for the A/D Converter, PC3:0,
and ADC7:6. It should be externally connected to Vcc ,
even if the ADC is not used. If the ADC is used, it should
be connected to Vcc through a low-pass ﬁlter.
AREF – the analog reference pin for the A/D Converter.
ADC7:6 (TQFP and QFN/MLF Package Only) – in the
TQFP and QFN/MLF package, ADC7:6 serve as analog
inputs to the A/D converter. These pins are powered from
the analog supply and serve as 10-bit ADC channels.

Atmega328P Internal Block Diagram

Atmega328P CPU Core Architecture

Flash Program Memory in Atmega328P – 16K×16
16 Bits
D15 D14 D0D1D2. . . . . . . . . . .
$0000
$3FFF
Application Program
Section
Bootloader Section
Hex Address
16 K = 16384
Locations
Size of bootloader
section is configurable
using fuse bits
Bootloader is a
program executed by
the MCU to write code
into the flash memory
or read the code from
program memory.
Can endure at least 10,000 write/erase cycles. Nonvolatile.
Since the program memory address has 14 bits, the
Program Counter width is also 14 bits.
Bootloader can be protected using lock bits.

SRAM Data Memory in Atmega328P – Volatile
32 Registers (GPRs)
D0D1D2. . . . . . . . . . . .
0x0000 - 0x001F
Hex Addresses
64 I/O Registers (SFRs)
D7
160 Ext I/O Registers
0x0020 - 0x005F
2048 x 8 Scratch Pad
0x0060 - 0x00FF
0x0100 - 0x08FF
8 Bits
Stores operands and results
of arithmetic/logical operations
Used to access peripherals
Used to access extra peripherals
Used to store temporary data

EEPROM in Atmega328P
Size is 1 K×8.
It is organized as a separate data space, in which single
bytes can be read and written.
Can endure at least 100,000 write/erase cycles.
Non-volatile storage for program speciﬁc data, constants,
etc.
Requires special write sequence to store data.
Should be accessed using EEPROM Address Register,
EEPROM Data Register and EEPROM Control Register.

License
This work is licensed under a
Creative Commons Attribution 4.0 International License.

L8 understanding-atmega328 p-1

Recommandé

Recommandé

Contenu connexe

Tendances

Tendances (20)

Similaire à L8 understanding-atmega328 p-1

Similaire à L8 understanding-atmega328 p-1 (20)

Plus de rsamurti

Plus de rsamurti (20)

Dernier

Dernier (20)

L8 understanding-atmega328 p-1