1. Record PVCR GaAs-based Tunnel Diodes Fabricated on Si Substrates using Aspect Ratio Trapping S. L. Rommel 1 , D. Pawlik 1 , P. Thomas 1 , M. Barth 1 , K. Johnson 1 , S. Kurinec 1 , A. Seabaugh 2 , Z. Cheng 3 , J. Li 3 , J. Park 3 , J. Hydrick 3 , N. Bai 3 , M. Carroll 3 , J. G. Fiorenza 3 , and A. Lochtefeld 3 1 Department of Microelectronic Engineering, Rochester Institute of Technology, Rochester, NY 14623 USA 2 Department of Electrical Engineering, University of Notre Dame, South Bend, IN 46556 USA 3 Amberwave Systems Corporation, Salem, NH 03079-4235 USA
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10. Coalesced Ge InGaAs/GaAs TD Strained InGaAs/top contact (Some layers are all InGaAs) Gold Contact GaAs/Ge heterointerface TEM image of Fabricated Device illustrates strained InGaAs diode layer. GaAs/InGaAs Device Concept Si Substrate Ge filled SiO 2 trenches
22. RIT: R. Rafaelle, S. Hubbard, S. Polly, C. Bailey, and SMFL Staff Amberwave: M. Curtin, C. Major and the other lab staff Micron Technology: D. MacMahon (TEM imaging) Silvaco Corporation: TCAD software donation Project supported by National Science Foundation grants ECCS-0725760 and ECCS-0832653 Acknowledgements