GSM based patient monitoring system

GSM BASEDPATIENT MONITORIG SYSTEM 2013
1. INTRODUCTION
As the goal of this project, we see a device that can detect ailments in a patient and
inform them to the concerned medical personnel, without the intervention of even the patient
himself. This process is done with the help of GSM technology. The GSM technology is used
for reading and sending SMS to the concerned person.
Global system for mobile communication (GSM) is a globally accepted standard for
digital cellular communication. GSM is the name of a standardization group established in
1982 to create a common European mobile telephone standard that would formulate
specifications for a pan-European mobile cellular radio system operating at 900 MHz. It is
estimated that many countries outside of Europe will join the GSM partnership.
PYDAH COLLEGE OF ENGINEERING, PATAVALA Page 1

2.1 BLOCK DIAGRAM:
FIGURE1:BLOCK DIAGRAM
2.2 BLOCK DIAGRAM DESCRIPTION:
Block diagram comprises of Microcontroller, heart beat sensor, temperature sensor,
regulated power supply, LCD display, ADC (analog to digital converter)
The heart beat and temperature sensor are interfaced to microcontroller via port pins . Heart
beat rate is produced from the LM358 op-amp temperature rate produced by LM35 is fed to
microcontroller via ADC(analog to digital converter). An LCD is used to display the sensed
data.
Most digital logic circuits and processors need a 5 volt power supply. To use these parts we
need to build a regulated 5 volt source. Usually you start with an unregulated power To make
a 5 volt power supply, we use a LM7805 voltage regulator IC (Integrated Circuit).

The heart beat circuitry consists of a Quad Op-amp IC and three electrodes. These
electrodes are placed to the patient who is suffering with high B.P as well as heart problems.
The output of this circuitry is considered into logic levels and this output is given to one of
the pin of the micro controller.
The GSM Modem is used for sending and receiving messages from the patient to a
doctor and vice versa. Whenever the heart beat rate or the B.P. exceeds the threshold value.
The micro controller will automatically send the signals to the GSM Modem. Through the
GSM Modem, the message will gives to the concerned person or a doctor.
The LCD display is used to display the status of the GSM modem and as well as the
heart beat rate continuously.
For the circuitry operation, it requires the +5V DC power supply.

3.CIRCUIT SCHEMATICS
The circuit schematic is divided into four modules
3.1 LM35 sensor interfaced with AT89C52
3.2 Heart rate sensor interfaced with AT89C52
3.3 GSM interfaced with AT89C52.
3.4 LCD interfaced with AT89C52.
3.1 LM35 SENSOR INTERFACED WITH AT89C52.
FIGURE2:LM35 SENSOR INTERFACEING CIRCUIT

LM35 is a precision IC temperature sensor with its output proportional to the temperature (in
oC). The sensor circuitry is sealed and therefore it is not subjected to oxidation and other
processes. With LM35, temperature can be measured more accurately than with a
thermistor. It also possess low self heating and does not cause more than 0.1 oC temperature
rise in still air.
Analog to digital converters find huge application as an intermediate device to convert the
signals from analog to digital form. These digital signals are used for further processing by
the digital processors. Various sensors like temperature, pressure, force etc. convert the
physical characteristics into electrical signals that are analog in nature.
3.2 HEART RATE SENSOR INTERFACED WITH AT89C52.
FIGURE3:HEART RATE SENSOR INTERFACEING CIRCUIT
The heart beat sensor (Electrodes) circuitry is connected to the P3.2 of the micro
controller. The heart beat circuitry consists of a Quad Op-amp IC and three electrodes. These
electrodes are placed to the patient who is suffering with high B.P as well as heart problems.
The output of this circuitry is considered into logic levels and this output is given to one of
the pin of the micro controller.

3.3 GSM INTERFACED WITH AT89C52:
FIGURE4:GSM MODEM INTERFACEING CIRCUIT
In order to interface the GSM to the microcontroller we are using the UART device. One pin
of UART is connected to GSM . DTE and DCE
The terms DTE and DCE are very common in the data communications market. DTE is short
for Data Terminal Equipment and DCE stands for Data Communications Equipment. As the
full DTE name indicates this is a piece of device that ends a communication line, whereas the
DCE provides a path for communication.
For example, the PC is a Data Terminal (DTE). The two modems (yours and that one of your
provider) are DCEs, they make the communication between you and your provider possible.

RS-232
In telecommunications, RS-232 is a standard for serial binary data signals connecting
between a DTE (Data terminal equipment) and a DCE (Data Circuit-terminating Equipment).
It is commonly used in computer serial ports. In RS-232, data is sent as a time-series of bits.
Both synchronous and asynchronous transmissions are supported by the standard. In addition
to the data circuits, the standard defines a number of control circuits used to manage the
connection between the DTE and DCE. Each data or control circuit only operates in one
direction that is, signaling from a DTE to the attached DCE or the reverse. Since transmit
data and receive data are separate circuits, the interface can operate in a full duplex manner,
supporting concurrent data flow in both directions. The standard does not define character
framing within the data stream, or character encoding.
FIGURE5: FEMALE 9 PIN PLUG
Functions Signals PIN DTE DCE
Data TxD 3 Output Input
RxD 2 Input Output
Handshake
RTS 7 Output Input
CTS 8 Input Output
DSR 6 Input Output
DCD 1 Input Output

STR 4 Output Input
Common Com 5 -- --
Other RI 9 Output Input
TABLE1:RS-232 SIGNALS
RS-232 Signals
1. Transmitted Data (TxD)
Data sent from DTE to DCE.
2. Received Data (RxD)
Data sent from DCE to DTE.
3. Request To Send (RTS)
Asserted (set to 0) by DTE to prepare DCE to receive data. This may require action
on the part of the DCE, e.g. transmitting a carrier or reversing the direction of a half-duplex
line.
4. Clear To Send (CTS)
Asserted by DCE to acknowledge RTS and allow DTE to transmit.
5. Data Terminal Ready (DTR)
Asserted by DTE to indicate that it is ready to be connected. If the DCE is a modem,
it should go "off hook" when it receives this signal. If this signal is de-asserted, the modem
should respond by immediately hanging up.
6. Data Set Ready (DSR)

Asserted by DCE to indicate an active connection. If DCE is not a modem (e.g. a
null-modem cable or other equipment), this signal should be permanently asserted (set to 0),
possibly by a jumper to another signal.
7. Carrier Detect (CD)
Asserted by DCE when a connection has been established with remote equipment.
8. Ring Indicator (RI)
Asserted by DCE when it detects a ring signal from the telephone line.
RTS/CTS Handshaking
The standard RS-232 use of the RTS and CTS lines is asymmetrical. The DTE asserts RTS to
indicate a desire to transmit and the DCE asserts CTS in response to grant permission. This
allows for half-duplex modems that disable their transmitters when not required and must
transmit a synchronization preamble to the receiver when they are re-enabled. There is no
way for the DTE to indicate that it is unable to accept data from the DCE. A non-standard
symmetrical alternative is widely used: CTS indicates permission from the DCE for the DTE
to transmit, and RTS indicates permission from the DTE for the DCE to t ransmit. The
"request to transmit" is implicit and continuous. The standard defines RTS/CTS as the
signaling protocol for flow control for data transmitted from DTE to DCE. The standard has
no provision for flow control in the other direction. In practice, most hardware seems to have
repurposed the RTS signal for this function. A minimal “3-wire” RS-232 connection
consisting only of transmits data, receives data and
Ground, and is commonly used when the full facilities of RS-232 are not required. When
only flow control is required, the RTS and CTS lines are added in a 5-wire version. In our
case it was imperative that we connected the RTS line of the microcontroller (DTE) to
ground to enable receipt of bit streams from the modem.
Specifying Baud Rate, Parity & Stop bits

Serial communication using RS-232 requires that you specify four parameters: the baud rate
of the transmission, the number of data bits encoding a character, the sense of the optional
parity bit, and the number of stop bits. Each transmitted character is packaged in a character
frame that consists of a single start bit followed by the data bits, the optional parity bit, and
the stop bit or bits. A typical character frame encoding the letter "m" is shown here.
FIGURE6: CHARACTER FRAME ENCODING ‘M’
We specified the parameters as baud rate – 2400 bps, 8 data bits, no parity, and 1 stop bit
(2400-8-N-1). This was set in pre-operational phase while setting up the modem through the
hyper terminal, as per the serial transmission standards in 8052 microcontroller.
3.4 LCD interfaced with AT89C52:
FIGURE7: LCD INTERFACING CIRCUIT

The LCD is interfaced with microcontroller (AT89C52). This microcontroller has 40 pins
with four 8-bit ports (P0, P1, P2, and P3). Here P1 is used as output port which is connected to
data pins of the LCD. The control pins (pin 4-6) are controlled by pins 2-4 of P0 port. Pin 3 is
connected to a preset of 10k? to adjust the contrast on LCD screen.
A 16x2 LCD means it can display 16 characters per line and there are 2 such lines. In this
LCD each character is displayed in 5x7 pixel matrix. This LCD has two registers.
1. Command/Instruction Register - stores the command instructions given to the LCD. A
command is an instruction given to LCD to do a predefined task like initializing, clearing the
screen, setting the cursor position, controlling display etc.
2. Data Register - stores the data to be displayed on the LCD. The data is the ASCII value
of the character to be displayed on the LCD.
Commonly used LCD Command codes:
Hex Code Command to LCD Instruction Register
1 Clear screen display
2 Return home
4 Decrement cursor
6 Increment cursor
E Display ON, Cursor ON
80 Force the cursor to the beginning of the 1st
line
C0 Force cursor to the beginning of the 2nd line
38 Use 2 lines and 5x7 matrix
TABLE2:LCD COMMANDS

4HARDWARE COMPONENTS
The hardware components used in this circuit diagram are
4.1 MICRO CONTROLLER (AT89C52)
4.2 LM35 SENSOR
4.3 LCD
4.4 GSM
4.5 HEARTBEAT SENSOR
4.6 LDR
4.7 ADC
4.8 POWER SUPPLY
4.9 POTENTIOMETER
4.10 RESISTOR
4.11 CAPACITOR
4.12 OP-AMP
4.13 SWITCHE
3.1 Micro Controller 89S52
3.1.1 INTRODUCTION:
A Micro controller consists of a powerful CPU tightly coupled with memory, various
I/O interfaces such as serial port, parallel port timer or counter, interrupt controller, data
acquisition interfaces-Analog to Digital converter, Digital to Analog converter, integrated on
to a single silicon chip
.
If a system is developed with a microprocessor, the designer has to go for external
memory such as RAM, ROM, EPROM and peripherals. But controller is provided all these

facilities on a single chip. Development of a Micro controller reduces PCB size and cost of
design.
One of the major differences between a Microprocessor and a Micro controller is that
a controller often deals with bits not bytes as in the real world application.
Intel has introduced a family of Micro controllers called the MCS-51.
3.1.2 THE MAJOR FEATURES:
 Compatible with MCS-51 products
 4k Bytes of in-system Reprogrammable flash memory
 Fully static operation: 0HZ to 24MHZ
 Three level programmable clock
 128 * 8 –bit timer/counters
 Six interrupt sources
 Programmable serial channel
 Low power idle power-down modes
AT89C52 is 8-bit micro controller, which has 4 KB on chip flash memory, which is
just sufficient for our application. The on-chip Flash ROM allows the program memory to be
reprogrammed in system or by conventional non-volatile memory Programmer. Moreover
ATMEL is the leader in flash technology in today’s market place and hence using AT 89C52
is the optimal solution.
3.1.3 AT89S52 MICROCONTROLLER ARCHITECTURE:
The 89C52 architecture consists of these specific features:
 Eight –bit CPU with registers A (the accumulator) and B
 Sixteen-bit program counter (PC) and data pointer (DPTR)
 Eight- bit stack pointer (PSW)
 Eight-bit stack pointer (Sp)
 Internal ROM or EPROM (8751) of 0(8031) to 4K (89C51)

 Internal RAM of 128 bytes:
 Thirty –two input/output pins arranged as four 8-bit ports:p0-p3
 Two 16-bit timer/counters: T0 and T1
 Full duplex serial data receiver/transmitter: SBUF
 Control registers: TCON, TMOD, SCON, PCON, IP, and IE
 Two external and three internal interrupts sources.
 Oscillator and clock circuits.
FIGURE 8:FUNCTIONAL BLOCK DIAGRAM OF MICROCONTROLLER
3.1.4 TYPES OF MEMORY:
The 89C51 have three general types of memory. They are on-chip memory, external
Code memory and external Ram. On-Chip memory refers to physically existing memory on
the micro controller itself. External code memory is the code memory that resides off chip.
This is often in the form of an external EPROM. External RAM is the Ram that resides off
chip. This often is in the form of standard static RAM or flash RAM.

Code memory
Code memory is the memory that holds the actual 89C51 programs that is to be run.
This memory is limited to 64K. Code memory may be found on-chip or off-chip. It is
possible to have 4K of code memory on-chip and 60K off chip memory simultaneously. If
only off-chip memory is available then there can be 64K of off chip ROM. This is contro lled
by pin provided as EA.
Internal RAM
The 89C51 have a bank of 128 of internal RAM. The internal RAM is found on-chip.
So it is the fastest Ram available. And also it is most flexible in terms of reading and writing.
Internal Ram is volatile, so when 89C51 is reset, this memory is cleared. 128 bytes of internal
memory are subdivided. The first 32 bytes are divided into 4 register banks. Each bank
contains 8 registers. Internal RAM also contains 128 bits, which are addressed from 20h to
2Fh. These bits are bit addressed i.e. each individual bit of a byte can be addressed by the
user. They are numbered 00h to 7Fh. The user may make use of these variables with
commands such as SETB and CLR.
Flash memory is a nonvolatile memory using NOR technology, which allows the user
to electrically program and erase information. Flash memory is used in digital cellular
phones, digital cameras, LAN switches, PC Cards for notebook computers, digital set-up
boxes, embedded controllers, and other devices.

FIGURE 9:PIN DIAGRAM OF AT89S52
3.1.5 PIN DESCRIPTION:
VCC: Supply voltage.
GND: Ground.
Port 0
Port 0 is an 8-bit open-drain bi-directional I/O port. As an output port, each pin can
sink eight TTL inputs. When 1sare written to port 0 pins, the pins can be used as high
impedance inputs. Port 0 may also be configured to be the multiplexed low order address/data
bus during accesses to external program and data memory. In this mode P0 has internal pull-ups.
Port 0 also receives the code bytes during Flash programming, and outputs the code
bytes during program verification. External pull-ups are required during program verification.

Port 1
Port 1 is an 8-bit bi-directional I/O port with internal pull-ups. The Port 1 output
buffers can sink/source four TTL inputs. When 1s are written to Port 1 pins they are pulled
high by the internal pull-ups and can be used as inputs. As inputs, Port 1 pins that are
externally being pulled low will source current (IIL) because of the internal pull-ups. Port 1
also receives the low-order address bytes during Flash programming and verification.
Port 2
externally being pulled low will source current (IIL) because of the internal pull-ups.
Port 3
externally being pulled low will source current (IIL) because of the pull-ups.
Port 3 also serves the functions of various special features of the AT89C51 as listed below:
TABLE3:PORT3 THEIR ALTERNATE FUNCTIONS

RST
Reset input. A high on this pin for two machine cycles while the oscillator is running
resets the device.
ALE/PROG
Address Latch Enable output pulse for latching the low byte of the address during
accesses to external memory. This pin is also the program pulse input (PROG) during Flash
programming. In normal operation ALE is emitted at a constant rate of 1/6the oscillator
frequency, and may be used for external timing or clocking purposes. Note, however, that one
ALE pulse is skipped during each access to external Data Memory.
If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. With the bit
set, ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin is weakly
pulled high. Setting the ALE-disable bit has no effect if the micro controller is in external
execution mode.
PSEN
Program Store Enable is the read strobe to external program memory. When the
AT89C51 is executing code from external program memory, PSEN is activated twice each
machine cycle, except that two PSEN activations are skipped during each access to external
data memory.
EA/VPP
External Access Enable. EA must be strapped to GND in order to enable the device to
fetch code from external program memory locations starting at 0000H up to FFFFH.
Note, however, that if lock bit 1 is programmed, EA will be internally latched on
reset. EA should be strapped to VCC for internal program executions. This pin also receives
the 12-volt programming enable voltage (VPP) during Flash programming, for parts that
require 12-volt VPP.

XTAL1
Input to the inverting oscillator amplifier and input to the internal clock operating
circuit.
XTAL2
Output from the inverting oscillator amplifier.
3.1.6 OSCILLATOR CHARACTERISTICS:
XTAL1 and XTAL2 are the input and output, respectively, of an inverting amplifier,
which can be configured for use as an on-chip oscillator, as shown in Figs 6.1 Either a quartz
crystal or ceramic resonator may be used. To drive the device from an external clock source,
XTAL2 should be left unconnected while XTAL1 is driven as shown in Figure 6.2. There are
no requirements on the duty cycle of the external clock signal, since the input to the internal
clocking circuitry is through a divide-by-two flip- flop, but minimum and maximum voltage
high and low time specifications must be observed.
FIGURE 10: OSCILLATOR FIGURE 11:EXTERNAL CLOCK

3.1.7 REGISTERS:
In the CPU, registers are used to store information temporarily. That information
could be a byte of data to be processed, or an address pointing to the data to be fetched. The
vast majority of 8051 registers are 8–bit registers.
D7 D6 D5 D4 D3 D2 D1 D0
The most widely used registers of the 8051 are A(accumulator), B, R0, R1, R2, R3,
R4, R5, R6, R7, DPTR(data pointer), and PC(program counter). All of the above registers
are 8-bits, except DPTR and the program counter. The accumulator, register A, is used for all
arithmetic and logic instructions.
3.1.8 SFRS (SPECIAL FUNCTION REGISTERS):
In the 8051, registers A, B, PSW and DPTR are part of the group of registers
commonly referred to as SFR (special function registers). The SFR can be accessed by the
names (which is much easier) or by their addresses. For example, register A has address E0h,
and register B has been ignited the address F0H, as shown in table.
The following two points should note about the SFR addresses.
1. The Special function registers have addresses between 80H and FFH. These
addresses are above 80H, since the addresses 00 to 7FH are addresses of RAM
memory inside the 8051.
2. Not all the address space of 80H to FFH is used by the SFR. The unused locations
80H to FFH are reserved and must not be used by the 8051 programmer.
Symbol Name Address
ACC Accumulator 0E0H
B B register 0F0H
PSW Program status word 0D0H
SP Stack pointer 81H
DPTR Data pointer 2 bytes
DPL Low byte 82H
DPH High byte 83H

P0 Port0 80H
P1 Port1 90H
P2 Port2 0A0H
P3 Port3 0B0H
IP Interrupt priority control 0B8H
IE Interrupt enable control 0A8H
TMOD Timer/counter mode control 89H
TCON Timer/counter control 88H
T2CON Timer/counter 2 control 0C8H
T2MOD Timer/counter mode2 control 0C9H
TH0 Timer/counter 0high byte 8CH
TL0 Timer/counter 0 low byte 8AH
TH1 Timer/counter 1 high byte 8DH
TL1 Timer/counter 1 low byte 8BH
TH2 Timer/counter 2 high byte 0CDH
TL2 Timer/counter 2 low byte 0CCH
RCAP2H T/C 2 capture register high byte 0CBH
RCAP2L T/C 2 capture register low byte 0CAH
SCON Serial control 98H
SBUF Serial data buffer 99H
PCON Power control 87H
TABLE 4: 8051 SPECIAL FUNCTION REGISTER ADDRESS

A Register (Accumulator)
This is a general-purpose register, which serves for storing intermediate results during
operating. A number (an operand) should be added to the accumulator prior to execute an
instruction upon it. Once an arithmetical operation is preformed by the ALU, the result is
placed into the accumulator
B Register
B register is used during multiply and divide operations which can be performed only
upon numbers stored in the A and B registers. All other instructions in the program can use
this register as a spare accumulator (A).
Registers (R0-R7)
FIGURE 12:MEMORY ORGANIZATION OF RAM
This is a common name for the total 8 general purpose registers (R0, R1, R2 ...R7).
Even they are not true SFRs, they deserve to be discussed here because of their purpose. The
bank is active when the R registers it includes are in use. Similar to the accumulator, they are
used for temporary storing variables and intermediate results. Which of the banks will be

active depends on two bits included in the PSW Register. These registers are stored in four
banks in the scope of RAM.
3.1.9 REGISTER BANKS AND STACK:
RAM memory space allocation in the 8051
There are 128 bytes of RAM in the 8051. The 128 bytes of RAM inside the 8051 are
assigned addresses 00 to7FH. These 128 bytes are divided into three different groups as
follows:
1. A total of 32 bytes from locations 00 to 1FH hex are set aside for register banks
and the stack.
2. A total of 16 bytes from locations 20 to 2FH hex are set aside for bit-addressable
read/write memory.
3. A total of 80 bytes from locations 30H to 7FH are used for read and write storage,
or what is normally called Scratch pad. These 80 locations of RAM are widely
used for the purpose of storing data and parameters nu 8051 programmers.
Default register bank
Register bank 0; that is, RAM locations 0, 1,2,3,4,5,6, and 7 are accessed with the
names R0, R1, R2, R3, R4, R5, R6, and R7 when programming the 8051.
FIG 13: RAM ALLOCATION IN THE 8051

PSW Register (Program Status Word)
This is one of the most important SFRs. The Program Status Word (PSW) contains
several status bits that reflect the current state of the CPU. This register contains: Carry bit,
Auxiliary Carry, two register bank select bits, Overflow flag, parity bit, and user-definable
status flag. The ALU automatically changes some of register’s bits, which is usually used in
regulation of the program performing.
P - Parity bit. If a number in accumulator is even then this bit will be automatically
set (1), otherwise it will be cleared (0). It is mainly used during data transmission and
receiving via serial communication.
OV Overflow occurs when the result of arithmetical operation is greater than 255
(decimal), so that it cannot be stored in one register. In that case, this bit will be set (1). If
there is no overflow, this bit will be cleared (0).
RS0, RS1 - Register bank select bits. These two bits are used to select one of the
four register banks in RAM. By writing zeroes and ones to these bits, a group of registers R0-
R7 is stored in one of four banks in RAM. This is a general-purpose bit available to the user.
RS1 RS2 Space in RAM
0 0 Bank0 00h-07h
0 1 Bank1 08h-0Fh
1 0 Bank2 10h-17h
1 1 Bank3 18h-1Fh
TABLE 5: REGISTER BANK SELECT

AC - Auxiliary Carry Flag is used for BCD operations only.
CY - Carry Flag is the (ninth) auxiliary bit used for all arithmetical operations and
shift instructions.
DPTR Register (Data Pointer)
These registers are not true ones because they do not physically exist. They consist of
two separate registers: DPH (Data Pointer High) and (Data Pointer Low). Their 16 bits are
used for external memory addressing. They may be handled as a 16-bit register or as two
independent 8-bit registers. Besides, the DPTR Register is usually used for storing data and
intermediate results, which have nothing to do with memory locations.
SP Register (Stack Pointer)
The stack is a section of RAM used by the CPU to store information temporily. This
information could be data or an address. The CPU needs this storage area since there are
only a limited number of registers.
How stacks are accessed in the 8051
If the stack is a section of RAM, there must be registers inside the CPU to point to it.
The register used to access the stack is called the SP (Stack point) Register. The stack pointer
in the 8051 is only 8 bits wide; which means that it can take values of 00 to FFH. When the
8051 is powered up, the SP register contains value 07. This means that RAM location 08 is
the first location used for the stack by the 8051. The storing of a CPU register in the stack is

called a PUSH, and pulling the contents off the stack back into a CPU register is called a
POP. In other words, a register is pushed onto the stack to save it and popped off the stack to
retrieve it. The job of the SP is very critical when push and pop actions are performed.
3.1.10 PROGRAM COUNTER:
The important register in the 8051 is the PC (Program counter). The program counter
points to the address of the next instruction to be executed. As the CPU fetches the opcode
from the program ROM, the program counter is incremented to point to the next instruction.
The program counter in the 8051 is 16bits wide. This means that the 8051 can access
program addresses 0000 to FFFFH, a total of 64k bytes of code. However, not all members
of the 8051 have the entire 64K bytes of on-chip ROM installed, as we will see soon.
3.1.11 TIMERS:
On-chip timing/counting facility has proved the capabilities of the micro controller for
implementing the real time application. These includes pulse counting, frequency
measurement, pulse width measurement, baud rate generation, etc,. Having sufficient number
of timer/counters may be a need in a certain design application. The 8051 has two
timers/counters. They can be used either as timers to generate a time delay or as counters to
count events happening outside the micro controller.
TIMER 0 REGISTERS
The 16-bit register of Timer 0 is accessed as low byte and high byte. the low byte
register is called TL0(Timer 0 low byte)and the high byte register is referred to as TH0(Timer
0 high byte).These register can be accessed like any other register, such as A,B,R0,R1,R2,etc.

TIMER 1 REGISTERS
Timer 1 is also 16-bit register is split into two bytes, referred to as TL1 (Timer 1 low
byte) and TH1 (Timer 1 high byte). These registers are accessible n the same way as the
register of Timer 0.
TMOD (timer mode) REGISTER
Both timers 0 and 1 use the same register, called TMOD, to set the various timer
operation modes. TMOD is an 8-bit register in which the lower 4 bits are set aside for Timer
0 and the upper 4 bits for Timer 1.in each case; the lower 2 bits are used to set the t imer mode
and the upper 2 bits to specify the operation.
GATE Gate control when set. The timer/counter is enabled only
while the INTx pin is high and the TRx control pin is
set. When cleared, the timer is enabled.
C/T Timer or counter selected cleared for timer operation
(Input from internal system clock).set for counter
operation (input TX input pin).

M1 M0 MODE Operating Mode
0 0 0 13-bit timer mode
8-bit timer/counter THx with TLx as 5-bit prescaler.
0 1 1 16-bit timer mode
16-bit timer/counters THx with TLx are cascaded; there is no
prescaler
1 0 2 8-bit auto reload 8-bit auto reload timer/counter;THx Holds a
value that is to be reloaded into TLx each time it overflows
1 1 3 Split timer mode.
TABLE6:TMOD SELECTION
C/T (clock/timer)
This bit in the TMOD register is used to decide whether the timer is used as a delay
generator or an event counter. If C/T=0, it is used as a timer for time delay generation. The
clock source for the time delay is the crystal frequency of the 8051.this section is concerned
with this choice. The timer’s use as an event counter is discussed in the next section.
3.1.12 SERIAL COMMUNICATION:
Serial data communication uses two methods, asynchronous and synchronous. The
synchronous method transfers a block of data at a time, while the asynchronous method
transfers a single byte at a time.
In data transmission if the data can be transmitted and received, it is a duplex
transmission. This is in contrast to simplex transmissions such as with printers, in which the
computer only sends data. Duplex transmissions can be half or full duplex, depending on
whether or not the data transfer can be simultaneous. If data is transmitted one way at a time,
it is referred to as half duplex. If the data can go both ways at the same time, it is full dup lex.

Of course, full duplex requires two wire conductors for the data lines, one for transmission
and one for reception, in order to transfer and receive data simultaneously.
Asynchronous serial communication and data framing
The data coming in at the receiving end of the data line in a serial data transfer is all
0s and 1s; it is difficult to make sense of the data unless the sender and receiver agree on a set
of rules, a protocol, on how the data is packed, how many bits constitute a character, and
when the data begins and ends.
Start and stop bits
Asynchronous serial data communication is widely used for character-oriented
transmissions, while block-oriented data transfers use the synchronous method. In the
asynchronous method, each character is placed between start and stop bits. This is called
framing. In the data framing for asynchronous communications, the data, such as ASCII
characters, are packed between a start bit and a stop bit. The start bit is always one bit, but the
stop bit can be one or two bits. The start bit is always a 0 (low) and the stop bit (s) is 1
(high).
Data transfer rate
The rate of data transfer in serial data communication is stated in bps (bits per
second). Another widely used terminology for bps is baud rate. However, the baud and bps
rates are not necessarily equal. This is due to the fact that baud rate is the modem
terminology and is defined as the number of signal changes per second. In modems a single
change of signal, sometimes transfers several bits of data. As far as the conductor wire is
concerned, the baud rate and bps are the same, and for this reason we use the bps and baud
interchangeably.
3.1.13 RS232 STANDARDS:
To allow compatibility among data communication equipment made by various
manufacturers, an interfacing standard called RS232 was set by the Electronics Industries
Association (EIA) in 1960. In 1963 it was modified and called RS232A. RS232B AND
RS232C were issued in 1965 and 1969, respectively. Today, RS232 is the most widely used

serial I/O interfacing standard. This standard is used in PCs and numerous types of
equipment. However, since the standard was set long before the advert of the TTL logic
family, its input and output voltage levels are not TTL compatible. In RS232, a 1 is
represented by -3 to -25V, while a 0 bit is +3 to +25V, making -3 to +3 undefined. For this
reason, to connect any RS232 to a micro controller system we must use voltage converters
such as MAX232 to convert the TTL logic levels to the RS232 voltage levels, and vice versa.
MAX232 IC chips are commonly referred to as line drivers.
RS232 pins
RS232 cable, commonly referred to as the DB-25 connector. In labeling, DB-25P
refers to the plug connector (male) and DB-25S is for the socket connector (female). Since
not all the pins are used in PC cables, IBM introduced the DB-9 Version of the serial I/O
standard, which uses 9 pins only, as shown in table.
DB-9 pin connector
1 2 3 4 5
6 7 8 9
FIG14: DB-9 PIN CONNECTOR
Pin Functions
Pin Description
1 Data carrier detect (DCD)
2 Received data (RXD)
3 Transmitted data (TXD)
4 Data terminal ready(DTR)
5 Signal ground (GND)
6 Data set ready (DSR)
7 Request to send (RTS)
8 Clear to send (CTS)
9 Ring indicator (RI)
TABLE 7 : DB9 PIN FUNCTIONS

Note: DCD, DSR, RTS and CTS are active low pins.
The method used by RS-232 for communication allows for a simple connection of
three lines: Tx, Rx, and Ground. The three essential signals for 2-way RS-232
Communications are these
TXD: carries data from DTE to the DCE.
RXD: carries data from DCE to the DTE
SG: signal ground
3.1.14 8052 CONNECTION TO RS232:
The RS232 standard is not TTL compatible; therefore, it requires a line driver such as
the MAX232 chip to convert RS232 voltage levels to TTL levels, and vice versa. The
interfacing of 8051 with RS232 connectors via the MAX232 chip is the main topic.
The 8051 has two pins that are used specifically for transferring and receiving data
serially. These two pins are called TXD and RXD and a part of the port 3 group (P3.0 and
P3.1). pin 11 of the 8051 is assigned to TXD and pin 10 is designated as RXD. These pins
are TTL compatible; therefore, they require a line driver to make them RS232 compatible.
One such line driver is the MAX232 chip.
Since the RS232 is not compatible with today’s microprocessors and
microcontrollers, we need a line driver (voltage converter) to convert the RS232’s signals to
TTL voltage levels that will be acceptable to the 8051’s TXD and RXD pins. O ne example
of such a converter is MAX232 from Maxim Corp. The MAX232 converts from RS232
voltage levels to TTL voltage levels, and vice versa.

Embedded
Controller
TXD
RXD
RXD
TXD
2
3
5
GND
MAX 232
FIGURE 15:INTERFACING OF MAX-232 TO CONTROLLER
3.1.15 INTERRUPTS:
A single micro controller can serve several devices. There are two ways to do that:
INTERRUPTS or POLLING.
INTERRUPTS vs POLLING
The advantage of interrupts is that the micro controller can serve many devices (not
all the same time, of course); each device can get the attention of the micro controller based
on the priority assigned to it. The polling method cannot assign priority since it checks all
devices in round-robin fashion. More importantly, in the interrupt method the micro
controller can also ignore (mask) a device request for service. This is again not possible with
the polling method. The most important reason that the interrupt method is preferable is that
the polling method wastes much of the micro controller’s time by polling devices that do not
need service. So, in order to avoid tying down the micro controller, interrupts are used.
INTERRUPT SERVICE ROUTINE
For every interrupt, there must be an interrupt service routine (ISR), or interrupt
handler. When an interrupt is invoked, the micro controller runs the interrupts service routine.
For every interrupt, there is a fixed location in memory that holds the address of its ISR. The
group of memory location set aside to hold the addresses of ISRs is called the interrupt vector
table. Shown below:

INTERRUPT ROM
LOCATION
(HEX)
PIN FLAG CLEARING
Reset
External hardware Interrupt 0
Timers0interrupt(TF0)
External hardware
Interrupt(INT1)
Timers 1 interrupt (TF1)
Serial COM (RI and TI)
0000
0003
000B
0013
001B
0023
9
P3.2 (12)
P3.4 (14)
P3.3 (13)
P3. 5(15)
10,11
auto
auto
auto
auto
auto
Programmer
Clears it
TABLE 8: INTERRUPT VECTOR TABLE FOR THE 8051
Six Interrupts in the 8051
In reality, only five interrupts are available to the user in the 8051, but many
manufacturers’ data sheets state that there are six interrupts since they include reset .the six
interrupts in the 8051 are allocated as above.
1. Reset. When the reset pin is activated, the 8051 jumps to address location 0000.this is
the power-up reset.
2. Two interrupts are set aside for the timers: one for Timer 0 and one for Timer
1.Memory location 000BH and 001BH in the interrupt vector table belong to Timer 0
and Timer 1, respectively.
3. Two interrupts are set aside for hardware external harder interrupts. Pin number
12(P3.2) and 13(P3.3) in port 3 is for the external hardware interrupts INT0 and
INT1, respectively. These external interrupts are also referred to as EX1 and
EX2.Memory location 0003H and 0013H in the interrupt vector table are assigned to
INT0 and INT1, respectively.
4. Serial communication has a single interrupt that belongs to both receive and transmit.
The interrupt vector table location 0023H belongs to this interrupt.

Interrupt Enable Register
D7 D6 D5 D4 D3 D2 D1 D0
EA -- ET2 ES ET1 EX1 ET0 EX0
EA IE.7 disables all interrupts. If EA=0, no interrupts is acknowledged.
If EA=1, each interrupt source is individually enabled disabled
By setting or clearing its enable bit.
-- IE.6 Not implemented, reserved for future use.*
ET2 IE.5 Enables or disables Timer 2 overflow or capture interrupt (8052
Only).
ES IE.4 Enables or disables the serial ports interrupt.
ET1 IE.3 Enables or disables Timers 1 overflow interrupt
EX1 IE.2 Enables or disables external interrupt 1.
ET0 IE.1 Enables or disables Timer 0 overflow interrupt.
EX0 IE.0 Enables or disables external interrupt
4.2 TEMPERATURE SENSOR(LM35):
LM35 converts temperature value into electrical signals. LM35 series sensors are precision
integrated-circuit temperature sensors whose output voltage is linearly proportional to the
Celsius temperature. The LM35 requires no external calibration since it is internally
calibrated. . The LM35 does not require any external calibration or trimming to provide
typical accuracies of ±1⁄4°C at room temperature and ±3⁄4°C over a full −55 to +150°C
temperature range.

The LM35’s low output impedance, linear output, and precise inherent calibration make
interfacing to readout or control circuitry especially easy. It can be used with single power
supplies, or with plus and minus supplies. As it draws only 60 μA from its supply, it has very
low self-heating, less than 0.1°C in still air.
Features
 Calibrated directly in ° Celsius (Centigrade)
 Linear + 10.0 mV/°C scale factor
 0.5°C accuracy guaranteed (at +25°C)
 Rated for full −55° to +150°C range
 Suitable for remote applications
 Low cost due to wafer-level trimming
 Operates from 4 to 30 volts
 Less than 60 μA current drain
 Low self-heating, 0.08°C in still air
 Nonlinearity only ±1⁄4°C typical
 Low impedance output, 0.1 W for 1 mA load
The characteristic of this LM35 sensor is:
For each degree of centigrade temperature it outputs 10milli volts.

4.3LCD:
A 16x2 LCD means it can display 16 characters per line and there are 2 such lines. In this
LCD each character is displayed in 5x7 pixel matrix. This LCD has two registers, namely,
Command and Data.
The command register stores the command instructions given to the LCD. A command is an
instruction given to LCD to do a predefined task like initializing it, clearing its screen, setting
the cursor position, controlling display etc. The data register stores the data to be displayed
on the LCD. The data is the ASCII value of the character to be displayed on the LCD.
A liquid crystal display (LCD) is a thin, flat electronic visual display that uses the
light modulating properties of liquid crystals (LCs). LCs do not emit light directly.
They are used in a wide range of applications including: computer monitors,
television, instrument panels, aircraft cockpit displays, signal, etc. They are common in
consumer devices such as video players, gaming devices, clocks, watches, calculators, and
telephones. LCDs have displaced cathode ray tube (CRT) displays in most applications. They
are usually more compact, lightweight, portable, less expensive, more reliable, and easier on
the eyes. They are available in a wider range of screen sizes than CRT and plasma displays,
and since they do not use phosphors, they cannot suffer image burn-in.
Each pixel of an LCD typically consists of a layer of molecules aligned between two
transparent electrodes, and two polarizing filters the axes of transmission of which are (in
most of the cases) perpendicular to each other. With no actual liquid crystal between the
polarizing filters, light passing through the first filter would be blocked by the second
(crossed) polarizer. In most of the cases the liquid crystal has double refraction
The surface of the electrodes that are in contact with the liquid crystal material are
treated so as to align the liquid crystal molecules in a particular direction. This treatment
typically consists of a thin polymer layer that is unidirectionally rubbed using, for example, a
cloth. The direction of the liquid crystal alignment is then defined by the direction of rubbing.
Electrodes are made of a transparent conductor called Indium Tin Oxide (ITO).

If the applied voltage is large enough, the liquid crystal molecules in the center of the
layer are almost completely untwisted and the polarization of the incident light is not rotated
as it passes through the liquid crystal layer. This light will then be mainly polarized
perpendicular to the second filter, and thus be blocked and the pixel will appear black.
FIG 16 : LCD DISPLAY
LCD with top polarizer removed from device and placed on top, such that the top and
bottom polarizer’s are parallel.
The optical effect of a twisted nematic device in the voltage-on state is far less
dependent on variations in the device thickness than that in the voltage-off state. Because of
this, these devices are usually operated between crossed polarizer such that they appear bright
with no voltage . These devices can also be operated between parallel polarizer, in which case
the bright and dark states are reversed. The voltage-off dark state in this configuration
appears blotchy, however, because of small variations of thickness across the device.
Both the liquid crystal material and the alignment layer material contain ionic
compounds. If an electric field of one particular polarity is applied for a long period of time,
this ionic material is attracted to the surfaces and degrades the device performance. This is

avoided either by applying an alternating current or by reversing the polarity of the electric
field as the device is addressed .
When a large number of pixels are needed in a display, it is not technically possible to
drive each directly since then each pixel would require independent electrodes. Instead, the
display is multiplexed. In a multiplexed display, electrodes on one side of the display are
grouped and wired together (typically in columns), and each group gets its own voltage
source. On the other side, the electrodes are also grouped (typically in rows), with each group
getting a voltage sink.
PIN DESCRIPTION:
Most LCDs with 1 controller has 14 Pins and LCDs with 2 controller has 16 Pins (two
pins are extra in both for back-light LED connections).
Figure 17: PIN DIAGRAM OF 1X16 LINES LCD

TABLE 9: PIN DESCRIPTION OF LCD
CONTROL LINES
EN:
Line is called "Enable." This control line is used to tell the LCD that you are sending
it data. To send data to the LCD, your program should make sure this line is low (0) and then
set the other two control lines and/or put data on the data bus. When the other lines are
completely ready, bring EN high (1) and wait for the minimum amount of time required by
the LCD datasheet (this varies from LCD to LCD), and end by bringing it low (0) again.
RS:
Line is the "Register Select" line. When RS is low (0), the data is to be treated as a
command or special instruction (such as clear screen, position cursor, etc.). When RS is high
(1), the data being sent is text data which would be displayed on the screen. For example, to
display the letter "T" on the screen you would set RS high.
RW:
Line is the "Read/Write" control line. When RW is low (0), the information on the
data bus is being written to the LCD. When RW is high (1), the program is effectively
querying (or reading) the LCD. Only one instruction ("Get LCD status") is a read command.
All others are write commands, so RW will almost always be low.

Finally, the data bus consists of 4 or 8 lines (depending on the mode of operation
selected by the user). In the case of an 8-bit data bus, the lines are referred to as DB0, DB1,
DB2, DB3, DB4, DB5, DB6, and DB7.
Logic status on control lines:
 E - 0 Access to LCD disabled
-1 Access to LCD enabled
 R/W - 0 Writing data to LCD
-1 Reading data from LCD
 RS - 0 Instructions
-1 Character
Writing data to the LCD:
1) Set R/W bit to low
2) Set RS bit to logic 0 or 1 (instruction or character)
3) Set data to data lines (if it is writing)
4) Set E line to high
5) Set E line to low
Read data from data lines (if it is reading)on LCD:
1) Set R/W bit to high
2) Set RS bit to logic 0 or 1 (instruction or character)
3) Set data to data lines (if it is writing)
4) Set E line to high
5) Set E line to low

4.4 GSM MODEM:
GSM Technology:
Definition of GSM:
GSM (Global System for Mobile communications) is an open, digital cellular technology
used for transmitting mobile voice and data services.
GSM (Global System for Mobile communication) is a digital mobile telephone system that is
widely used in Europe and other parts of the world. GSM uses a variation of Time Division
Multiple Access (TDMA) and is the most widely used of the three digital wireless telephone
technologies (TDMA, GSM, and CDMA). GSM digitizes and compresses data, then sends it
down a channel with two other streams of user data, each in its own time slot. It operates at
either the 900 MHz or 1,800 MHz frequency band. It supports voice calls and data transfer
speeds of up to 9.6 kbit/s, together with the transmission of SMS (Short Message Service).
History
In 1982, the European Conference of Postal and Telecommunications Administrations
(CEPT) created the Group Special Mobile (GSM) to develop a standard for a mobile
telephone system that could be used across Europe. In 1987, a memorandum of
understanding was signed by 13 countries to develop a common cellular telephone system
across Europe. Finally the system created by SINTEF lead by Torleiv Maseng was selected.
In 1989, GSM responsibility was transferred to the European Telecommunications Standards
Institute (ETSI) and phase I of the GSM specifications were published in 1990. The first
GSM network was launched in 1991 by Radiolinja in Finland with joint technical
infrastructure maintenance from Ericsson.
By the end of 1993, over a million subscribers were using GSM phone networks being
operated by 70 carriers across 48 countries. As of the end of 1997, GSM service was
available in more than 100 countries and has become the de facto standard in Europe and
Asia.

GSM Frequencies
GSM networks operate in a number of different frequency ranges (separated into GSM
frequency ranges for 2G and UMTS frequency bands for 3G). Most 2G GSM networks
operate in the 900 MHz or 1800 MHz bands. Some countries in the Americas (including
Canada and the United States) use the 850 MHz and 1900 MHz bands because the 900 and
1800 MHz frequency bands were already allocated. Most 3G GSM networks in Europe
operate in the 2100 MHz frequency band. The rarer 400 and 450 MHz frequency bands are
assigned in some countries where these frequencies were previously used for first-generation
systems.
GSM-900 uses 890–915 MHz to send information from the mobile station to the base station
(uplink) and 935–960 MHz for the other direction (downlink), providing 124 RF channels
(channel numbers 1 to 124) spaced at 200 kHz. Duplex spacing of 45 MHz is used. In some
countries the GSM-900 band has been extended to cover a larger frequency range. This
'extended GSM', E-GSM, uses 880–915 MHz (uplink) and 925–960 MHz (downlink), adding
50 channels (channel numbers 975 to 1023 and 0) to the original GSM-900 band.
Time division multiplexing is used to allow eight full-rate or sixteen half-rate speech
channels per radio frequency channel. There are eight radio timeslots (giving eight burst
periods) grouped into what is called a TDMA frame. Half rate channels use alternate frames
in the same timeslot. The channel data rate for all 8 channels is 270.833 Kbit/s, and the frame
duration is 4.615 ms.
The transmission power in the handset is limited to a maximum of 2 watts in GSM850/900
and 1 watt in GSM1800/1900. GSM operates in the 900MHz and 1.8GHz bands in Europe
and the 1.9GHz and 850MHz bands in the US. The 850MHz band is also used for GSM and
3G in Australia, Canada and many South American countries. By having harmonized
spectrum across most of the globe, GSM’s international roaming capability allows users to
access the same services when travelling abroad as at home. This gives consumers seamless
and same number connectivity in more than 218 countries.

Terrestrial GSM networks now cover more than 80% of the world’s population. GSM
satellite roaming has also extended service access to areas where terrestrial coverage is not
available.
Mobile Telephony Standards
TABLE10: MOBILE TELEPHONY STANDARDS
1G
The first generation of mobile telephony (written 1G) operated using analogue
communications and portable devices that were relatively large. It used primarily the
following standards:
 AMPS (Advanced Mobile Phone System), which appeared in 1976 in the United
States, was the first cellular network standard. It was used primarily in the Americas,
Russia and Asia. This first-generation analogue network had weak security
mechanisms which allowed hacking of telephones lines.
 TACS (Total Access Communication System) is the European version of the AMPS
model. Using the 900 MHz frequency band, this system was largely used in England
and then in Asia (Hong-Kong and Japan).
 ETACS (Extended Total Access Communication System) is an improved version of
the TACS standard developed in the United Kingdom that uses a larger number of
communication channels.
The first-generation cellular networks were made obsolete by the appearance of an entirely
digital second generation.

Second Generation of Mobile Networks (2G)
The second generation of mobile networks marked a break with the first generation of
cellular telephones by switching from analogue to digital. The main 2G mobile telephony
standards are:
 GSM (Global System for Mobile communications) is the most commonly used
standard in Europe at the end of the 20th century and supported in the United States.
This standard uses the 900 MHz and 1800 MHz frequency bands in Europe. In the
United States, however, the frequency band used is the 1900 MHz band. Portable
telephones that are able to operate in Europe and the United States are therefore
called tri-band.
 CDMA (Code Division Multiple Access) uses a spread spectrum technique that allows
a radio signal to be broadcast over a large frequency range.
 TDMA (Time Division Multiple Access) uses a technique of time division of
communication channels to increase the volume of data transmitted simultaneously.
TDMA technology is primarily used on the American continent, in New Zealand and
in the Asia-Pacific region.
With the 2G networks, it is possible to transmit voice and low volume digital data, for
example text messages (SMS, for Short Message Service) or multimedia messages (MMS,
for Multimedia Message Service). The GSM standard allows a maximum data rate of 9.6
kbps.
Extensions have been made to the GSM standard to improve throughput. One of these is
the GPRS (General Packet Radio System) service which allows theoretical data rates on the
order of 114 Kbit/s but with throughput closer to 40 Kbit/s in practice. As this technology
does not fit within the "3G" category, it is often referred to as 2.5G
The EDGE (Enhanced Data Rates for Global Evolution) standard, billed as 2.75G,
quadruples the throughput improvements of GPRS with its theoretical data rate of 384 Kbps,
thereby allowing the access for multimedia applications. In reality, the EDGE standard allows
maximum theoretical data rates of 473 Kbit/s, but it has been limited in order to comply with

the IMT-2000 (International Mobile Telecommunications-2000) specifications from the ITU
(International Telecommunications Union).
3G
The IMT-2000 (International Mobile Telecommunications for the year 2000) specifications
from the International Telecommunications Union (ITU) defined the characteristics
of 3G (third generation of mobile telephony). The most important of these characteristics are:
1. High transmission data rate.
2. 144 Kbps with total coverage for mobile use.
3. 384 Kbps with medium coverage for pedestrian use.
4. 2 Mbps with reduced coverage area for stationary use.
5. World compatibility.
6. Compatibility of 3rd generation mobile services with second generation networks.
3G offers data rates of more than 144 Kbit/s, thereby allowing the access to multimedia uses
such as video transmission, video-conferencing or high-speed internet access. 3G networks
use different frequency bands than the previous networks: 1885-2025 MHz and 2110-2200
MHz.
The main 3G standard used in Europe is called UMTS (Universal Mobile
Telecommunications System) and uses WCDMA (Wideband Code Division Multiple Access)
encoding. UMTS technology uses 5 MHz bands for transferring voice and data, with data
rates that can range from 384 Kbps to 2 Mbps. HSDPA (High Speed Downlink Packet
Access) is a third generation mobile telephony protocol, (considered as "3.5G"), which is able
to reach data rates on the order of 8 to 10 Mbps. HSDPA technology uses the 5 GHz
frequency band and uses WCDMA encoding.
Introduction to the GSM Standard
The GSM (Global System for Mobile communications) network is at the start of the
21st century, the most commonly used mobile telephony standard in Europe. It is called as
Second Generation (2G) standard because communications occur in an entirely digital mode,
unlike the first generation of portable telephones.

When it was first standardized in 1982, it was called as Group Special Mobile and later, it
became an international standard called "Global System for Mobile communications" in
1991.
In Europe, the GSM standard uses the 900 MHz and 1800 MHz frequency bands. In the
United States, however, the frequency band used is the 1900 MHz band. For this reason,
portable telephones that are able to operate in both Europe and the United States are
called tri-band while those that operate only in Europe are called bi-band.
The GSM standard allows a maximum throughput of 9.6 kbps which allows transmission of
voice and low-volume digital data like text messages (SMS, for Short Message Service) or
multimedia messages (MMS, for Multimedia Message Service).
GSM Standards:
GSM uses narrowband TDMA, which allows eight simultaneous calls on the same radio
frequency.
There are three basic principles in multiple access, FDMA (Frequency Division Multiple
Access), TDMA (Time Division Multiple Access), and CDMA (Code Division Multiple
Access). All three principles allow multiple users to share the same physical channel. But the
two competing technologies differ in the way user sharing the common resource.
TDMA allows the users to share the same frequency channel by dividing the signal into
different time slots. Each user takes turn in a round robin fashion for transmitting and
receiving over the channel. Here, users can only transmit in their respective time slot.
CDMA uses a spread spectrum technology that is it spreads the information contained in a
particular signal of interest over a much greater bandwidth than the original signal. Unlike
TDMA, in CDMA several users can transmit over the channel at the same time.
TDMA in brief:
In late1980’s, as a search to convert the existing analog network to digital as a means to
improve capacity, the cellular telecommunications industry association chose TDMA over
FDMA.

Time Division Multiplex Access is a type of multiplexing where two or more channels of
information are transmitted over the same link by allocating a different time interval for the
transmission of each channel. The most complex implementation using TDMA principle is of
GSM’s (Global System for Mobile communication). To reduce the effect of co-channel
interference, fading and multipath, the GSM technology can use frequency hoping, where a
call jumps from one channel to another channel in a short interval.
TDMA systems still rely on switch to determine when to perform a handoff. Handoff occurs
when a call is switched from one cell site to another while travelling. The TDMA handset
constantly monitors the signals coming from other sites and reports it to the switch without
caller’s awareness. The switch then uses this information for making better choices for
handoff at appropriate times. TDMA handset performs hard handoff, i.e., whenever the user
moves from one site to another, it breaks the connection and then provides a new connection
with the new site.
Advantages of TDMA:
There are lots of advantages of TDMA in cellular technologies.
1. It can easily adapt to transmission of data as well as voice communication.
2. It has an ability to carry 64 kbps to 120 Mbps of data rates. This allows the operator to
do services like fax, voice band data and SMS as well as bandwidth intensive
application such as multimedia and video conferencing.

3. Since TDMA technology separates users according to time, it ensures that there will
be no interference from simultaneous transmissions.
4. It provides users with an extended battery life, since it transmits only portion of the
time during conversations. Since the cell size grows smaller, it proves to save base
station equipment, space and maintenance.
TDMA is the most cost effective technology to convert an analog system to digital.
Disadvantages of TDMA:
One major disadvantage using TDMA technology is that the users has a predefined time slot.
When moving from one cell site to other, if all the time slots in this cell are full the user
might be disconnected. Likewise, if all the time slots in the cell in which the user is currently
in are already occupied, the user will not receive a dial tone.
The second problem in TDMA is that it is subjected to multipath distortion. To overcome this
distortion, a time limit can be used on the system. Once the time limit is expired, the signal is
ignored.
The concept of cellular network
Mobile telephone networks are based on the concept of cells, circular zones that overlap to
cover a geographical area.
Cellular networks are based on the use of a central transmitter-receiver in each cell, called a
"base station" (or Base Transceiver Station, written BTS). The smaller the radius of a cell,
the higher is the available bandwidth. So, in highly populated urban areas, there are cells with
a radius of a few hundred meters, while huge cells of up to 30 kilometers provide coverage in
rural areas.

In a cellular network, each cell is surrounded by 6 neighbouring cells (thus a cell is generally
drawn as a hexagon). To avoid interference, adjacent cells cannot use the same frequency. In
practice, two cells using the same frequency range must be separated by a distance of two to
three times the diameter of the cell.
Architecture of the GSM Network
In a GSM network, the user terminal is called a mobile station. A mobile station is made up
of a SIM (Subscriber Identity Module) card allowing the user to be uniquely identified and a
mobile terminal.
The terminals (devices) are identified by a unique 15-digit identification number
called IMEI (International Mobile Equipment Identity). Each SIM card also has a unique
(and secret) identification number called IMSI (International Mobile Subscriber Identity).
This code can be protected using a 4-digit key called a PIN code.
The SIM card therefore allows each user to be identified independently of the terminal used
during communication with a base station. Communications occur through a radio link (air
interface) between a mobile station and a base station.

All the base stations of a cellular network are connected to a base station controller (BSC)
which is responsible for managing distribution of the resources. The system consisting of the
base station controller and its connected base stations is called the Base Station
Subsystem (BSS).
Finally, the base station controllers are themselves physically connected to the Mobile
Switching Centre (MSC), managed by the telephone network operator, which connects them
to the public telephone network and the Internet. The MSC belongs to a Network Station
Subsystem (NSS), which is responsible for managing user identities, their location and
establishment of communications with other subscribers. The MSC is generally connected to
databases that provide additional functions:
1. The Home Location Register (HLR) is a database containing information
(geographic position, administrative information etc.) of the subscribers registered in
the area of the switch (MSC).
2. The Visitor Location Register (VLR) is a database containing information of users
other than the local subscribers. The VLR retrieves the data of a new user from the
HLR of the user's subscriber zone. The data is maintained as long as the user is in the
zone and is deleted when the user leaves or after a long period of inactivity (terminal
off).
3. The Equipment Identify Register (EIR) is a database listing the mobile terminals.
4. The Authentication Centre (AUC) is responsible for verifying user identities.
5. The cellular network formed in this way is designed to support mobility via
management of handovers (movements from one cell to another).
Finally, GSM networks support the concept of roaming i.e., movement from one operator
network to another.
Introduction to Modem:

Modem stands for modulator-demodulator.
A modem is a device or program that enables a computer to transmit data over telephone or
cable lines. Computer information is stored digitally, whereas information transmitted over
telephone lines is transmitted in the form of analog waves. A modem conver ts between these
two forms.
Fortunately, there is one standard interface for connecting external modems to computers
called RS-232. Consequently, any external modem can be attached to any computer that has
an RS-232 port, which almost all personal computers have. There are also modems that come
as an expansion board that can be inserted into a vacant expansion slot. These are sometimes
called onboard or internal modems.
While the modem interfaces are standardized, a number of different protocols for formatting
data to be transmitted over telephone lines exist. Some, like CCITT V.34 are official
standards, while others have been developed by private companies. Most modems have built-in
support for the more common protocols at slow data transmission speeds at least, most
modems can communicate with each other. At high transmission speeds, however, the
protocols are less standardized.
Apart from the transmission protocols that they support, the following characteristics
distinguish one modem from another:
 Bps: How fast the modem can transmit and receive data. At slow rates, modems are
measured in terms of baud rates. The slowest rate is 300 baud (about 25 cps). At
higher speeds, modems are measured in terms of bits per second (bps). The fastest
modems run at 57,600 bps, although they can achieve even higher data transfer rates
by compressing the data. Obviously, the faster the transmission rate, the faster the

data can be sent and received. It should be noted that the data cannot be received at a
faster rate than it is being sent.
 Voice/data: Many modems support a switch to change between voice and data
modes. In data mode, the modem acts like a regular modem. In voice mode, the
modem acts like a regular telephone. Modems that support a voice/data switch have a
built-in loudspeaker and microphone for voice communication.
 Auto-answer: An auto-answer modem enables the computer to receive calls in the
absence of the operator.
 Data compression: Some modems perform data compression, which enables them to
send data at faster rates. However, the modem at the receiving end must be able to
decompress the data using the same compression technique.
 Flash memory: Some modems come with flash memory rather than conventional
ROM which means that the communications protocols can be easily updated if
necessary.
 Fax capability: Most modern modems are fax modems, which mean that they can
send and receive faxes.
GSM Modem:
A GSM modem is a wireless modem that works with a GSM wireless network. A wireless
modem behaves like a dial-up modem. The main difference between them is that a dial-up
modem sends and receives data through a fixed telephone line while a wireless modem sends
and receives data through radio waves.
FIGURE18:GSM SIM300 MODEM
A GSM modem can be an external device or a PC Card / PCMCIA Card. Typically, an
external GSM modem is connected to a computer through a serial cable or a USB cable. A
GSM modem in the form of a PC Card / PCMCIA Card is designed for use with a laptop

computer. It should be inserted into one of the PC Card / PCMCIA Card slots of a laptop
computer. Like a GSM mobile phone, a GSM modem requires a SIM card from a wireless
carrier in order to operate.
A SIM card contains the following information:
 Subscriber telephone number (MSISDN)
 International subscriber number (IMSI, International Mobile Subscriber Identity)
 State of the SIM card
 Service code (operator)
 Authentication key
 PIN (Personal Identification Code)
 PUK (Personal Unlock Code)
Computers use AT commands to control modems. Both GSM modems and dial-up modems
support a common set of standard AT commands. In addition to the standard AT commands,
GSM modems support an extended set of AT commands. These extended AT commands are
defined in the GSM standards. With the extended AT commands, the following operations
can be performed:
 Reading, writing and deleting SMS messages.
 Sending SMS messages.
 Monitoring the signal strength.
 Monitoring the charging status and charge level of the battery.
 Reading, writing and searching phone book entries.

The number of SMS messages that can be processed by a GSM modem per minute is very
low i.e., about 6 to 10 SMS messages per minute.
Introduction to AT Commands
AT commands are instructions used to control a modem. AT is the abbreviation of ATtention.
Every command line starts with "AT" or "at". That's the reason, modem commands are called
AT commands. Many of the commands that are used to control wired dial-up modems, such
as ATD (Dial), ATA (Answer), ATH (Hook control) and ATO (Return to online data state)
are also supported by GSM modems and mobile phones.
Besides this common AT command set, GSM modems and mobile phones support an AT
command set that is specific to the GSM technology, which includes SMS-related commands
like AT+CMGS (Send SMS message), AT+CMSS (Send SMS message from storage),
AT+CMGL (List SMS messages) and AT+CMGR (Read SMS messages).
It should be noted that the starting "AT" is the prefix that informs the modem about the start
of a command line. It is not part of the AT command name. For example, D is the actual AT
command name in ATD and +CMGS is the actual AT command name in AT+CMGS.

Some of the tasks that can be done using AT commands with a GSM modem or mobile
phone are listed below:
 Get basic information about the mobile phone or GSM modem. For example, name of
manufacturer (AT+CGMI), model number (AT+CGMM), IMEI number
(International Mobile Equipment Identity) (AT+CGSN) and software version
(AT+CGMR).
 Get basic information about the subscriber. For example, MSISDN (AT+CNUM) and
IMSI number (International Mobile Subscriber Identity) (AT+CIMI).
 Get the current status of the mobile phone or GSM/GPRS modem. For example,
mobile phone activity status (AT+CPAS), mobile network registration status
(AT+CREG), radio signal strength (AT+CSQ), battery charge level and battery
charging status (AT+CBC).
 Establish a data connection or voice connection to a remote modem (ATD, ATA, etc).
 Send and receive fax (ATD, ATA, AT+F*).
 Send (AT+CMGS, AT+CMSS), read (AT+CMGR, AT+CMGL), write (AT+CMGW)
or delete (AT+CMGD) SMS messages and obtain notifications of newly received
SMS messages (AT+CNMI).
 Read (AT+CPBR), write (AT+CPBW) or search (AT+CPBF) phonebook entries.
 Perform security-related tasks, such as opening or closing facility locks (AT+CLCK),
checking whether a facility is locked (AT+CLCK) and changing
passwords(AT+CPWD).
(Facility lock examples: SIM lock [a password must be given to the SIM card every
time the mobile phone is switched on] and PH-SIM lock [a certain SIM card is
associated with the mobile phone. To use other SIM cards with the mobile phone, a
password must be entered.])
 Control the presentation of result codes / error messages of AT commands. For
example, the user can control whether to enable certain error messages (AT+CMEE)
and whether error messages should be displayed in numeric format or verbose format
(AT+CMEE=1 or AT+CMEE=2).
 Get or change the configurations of the mobile phone or GSM/GPRS modem. For
example, change the GSM network (AT+COPS), bearer service type (AT+CBST),

radio link protocol parameters (AT+CRLP), SMS center address (AT+CSCA) and
storage of SMS messages (AT+CPMS).
 Save and restore configurations of the mobile phone or GSM/GPRS modem. For
example, save (AT+CSAS) and restore (AT+CRES) settings related to SMS
messaging such as the SMS center address.
It should be noted that the mobile phone manufacturers usually do not implement all AT
commands, command parameters and parameter values in their mobile phones. Also, the
behavior of the implemented AT commands may be different from that defined in the
standard. In general, GSM modems, designed for wireless applications, have better support of
AT commands than ordinary mobile phones.
Basic concepts of SMS technology
1. Validity Period of an SMS Message
An SMS message is stored temporarily in the SMS center if the recipient mobile phone is
offline. It is possible to specify the period after which the SMS message will be deleted from
the SMS center so that the SMS message will not be forwarded to the recipient mobile phone
when it becomes online. This period is called the validity period.
A mobile phone should have a menu option that can be used to set the validity period. After
setting it, the mobile phone will include the validity period in the outbound SMS messages
automatically.
2. Message Status Reports
Sometimes the user may want to know whether an SMS message has reached the recipient
mobile phone successfully. To get this information, you need to set a flag in the SMS
message to notify the SMS center that a status report is required about the delivery of this
SMS message. The status report is sent to the user mobile in the form of an SMS message.
A mobile phone should have a menu option that can be used to set whether the status report
feature is on or off. After setting it, the mobile phone will set the corresponding flag in the
outbound SMS messages for you automatically. The status report feature is turned off by
default on most mobile phones and GSM modems.

3. Message Submission Reports
After leaving the mobile phone, an SMS message goes to the SMS center. When it reaches
the SMS center, the SMS center will send back a message submission report to the mobile
phone to inform whether there are any errors or failures (e.g. incorrect SMS message format,
busy SMS center, etc). If there is no error or failure, the SMS center sends back a positive
submission report to the mobile phone. Otherwise it sends back a negative submission report
to the mobile phone. The mobile phone may then notify the user that the message submission
was failed and what caused the failure.
If the mobile phone does not receive the message submission report after a period of time, it
concludes that the message submission report has been lost. The mobile phone may then send
the SMS message again to the SMS center. A flag will be set in the new SMS message to
inform the SMS center that this SMS message has been sent before. If the previous message
submission was successful, the SMS center will ignore the new SMS message but send back
a message submission report to the mobile phone. This mechanism prevents the sending of
the same SMS message to the recipient multiple times.
Sometimes the message submission report mechanism is not used and the acknowledgement
of message submission is done in a lower layer.
4. Message Delivery Reports
After receiving an SMS message, the recipient mobile phone will send back a message
delivery report to the SMS center to inform whether there are any errors or failures (example
causes: unsupported SMS message format, not enough storage space, etc). This process is
transparent to the mobile user. If there is no error or failure, the recipient mobile phone sends
back a positive delivery report to the SMS center. Otherwise it sends back a negative delivery
report to the SMS center.
If the sender requested a status report earlier, the SMS center sends a status report to the
sender when it receives the message delivery report from the recipient. If the SMS center
does not receive the message delivery report after a period of time, it concludes that the
message delivery report has been lost. The SMS center then ends the SMS message to the
recipient for the second time.

Sometimes the message delivery report mechanism is not used and the acknowledgement of
message delivery is done in a lower layer.
4.5HEART BEAT SENSOR:
The Heart Beat signal is obtained by LED and LDR combination. Pulses form hands
interrupts the Light reaching the LDR and this signal is read by microcontroller, The RF
signal is transmitted by transmitter in a digital format. This circuit uses Manchester encoding
to avoid a long trail of one or zero. The protocol is well defined for different device types
ensuring compatibility with your whole entertainment system 5 bit address and 6 bit
command length. Constant bit time of 1.778ms bits are of equal length of 1.778ms in this
protocol, A logical zero is represented by a pulse in the first half of the bit time. A logica l one
is represented by a pulse in the second half of the bit time
FIGURE19: HEART BEAT SENSOR
Heart beat is sensed by using a high intensity type LED and LDR. The finger is placed
between the LED and LDR. As sensor LDR can be used. The skin may be illuminated with
visible (red) using transmitted or reflected light for detection. The very small changes in
reflectivity or in transmittance caused by the varying blood content of human tissue are
almost invisible. Various noise sources may produce disturbance signals with amplitudes
equal or even higher than the amplitude of the pulse signal. Valid pulse measurement
therefore requires extensive pre-processing of the raw signal. The new signal processing
approach presented here combines analog and digital signal processing in a way that both
parts can be kept simple but in combination are very effective in suppressing

4.6LIGHT DEPENDENT RESISTOR(LDR):
LDRs or Light Dependent Resistors are very useful especially in light/dark sensor circuits.
Normally the resistance of an LDR is very high, sometimes as high as 1,000,000 ohms, but
when they are illuminated with light, the resistance drops dramatically. Thus in this project,
LDR plays an important role in switching on the lights based on the intensity of light i.e., if
the intensity of light is more (during daytime) the lights will be in off condition. And if the
intensity of light is less (during nights), the lights will be switched on.
FIGURE20: LDR
The output of the LDR is given to ADC which converts the analog intensity value into
corresponding digital data and presents this data as the input to the microcontroller
4.7ANALOG TO DIGITAL CONVERTER(ADC):
Analog-to-digital converters are among the most widely used devices for data acquisition.
Digital systems use binary values, but in the physical world everything is continuous i.e.,
analog values. Temperature, pressure (wind or liquid), humidity and velocity are the physical
analog quantities.

These physical quantities are to be converted into digital values for further processing. One
such device to convert these physical quantities into electrical signals is sensor. Sensors for
temperature, pressure, humidity, light and many other natural quantities produce an output
that is voltage or current. Thus, an analog-to-digital converter is needed to convert these
electrical signals into digital values so that the microcontroller can read and process them.
An ADC has an n-bit resolution where n can be 8,10,12,16 or even 24 bits. The higher
resolution ADC provides a smaller step size, where step size is the smallest change that can
be detected by an ADC. In addition to resolution, conversion time is another major factor in
judging an ADC.
Conversion time is defined as the time it takes the ADC to convert the analog input to a
digital number.
ADC0804:
The ADC chip that is used in this project is ADC0804. The ADC0804 IC is an 8-bit parallel
ADC in the family of the ADC0800 series from National Semiconductor. It works with +5
volts and has a resolution of 8 bits. In the ADC0804, the conversion time varies depending on
the clocking signals applied to the CLK IN pin, but it cannot be faster than 110μs.

Pin description:
CS (Chip select): Chip select is an active low input used to activate the ADC0804 chip. To
access the ADC0804, this pin must be low.
RD (read): This is an input signal and is active low. ADC converts the analog input to its
binary equivalent and holds it in an internal register. RD is used to get the data out of
ADC0804 chip. When CS=0, if a high-to- low pulse is applied to the RD pin, the 8-bit digital
output shows up at the D0-D7 data pins.
WR (write): This is an active low input used to inform the ADC0804 to start the conversion
process. If CS=0 when WR makes a low-to-high transition, the ADC0804 starts converting
the analog input value Vin to an 8-bit digital value. The amount of time it takes to convert
varies depending on the CLK IN and CLK R values.
CLK IN and CLK R: CLK IN is an input pin connected to an external clock source when an
external clock is used for timing. However, the 804 has an internal clock generator. To use
the internal clock generator of the ADC0804, the CLK IN and CLK R are connected to a
capacitor and a resistor. In that case, the clock frequency is determined by the equation:

f = 1/ (1.1RC)
Typical values are R=10K ohms and C= 150 pf. Substituting in the above equation, the
frequency is calculated as 606 kHz. Thus, the conversion time is 110μs.
INTR: This is an output pin and is active low. It is a normally high pin and when the
conversion is finished, it goes low to signal the CPU that the converted data is ready to be
picked up. After INTR goes low, the CS pin is made low i.e., CS=0 and send a high-to- low
pulse to the RD pin to get the data out of the ADC0804 chip.
Vin(+) and Vin(-): These are the differential analog inputs where Vin=Vin(+) – Vin(-). The
Vin(-) pin is connected to ground and the Vin(+) pin is used as the analog input to be
converted to digital.
Vcc: This is the +5 volt power supply. It is also used as a reference voltage when the Vref/2
input (pin 9) is open.
Vref/2: Pin 9 is an input voltage used for the reference voltage. If this pin is open, the analog
input voltage for the ADC0804 is in the range of 0 to 5 volts.Vref/2 is used to implement
analog input voltages other than 0.5V. i.e., if the analog input range needs to be 0 to 4 volts,
Vref/2 is connected to 2 volts.
D0-D7: D0-D7 (D7 is the MSB) are the digital data output pins since ADC0804 is a parallel
ADC chip. To calculate the output voltage, the below equation is used:
Dout = Vin/ (step size)
where Dout = digital data output pins (in decimal) and Vin = analog input value
Step size is the smallest change and is given by (2 x Vref/2)/256 for ADC0804.

Analog Ground and Digital Ground: These are the input pins providing the ground for both
the analog signal and the digital signal. Analog ground is connected to the ground of the
analog Vin while digital ground is connected to the ground of the Vcc pin. The reason that
there are two ground pins is to isolate the analog Vin signal from transient voltages caused by
digital switching of the output D0-D7.
Clock Source for ADC0804:
The speed at which an analog input is converted to the digital output depends on the speed of
the CLK input. According to the ADC0804 datasheets, the typical operating frequency is
approximately 640 kHz at 5 volts.
ADC interface with 8051:
FIGURE 21:ADC

4.8POWER SUPPLY:
The power supply are designed to convert high voltage AC mains electricity to a
suitable low voltage supply for electronics circuits and other devices. A power supply can by
broken down into a series of blocks, each of which performs a particular function. A d.c
power supply which maintains the output voltage constant irrespective of a.c mains
fluctuations or load variations is known as “Regulated D.C Power Supply”
For example a 5V regulated power supply system as shown below:
FIGURE 22: BLOCK DIAGRAM OF POWER SUPPLY
3.5.1 TRANSFORMER:
A transformer is an electrical device which is used to convert electrical power from
one electrical circuit to another without change in frequency.
Transformers convert AC electricity from one voltage to another with little loss of
power. Transformers work only with AC and this is one of the reasons why mains electricity
is AC. Step-up transformers increase in output voltage, step-down transformers decrease in

output voltage. Most power supplies use a step-down transformer to reduce the dangerously
high mains voltage to a safer low voltage. The input coil is called the primary and the output
coil is called the secondary. There is no electrical connection between the two coils; instead
they are linked by an alternating magnetic field created in the soft- iron core of the
transformer. The two lines in the middle of the circuit symbol represent the core.
Transformers waste very little power so the power out is (almost) equal to the power in. Note
that as voltage is stepped down current is stepped up. The ratio of the number of turns on
each coil, called the turn’s ratio, determines the ratio of the voltages. A step-down
transformer has a large number of turns on its primary (input) coil which is connected to the
high voltage mains supply, and a small number of turns on its secondary (output) coil to give
a low output voltage.
FIGURE 23: ELECTRICAL TRANSFORMER
Turns ratio = Vp/ VS = Np/NS
Power Out= Power In
VS X IS=VP X IP
Vp = primary (input) voltage
Np = number of turns on primary coil
Ip = primary (input) current

3.5.2 RECTIFIER:
A circuit, which is used to convert a.c to d.c, is known as RECTIFIER. The process of
conversion a.c to d.c is called “rectification”
TYPES OF RECTIFIERS
 Half wave Rectifier
 Full wave rectifier
1. Center tap full wave rectifier.
2. Bridge type full bridge rectifier.
Comparison of rectifier circuits
Parameter
Type of Rectifier
Half wave Full wave Bridge
Number of diodes
1
2
4
PIV of diodes
Vm
2Vm
Vm
D.C output voltage
Vm/
2Vm/
2Vm/
Vdc, at
no-load
0.318Vm
0.636Vm
0.636Vm

Ripple factor 1.21 0.482 0.482
Ripple
frequency
f
2f
2f
Rectification
efficiency
0.406
0.812
0.812
Transformer
Utilization
Factor(TUF)
0.287
0.693
0.812
RMS voltage Vrms Vm/2 Vm/√2 Vm/√2
TABLE 11:COMPARISON OF RECTIFIER CIRCUITS
Full-wave Rectifier
From the above comparisons we came to know that full wave bridge rectifier as more
advantages than the other two rectifiers. So, in our project we are using full wave bridge
rectifier circuit.
Bridge Rectifier
A bridge rectifier makes use of four diodes in a bridge arrangement to achieve full-wave
rectification. This is a widely used configuration, both with individual diodes wired as shown
and with single component bridges where the diode bridge is wired internally.
A bridge rectifier makes use of four diodes in a bridge arrangement as shown in fig(a)
to achieve full-wave rectification. This is a widely used configuration, both with individual
diodes wired as shown and with single component bridges where the diode bridge is wired
internally.

FIGURE 24: FULL WAVE BRIDGE RECTIFIER
Operation
During positive half cycle of secondary, the diodes D2 and D3 are in forward biased
while D1 and D4 are in reverse biased as shown in the fig(b). The current flow direction is
shown in the fig (b) with dotted arrows.
FIGURE 25: OPERATION DURING POSITIVE CYCLE
During negative half cycle of secondary voltage, the diodes D1 and D4 are in forward
biased while D2 and D3 are in reverse biased as shown in the fig(c). The current flow
direction is shown in the fig (c) with dotted arrows.
FIGURE 26: OPERATION DURING NEGATIVE CYCLE
4.8.3 FILTER :
A Filter is a device, which removes the a.c component of rectifier output but allows
the d.c component to reach the load

Capacitor Filter
We have seen that the ripple content in the rectified output of half wave rectifier is
121% or that of full-wave or bridge rectifier or bridge rectifier is 48% such high percentages
of ripples is not acceptable for most of the applications. Ripples can be removed by one of the
following methods of filtering:
(a) A capacitor, in parallel to the load, provides an easier by –pass for the ripples voltage
though it due to low impedance. At ripple frequency and leave the d.c.to appears the load.
(b) An inductor, in series with the load, prevents the passage of the ripple current (due to high
impedance at ripple frequency) while allowing the d.c (due to low resistance to d.c)
(c) various combinations of capacitor and inductor, such as L-section filter section
filter, multiple section filter etc. which make use of both the properties mentioned in (a) and
(b) above. Two cases of capacitor filter, one applied on half wave rectifier and another with
full wave rectifier.
Filtering is performed by a large value electrolytic capacitor connected across the DC
supply to act as a reservoir, supplying current to the output when the varying DC voltage
from the rectifier is falling. The capacitor charges quickly near the peak of the varying DC,
and then discharges as it supplies current to the output. Filtering significantly increases the
average DC voltage to almost the peak value (1.4 × RMS value).
To calculate the value of capacitor(C),
C = ¼*√3*f*r*Rl
Where,
f = supply frequency,
r = ripple factor,
Rl = load resistance
Note: In our circuit we are using 1000microfarads.
4.8.4 REGULATOR
Voltage regulator ICs is available with fixed (typically 5, 12 and 15V) or variable
output voltages. The maximum current they can pass also rates them. Negative voltage
regulators are available, mainly for use in dual supplies. Most regulators include some
automatic protection from excessive current ('overload protection') and overheating ('thermal

protection'). Many of the fixed voltage regulator ICs have 3 leads and look like power
transistors, such as the 7805 +5V 1A regulator shown on the right. The LM7805 is simple to
use. You simply connect the positive lead of your unregulated DC power supply (anything
from 9VDC to 24VDC) to the Input pin, connect the negative lead to the Common pin and
then when you turn on the power, you get a 5 volt supply from the output pin.
FIGURE 27: VOLTAGE REGULATOR
78XX
The Bay Linear LM78XX is integrated linear positive regulator with three terminals.
The LM78XX offer several fixed output voltages making them useful in wide range of
applications. When used as a zener diode/resistor combination replacement, the LM78XX
usually results in an effective output impedance improvement of two orders of magnitude,
lower quiescent current. The LM78XX is available in the TO-252, TO-220 & TO-
263packages,
Features
• Output Current of 1.5A
• Output Voltage Tolerance of 5%
• Internal thermal overload protection
• Internal Short-Circuit Limited
• No External Component
• Output Voltage 5.0V, 6V, 8V, 9V, 10V, 12V, 15V, 18V, 24V

• Offer in plastic TO-252, TO-220 & TO-263
• Direct Replacement for LM78XX
4.9POTENTIOMETER:
A potentiometer (colloquially known as a "pot") is a three-terminal resistor with a sliding
contact that forms an adjustable voltage divider.[1] If only two terminals are used (one side
and the wiper), it acts as a variable resistor or rheostat. Potentiometers are commonly used to
control electrical devices such as volume controls on audio equipment. Potentiometers
operated by a mechanism can be used as position transducers, for example, in a joystick.
FIGURE28:POTENTIOMETER
Potentiometers are rarely used to directly control significant power (more than a watt).
Instead they are used to adjust the level of analog signals (e.g. volume controls on audio
equipment), and as control inputs for electronic circuits.
4.10 RESISTOR:
A resistor is a two-terminal passive electronic component which implements electrical
resistance as a circuit element. When a voltage V is applied across the terminals of a resistor,
a current I will flow through the resistor in direct proportion to that voltage. The reciprocal of
the constant of proportionality is known as the resistance R, since, with a given voltage V, a
larger value of R further "resists" the flow of current I as given by Ohm's law:

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