XPDDS17: Bring up PCI Passthrough on ARM - Julien Grall, ARM
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Device passthrough allows the user to give control of physical devices (NIC, graphic card, etc) to a virtual machine, giving it full and direct access to the device. This has several potential uses, including avoiding overhead of the device para-virtualization and being able to run unmodified guest on Xen on ARM. Whilst PCI passthrough is already something well established on Xen, ARM support will require some fundamental changes due to architectural differences. For instance, the MSI doorbell will be translated by the IOMMU. During this session, we will look at the state of PCI passthrough on x86. Then, we will describe the interactions of the components (PCI Root controller, interrupt controller and IOMMU) required for the use of PCI on an ARM system. With this background, we will round out the discussion with the proposed approach for implementing PCI passthrough on ARM.
![About me
Working on ARM virtualization for the past 4 years
With ARM since 2016
Co-maintaining Xen on ARM - with Stefano Stabellini [Aporeto]
2 © ARM 2017](data:image/gif;base64,R0lGODlhAQABAIAAAAAAAP///yH5BAEAAAAALAAAAAABAAEAAAIBRAA7)
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XPDDS17: Bring up PCI Passthrough on ARM - Julien Grall, ARM
- 1. Bring-up PCI passthrough on ARM Julien Grall <julien.grall@arm.com> Xen Developper Summit 2017 © ARM 2017
- 2. About me Working on ARM virtualization for the past 4 years With ARM since 2016 Co-maintaining Xen on ARM - with Stefano Stabellini [Aporeto] 2 © ARM 2017
- 3. PCI on ARM 3 © ARM 2017
- 4. PCI on ARM Root Complex IOMMUPCI #A MSI write Interrupt Controller MSI Doorbell DMA access RAM Configuration space access CPU 4 © ARM 2017
- 5. Hostbridges Different way to access configuration space: ECAM ECAM-like custom-way May require specific initialization Clock External devices ... Root Complex IOMMUPCI #A MSI write Interrupt Controller MSI Doorbell DMA access RAM Configuration space access CPU 5 © ARM 2017
- 6. MSI controllers MSIs can be distinguished by some combination of the doorbell the payload Sideband information accompanying the write Root Complex IOMMUPCI #A MSI write Interrupt Controller MSI Doorbell DMA access RAM Configuration space access CPU 6 © ARM 2017
- 7. IOMMUs - The ideal world IOMMU will protect DMA accesses MSIs are treated the same as DMA writes MSI doorbells must be mapped in the IOMMU Root Complex IOMMUPCI #A MSI write Interrupt Controller MSI Doorbell DMA access RAM Configuration space access CPU 7 © ARM 2017
- 8. IOMMUs - The real world On some platforms, set of addresses abort before reaching the IOMMU: MSI doorbell built into the hostbridges Accesses identified as P2P Root Complex IOMMUPCI #A MSI write MSI Doorbell DMA access RAM Configuration space access CPU 8 © ARM 2017
- 9. Discovering the platform Firmware tables are used to describe: Hostbridges Interrupt Controllers and MSI controllers IOMMUs I/O topology ARM supports both ACPI and Device Tree. 9 © ARM 2017
- 10. How ARM differs from x86? Physical memory map is not standardised MSIs are usually treated as DMA writes The MSI doorbell must be mapped in the IOMMU On some platforms: MSIs bypass the IOMMU set of addresses abort before reaching the IOMMU 10 © ARM 2017
- 11. Xen and PCI passthrough 11 © ARM 2017
- 12. Xen and PCI passthrough PCI passthrough is currently supported on x86. Two solutions Use of PV drivers Use of QEMU to emulate root complex 12 © ARM 2017
- 13. PV drivers Hypervisor DomUDom0 PV Backend PCI A Configuration space access Accessing PCI MMIO PV Frontend 13 © ARM 2017
- 14. QEMU Hypervisor DomUDom0 QEMU PCI A Configuration space access Accessing PCI MMIO14 © ARM 2017
- 15. Where is ARM in the PCI story? 15 © ARM 2017
- 16. The ultimate goal Limited modification in guest Wide range of OSes to support Taking advantage of the firmware tables Better integration with GIC and IOMMU 16 © ARM 2017
- 17. Where are we? The first proposal was discussed 2 years ago. Used the PV drivers way Targeting a specific hardware A new proposal was started end of last year Focus in the architecture requirement Try to address the goal set 17 © ARM 2017
- 18. Proposal for ARM Hypervisor DomUDom0 RC Emu PCI A Configuration space access Accessing PCI MMIO18 © ARM 2017
- 19. Design documents Second version of the design document was sent in May https://goo.gl/z51W4A 19 © ARM 2017
- 20. Questions? 20 © ARM 2017
- 21. The trademarks featured in this presentation are registered and/or unregistered trademarks of ARM limited (or its subsidiaries) in the EU and/or elsewhere. All rights reserved. All other marks featured may be trademarks of their respective owners. Copyright © 2016 ARM Limited © ARM 2017