Yuan Xing Lee, VP of LSI gave the talk at CAISS Annual Conference 2012, as part of the panel discussion: Storage Component Technologies - Enable Big Data and Make Better Cloud Computing.

1. Read Chanel Technologies For Data Storage
Presented by: Yuan Xing Lee, VP of Engineering, LSI, Oct 2012
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2. Outline
 Problem Statement
 Recording Ecosystem
 Anatomy of Read Channel
 Major Inflection Points
 New Challenges
 Summary
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3. Problem Statement
 First More and more data bits are being packed onto medium causing
 Level Body Text, Arial Regular, 20pt.
• Second Level Bullet, Arial Regular, continuously deteriorate;
signal-to-noise ratio (SNR) to 18pt.
- Third Level Bullet, Arial Regular, 16pt.
 SNR is primarily dictated by: down-track inter-symbol interference
(ISI), cross-track inter-track interference (ITI) and flying height
modulation, in conjunction with media/electronics noise;
 Signal processing and coding in read channel are devised to tackle
the above mentioned impairments;
 The objective of read channel is to recover data bits error-free from
noisy analog readback signal so to support areal density growth;
↑Density  ↓SNR  ↑Capability of Read Channel
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4. Recording Ecosystem
Spindle
Motor SoC
R/W
Microprocessor Subsystem
Channel
Motor
Drivers
Servo Buffer
Disk Formatter Host Interface
Management Management
HOST DRAM
Critical Components: Heads, Media, Mechanics, Preamp, Channel, HDC etc
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5. Anatomy of Read Channel
Analog Front-end Digital Signal Processor
Noisy analog VGA+MRA+CTF Equalizer
“Error-free”
SOVA
+PLL+ADC & DDNP
readback digital output
signal
LDPC
1
Gain + Timing + 1
0.8
0.6
DC Loops 0.8
0.6
0.4 0.4
0.2
0
Loops 0.2
0
-0.2 -0.2
-0.4 -0.4
-0.6 -0.6
-0.8 -0.8
-1 -1
0 5 10 15 20 25 0 5 10 15 20 25
Advanced signal proc. & coding recover data from highly noisy conditions
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6. Major Inflection Points
Major Inflection Points
16
14 1990 – 2000
Detection: peak detector --> PR4ML  Beyond 2010
12 EPR4ML  16-state Viterbi GPR Detection:  ITI, 2D, off-track
Noise Processing: noise whitening filter RLL: transition aware
RLL: 2/7, 1/7 RLL  8/9 RLL,
10 ECC: LDPC  new iterative codes,
SNR in dB
Inner ECC: 1-bit parity post-processing new soft-decision codes
Outer ECC: Reed-Solomon Recording:  SMR with super sectors,
8 HAMR, BPM
6 2000 -- 2010
Noise Processing: pattern-dependent filter
4 RLL: 10-bit high-rate RLL,
reverse concatenation, 4K
2 Inner ECC: parity  iterative decoding
Outer ECC: Reed-Solomon  LDPC
Recording: PMR
0
1990 1995 2000 2005 2010 2015
Years
Almost 10dB SNR gain in 2 decades: About 0.5dB per year!
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7. Process Technology Scaling
Process Technology Scaling
320 Moore’s Law
Allows to continuously add
complex algorithms into a given
160
die area within a given power
envelope, generation after
generation!
nm
80
40
20
1995 2000 2005 2010 2015
Years
Moore's law: Number of transistors doubles about every two year!
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8. New Challenges
 First DetectionText, Arial Regular, 20pt.
Level Body
•• Second Level Bullet, Arial Regular, 2D equalization/detection
Inter-track interference, off-track noise, 18pt.
• Challenge: 2D Bullet, Arial Regular, 16pt.
- Third Level data handling, computational complexity, area & latency overheads
Recording
• SMR with super sectors, TDMR etc
• Challenge: Data management, complexity, timing & position overheads, capacity, FH
control
Coding
• Beyond binary LDPC: Search for new iterative codes, soft decision codes, 2D-like
codes
• Challenge: multiple dBs away from theoretical limit, hard problems to solve in practical
implementation
Opportunities for multiple dB!
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9. LSI Consistent Leadership In Introducing LDPC Technology
LSI Delivers Industry's First 40nm Read
Channel to Hard Disk Drive Manufacturers
MILPITAS, Calif., June 23, 2009/PRNewswire-FirstCall/ -- LSI Corporation (NYSE: LSI) today
announced the TrueStore(R) RC9500, the industry's first 40-nanometer (nm) read channel.
Now sampling to hard disk drive (HDD) manufacturers, the RC9500 is designed to support
LSI Announces Industry's First 28nm Read
notebook through enterprise HDD form factors and capacity points. The RC9500's next-
generation low-density parity check (LDPC) iterative decoding technology enables a greater
Channel for Hard Disk Drive Manufacturers
than 10 percent increase in the data storage capacity of HDDs, reduces read channel power
consumption and delivers industry-leading performance with data rates exceeding 4.0Gb/s.
MILPITAS, Calif. , Dec. 22, 2011 /PRNewswire/ -- LSI Corporation (NYSE: LSI -
News) today announced that it is demonstrating to OEM customers the TrueStore®
LSI Sampling Industry’s First 28nm
RC5100 read channel for hard disk drives (HDD). The RC5100 is the industry's first
28nm read channel and features a new low-density parity check (LDPC) iterative
System-on-a-Chip to Accelerate Delivery
decoding architecture, which enables HDD manufacturers to achieve increased areal
density, higher yield and lower power consumption for HDDs.
of Higher-Capacity Hard Disk Drives
MILPITAS, Calif., February 29, 2012 – LSI Corporation (NYSE: LSI) today
announced it is sampling the industry’s first 28nm system-on-a-chip (SoC)
for the desktop and mobile HDD market segments. The transition to 28nm
SoC technology provides a cost-effective way to increase the amount of data
that can be stored on a hard drive by enabling higher areal density and yield
through superior signal-to-noise ratio performance.
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10. Summary
 First Level Body Text, Arial Regular, 20pt.
 The power of signal Regular, 18pt.
• Second Level Bullet, Arial processing and coding got untethered in
- Third Level Bullet, Arial Regular, partial response channel with maximum
circa1990 with advent of 16pt.
likelihood detection (PR4ML)
 Within two decades read channel garnered about 10dB of SNR
gains
 The recent and future developments encompass SMR and 2D
related technologies to fuel capacity growth
 Process technology finds ways to continue scale materializing
complex algorithms into silicon
Innovation will continue and more SNR gains are on the way
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