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PRESENTATION
HALF&FULL ADDER
Present by: MUHAMMAD YASIR
WHAT IS ADDER
• In electronics an adder is digital circuit that perform addition of numbers. In
modern computer adder reside in the arithmetic logic unit (ALU).
• Adders are important not only in the computer but also in many types of
digital systems in which the numeric data are processed.
Types of adder:
• Half adder
• Full adder
FIRST OF ALL WE DISCUSS
EXCLUSIVE GATE
• XOR Symbol
S= A B
A
B
Sum
+
WRITING THE TRUTH TABLE
• S is the sum
• C is the carry
• If the input is same then XOR is 0
• If the input is Different Then XOR is 1
INPUTS OUTPUTS
A B
C S
A•B A B
0 0 0 0
0 1 0 1
1 0 0 1
1 1 1 0
+
WHAT IS HALF ADDER
 : The half adder accepts two binary digits on its inputs and produce two binary
digits outputs, a sum bit and a carry bit.
 The half adder is an example of a simple, functional digital circuit built from two
logic gates. The half adder adds to one-bit binary numbers (AB). The output is the
sum of the two bits (S) and the carry (C).
• Sum = AB’+A’B or A. B
• Carry=A*B.
• Cout =A + B+AB+
+
DIAGRAM OF HALF ADDER
• Circuit Diagram
A
B
SSUM
CCARRY
WHAT IS FULL ADDER
• The full adder accepts two inputs bits and an input carry and generates a
sum output and an output carry.
• The full-adder circuit adds three one-bit binary numbers (Cin, A ,B) and
outputs two one-bit binary numbers, a sum (S) and a carry (Cout). The full-
adder is usually a component in a cascade of adders, which add 8, 16, 32,
etc. binary numbers.
CIRCUIT DIAGRAM FOR FULL
ADDER
• A
B
SSUM
CCARRY
CIN
TRUTH TABLE FOR FULL ADDER
• Three input
A,B,Ccarry
Two output
C0ut,Sum
FULL ADDER
• The full adder is usually drawn in a shorthand notation:
FULL
ADDER
A
B
CIN
CCARRY
SSUM
PARALLEL FULL ADDERS
•Two types of parallel adders w.r.t handling carry.
1. Ripple Carry adder(RCA
2. Look Ahead Carry adder(LACA
RIPPLE CARRY ADDER
• The parallel adder in which previous stage carry output is connected to the next
stage carry input
A4
C in2
C out1
C in1
B4 A3 B3 A2 B2 A1 B1
S4 S3 S2 S1
C in4
C out3
C in3
C out2
CARRY PROPAGATION DELAY
• The time difference between the application of input
carry to the occurrence of output carry in any stage
called Carry propagation delay
SHORTCOMINGS
• Very slow as the carry has to propagate from initial stage to final
stage for final sum.
• Final stage sum and final carry out depends upon the
calculations done by the all previous stages.
• Sum calculations for large numbers can delay the calculation for
enormous amount of time.
LOOK AHEAD CARRY AND RIPPLE CARRY
ADDER(TWO IN ONE)
IC 74LS283 is a 4 bit adder with look ahead carry built in features. i.e have
extra logic for LAC inside it.
.When we construct 8 bit or 16 bits or 32 bit or 64 bit adders using more than
one 74LS283.
We use in these adders ripple carry feature externally and LAC feature
internally.
LOOK AHEAD CARRY ADDER
• Carry for each stage is pre calculated with the help of extra hardware/logic circuits
to speed up the addition.
• As we know
• C out = ab + (a ⊕ b) C in
• Carry generated =ab=g;
• Carry propagated= a ⊕ b=p so…
• C out = ab + (a ⊕ b) C in= g + p C in
CARRY OUT CALCULATIONS FOR 4
BIT LAC ADDER
• C out1= g1 +p1C in1 (equation 1)………FA#1
• C in2= C out1. ………………………………….FA#2
• C out2= g2 +p2 C in2
• C out2= g2 +p2 C out1.
• C out2=g2 +p2 (g1 +p1 C in1)…… from eq1.
• C out2= g2 +p2g1+p2 p1 C in1…..eq2
• C in3 =C out2………………………………eq3….FA#3
• C out3= g3+p3 C in3
CARRY OUT CALCULATIONS FOR 4
BIT LAC ADDER
• C out3 =g3+p3 C out2…….using eq3
• C out3= g3+p3(g2 +p2g1+p2 p1 C in1)…. Using equ2
• C out3= g3 +p3g2+p3p2g1+p3p2p1 C in 1….. eq4
• C in4= C out3………………… eq5…………………….FA#4
• C out4= g4+p4 C in4
C out4= g4+p4 C out3…… from eq5
C out4=g4+p4(g3 +p3g2+p3p2g1+p3p2p1 C in 1)
C out4= g4+ p4g3 +p4p3g2+p4p3p2g1+p4p3p2p1 C in 1
DRAW LOGIC CIRCUIT DIAGRAM
FOR LAC LOGIC
• Inputs …..g1,g2,g3,g4,p1,p2,p3,p4, C in1
• Outputs……C out1,C out2,C out3,Cout4
FULL ADDER WITH LAC LOGIC
•
A1
B1
C in1
C out3
C out2
C out1
C in1
C out4C out4
p2
p3
p4
S4
S3
S2
S1
g2
p2
g3
p3
g4
p4
g1
p1
A3
p1
THE
END

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Fulll Adder

  • 2. WHAT IS ADDER • In electronics an adder is digital circuit that perform addition of numbers. In modern computer adder reside in the arithmetic logic unit (ALU). • Adders are important not only in the computer but also in many types of digital systems in which the numeric data are processed. Types of adder: • Half adder • Full adder
  • 3. FIRST OF ALL WE DISCUSS EXCLUSIVE GATE • XOR Symbol S= A B A B Sum +
  • 4. WRITING THE TRUTH TABLE • S is the sum • C is the carry • If the input is same then XOR is 0 • If the input is Different Then XOR is 1 INPUTS OUTPUTS A B C S A•B A B 0 0 0 0 0 1 0 1 1 0 0 1 1 1 1 0 +
  • 5. WHAT IS HALF ADDER  : The half adder accepts two binary digits on its inputs and produce two binary digits outputs, a sum bit and a carry bit.  The half adder is an example of a simple, functional digital circuit built from two logic gates. The half adder adds to one-bit binary numbers (AB). The output is the sum of the two bits (S) and the carry (C). • Sum = AB’+A’B or A. B • Carry=A*B. • Cout =A + B+AB+ +
  • 6. DIAGRAM OF HALF ADDER • Circuit Diagram A B SSUM CCARRY
  • 7. WHAT IS FULL ADDER • The full adder accepts two inputs bits and an input carry and generates a sum output and an output carry. • The full-adder circuit adds three one-bit binary numbers (Cin, A ,B) and outputs two one-bit binary numbers, a sum (S) and a carry (Cout). The full- adder is usually a component in a cascade of adders, which add 8, 16, 32, etc. binary numbers.
  • 8. CIRCUIT DIAGRAM FOR FULL ADDER • A B SSUM CCARRY CIN
  • 9. TRUTH TABLE FOR FULL ADDER • Three input A,B,Ccarry Two output C0ut,Sum
  • 10. FULL ADDER • The full adder is usually drawn in a shorthand notation: FULL ADDER A B CIN CCARRY SSUM
  • 11. PARALLEL FULL ADDERS •Two types of parallel adders w.r.t handling carry. 1. Ripple Carry adder(RCA 2. Look Ahead Carry adder(LACA
  • 12. RIPPLE CARRY ADDER • The parallel adder in which previous stage carry output is connected to the next stage carry input A4 C in2 C out1 C in1 B4 A3 B3 A2 B2 A1 B1 S4 S3 S2 S1 C in4 C out3 C in3 C out2
  • 13. CARRY PROPAGATION DELAY • The time difference between the application of input carry to the occurrence of output carry in any stage called Carry propagation delay
  • 14. SHORTCOMINGS • Very slow as the carry has to propagate from initial stage to final stage for final sum. • Final stage sum and final carry out depends upon the calculations done by the all previous stages. • Sum calculations for large numbers can delay the calculation for enormous amount of time.
  • 15. LOOK AHEAD CARRY AND RIPPLE CARRY ADDER(TWO IN ONE) IC 74LS283 is a 4 bit adder with look ahead carry built in features. i.e have extra logic for LAC inside it. .When we construct 8 bit or 16 bits or 32 bit or 64 bit adders using more than one 74LS283. We use in these adders ripple carry feature externally and LAC feature internally.
  • 16. LOOK AHEAD CARRY ADDER • Carry for each stage is pre calculated with the help of extra hardware/logic circuits to speed up the addition. • As we know • C out = ab + (a ⊕ b) C in • Carry generated =ab=g; • Carry propagated= a ⊕ b=p so… • C out = ab + (a ⊕ b) C in= g + p C in
  • 17. CARRY OUT CALCULATIONS FOR 4 BIT LAC ADDER • C out1= g1 +p1C in1 (equation 1)………FA#1 • C in2= C out1. ………………………………….FA#2 • C out2= g2 +p2 C in2 • C out2= g2 +p2 C out1. • C out2=g2 +p2 (g1 +p1 C in1)…… from eq1. • C out2= g2 +p2g1+p2 p1 C in1…..eq2 • C in3 =C out2………………………………eq3….FA#3 • C out3= g3+p3 C in3
  • 18. CARRY OUT CALCULATIONS FOR 4 BIT LAC ADDER • C out3 =g3+p3 C out2…….using eq3 • C out3= g3+p3(g2 +p2g1+p2 p1 C in1)…. Using equ2 • C out3= g3 +p3g2+p3p2g1+p3p2p1 C in 1….. eq4 • C in4= C out3………………… eq5…………………….FA#4 • C out4= g4+p4 C in4 C out4= g4+p4 C out3…… from eq5 C out4=g4+p4(g3 +p3g2+p3p2g1+p3p2p1 C in 1) C out4= g4+ p4g3 +p4p3g2+p4p3p2g1+p4p3p2p1 C in 1
  • 19. DRAW LOGIC CIRCUIT DIAGRAM FOR LAC LOGIC • Inputs …..g1,g2,g3,g4,p1,p2,p3,p4, C in1 • Outputs……C out1,C out2,C out3,Cout4
  • 20. FULL ADDER WITH LAC LOGIC • A1 B1 C in1 C out3 C out2 C out1 C in1 C out4C out4 p2 p3 p4 S4 S3 S2 S1 g2 p2 g3 p3 g4 p4 g1 p1 A3 p1