A fast fpga based architecture for measuring the distance between

International Journal of Electronics and Communication Engineering & Technology (IJECET), ISSN
0976 – 6464(Print), ISSN 0976 – 6472(Online) Volume 4, Issue 3, May – June (2013), © IAEME
1
A FAST FPGA BASED ARCHITECTURE FOR MEASURING THE
DISTANCE BETWEEN TWO COLOR IMAGES USING MANHATTAN
DISTANCE METRIC
A. Hasnat1
, S. Halder1
, A. Hoque2
, D. Bhattacharjee3
, M. Nasipuri 3
1
Dept. of Computer Science and Engineering, Government College of Engineering Textile
Technology, Berhampore, West Bengal, India,
2
Research Scholar, Kalyani University, West Bengal, India
3
Dept. of Computer Science and Engineering, Jadavpur University, Kolkata, India,
ABSTRACT
This paper presents an efficient FPGA based architecture for measuring the distance
between two RGB color images using Manhattan distance. There are a lot of research works
in literature to measure the distance between two images of same size like Euclidean method,
Manhattan distance, Vector Cosine Angle Distance, Modified Euclidean distance based on
histogram etc. In the present work, Manhattan distance metric is used to measure the distance
between two images due to its simplicity and wide acceptability and the FPGA
implementation of Manhattan distance method is designed in an efficient way. The result
shows that the architecture is able to operate at 171.585 MHz speed which is faster than any
software solution.
Keywords: Distance metric, Manhattan distance, FPGA.
I. INTRODUCTION
Image processing has become a vibrant area of research over the last few years and
distance measurement between two images is needed in many applications of it [1][2][3].
There exist different distance metrics to measure the distance between two images of same
size i.e. Manhattan Distance [4][5], Euclidean Distance[4][5], Vector Cosine Angle
Distance(VCAD) [5][6], Modified Euclidean Distance based on histogram index[4][5] etc.
Among these distance metrics, Manhattan distance and Euclidean distance gives the metric of
dissimilarity whereas Vector Cosine Angle Distance and Modified Euclidean distance gives
INTERNATIONAL JOURNAL OF ELECTRONICS AND
COMMUNICATION ENGINEERING & TECHNOLOGY (IJECET)
ISSN 0976 – 6464(Print)
ISSN 0976 – 6472(Online)
Volume 4, Issue 3, May – June, 2013, pp. 01-10
© IAEME: www.iaeme.com/ijecet.asp
Journal Impact Factor (2013): 5.8896 (Calculated by GISI)
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© I A E M E

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the metric of similarity [6]. As the Manhattan Distance metric is the simple one, this paper
focuses on implementation FPGA based architecture for it.
FPGA (Field Programmable Gate Array) design allows designers to design their own
modules according to their needs and upgrade the system conveniently. The system design
based on FPGA is flexible with the advantages of parallelism, low cost and low power
consumption [7]. The main purpose of our work is to design a feasible hardware circuits
based on FPGA for Manhattan distance to measure distance between two images of same size
to improve the processing speed.
This paper is organized as follows: The section II presents the preprocessing of the
images needed for the FPGAA architecture. Section III presents the top level design of the
circuit. Section IV depicts the proposed system architecture for Manhattan distance metric.
Section V shows the experimental results and finally section VI concludes and remarks about
some of the aspects analyzed in this paper of the paper.
II. PREPROCESSING
The proposed architecture for Manhattan Distance metric is implemented on Xilinx
Spartan3 XC3S50-5PQ208 FPGA. As the division operation is not allowed and division is
needed to calculate average distance in the present work images are resized into power of two
as average could be performed by only shift operation. So in this work each image is resized
into pixel size. Fig. 1(b) shows the resized images of the original images shown in Fig. 1(a)
(a)
(b)
(c)
(d)
(e)
(f)
(a) (b)
Figure 1: Example of preprocessing (a) Original images (b) Resized images

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Another preprocessing is done for giving the input to the FPGA module. Two input
text files have been generated using Matlab containing the Red, Green and Blue intensity of a
pixel in each row of the text file for two input images.
III. MANHATTAN DISTANCE
The Manhattan distance computes the sum of difference in each dimension of two
vectors in n dimensional vector space. It is the sum of the absolute differences of their
corresponding components. Manhattan distance is also called the 1L distance. If
)....,( 21 nxxxu = and ).....,( 21 nyyyv = are two vectors in n dimensional hyper plane, then the
Manhattan Distance ),( vuMD between two vectors u, v is given by the Eq. 1.
nn yxyxyxvuMD −++−+−= ....),( 2211
∑
=
−=
n
i
ii yx
1
(1)
Now for two RGB scale images of size qp × , ),,(1 cbaI and ),,(2 cbaI where pa ....2,1= ,
qb ..2,1= and 3,2,1=c where c represents color intensity values Red, Green, Blue
respectively. Manhattan Distance is measured using Eq. 2.
∑∑∑
= = =
−=
p
a
q
b c
cbaIcbaIIIMD
1 1
3
1
2121 ),,(),,(),( (2)
As the number of pixels, n which falls in skin region varies with varying size of the image, so
rather than taking the absolute distance further the distance is being normalized using Eq. 3.
n
IIMD
IIMD
),(
),( 21
211 = (3)
where n=total number of pixels considered.
IV. TOP LEVEL DESIGN
The top level design of FPGA architecture for Manhattan distance metric is shown in
Fig 2. The proposed architecture takes one 8-bit value for each of the Red, Green, Blue color
channels for each pixel of the 1st
image as input { 111 ,, BGR }. Likewise it also takes one 8-bit
value for each of the red, green, blue color channels for each pixel of 2nd image as
input{ 222 ,, BGR }. Then the system calculates absolute difference between }{},{ 2121 GGRR −− and
}{ 21 BB − . Then the system sums up all these absolute difference. This process is continued for
all the pixels. After calculation of summation for all pixels the sum is divided by number of
pixels considered that is 128x128=16384 for the present system to get the average value. Fig.
2 shows the top level design of proposed architecture.

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Figure 2: Top level Design Manhattan Distance metric
V. SYSTEM ARCHITECTURE
The proposed architecture of FPGA based Manhattan distance measurement of two
images is shown in Fig. 3. The architecture contains three modules for subtraction, three
modules for addition and one module for addition followed by division. The division is
achieved by shifting operation. The modeling of the internal architecture of each block has
been designed using Very high-speed integrated circuit Hardware Description Language
(VHDL). Each block is controlled by a global clock.
Figure 3: System architecture of FPGA based Manhattan Distance calculation

5
A. Subtractor Module
These modules take two 8-bit inputs and produce their absolute subtraction value in 8-
bit. These blocks offer a latency of one clock cycle each. The symbolic representation of a
subtractor block is shown in Fig. 4. Algorithm 1 describes the function of these modules.
Figure 4: Symbolic representation of subtractor block
Algorithm 1
Algorithm Subtractor
{Input: I1, I2}
{Output: O}
Begin
21 IIO −= ;
End {End of Algorithm}
B. Adder Module
These modules take one 8-bit input and one 22-bit input and produce their summation value
in 22-bit. These blocks offer a latency of one clock cycle each. The symbolic representation
of Adder block is shown in Fig. 5. Algorithm 2 describes the function of these modules.
Figure 5: Symbolic representation of adder block

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Algorithm 2
Algorithm Adder
{Input: I1(in 8bits), I2(in 22 bits)}
{Output: O}
Begin
//Append 14 zeros in left hand side of I1 to convert it into 22 //bits.
I11 = "00000000000000" & I1;
// Add I11 and I2
O = I11 + I2;
C. Adder with Shifter Module
These modules take three 22-bit inputs, add them and produce divides the sum with
128×128. Here the division is performed by shifting the sum by 14 bits right shift. This block
offers a latency of one clock cycle. The symbolic representation of Adder block is shown in
Fig. 6. Algorithm 3 describes the function of these modules.
Figure 6: Symbolic representation of adder with shifter block
Algorithm 3
Algorithm Adder with Shifter
{Input: I1 (in 22 bits), I2 (in 22 bits), I3 (in 22 bits)}
{Output: O (in 10 bits)}
Begin
I123 = I1 + I2 + I3;
O = I123 >> 14;
VI. RTL SIMULATION
Simulation for the FPGA based Manhattan distance calculation architecture described
in this paper is done with the Model SimSE 6.2c. For the testing of the system correctness a
testbench file is written in VHDL. The testbench file reads the values of R1, G1, B1 for a
pixel of the first image from a text file named Input1.txt and the values of R2, G2, B2 of

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second image from a text file called Input2.txt. The testbench writes the result in a different
text file called Output.txt. The simulation result for the testbench is shown in the Fig. 7.
Figure 7: Simulation Result
VII. EXPERIMENTAL RESULT
The FPGA based Manhattan distance calculation architecture was implemented on
VHDL, synthesized for a Xilinx Spartan 3 XC3S50-5PQ208 FPGA with simulation on the
Modelsim 6.2c from Mentor Graphics Corporation. The device utilization summary is given
in Table 1. The architecture is capable of operating at a clock frequency of 171.585 MHz or
the minimum clock period is 5.828 ns. Hence for calculating the Manhattan distance of two
images having image size 128×128 requires 0.095 ms.
TABLE 1: DEVICE UTILIZATION SUMMARY
Usage Total Percentage
Number of Slices 100 1408 7%
Number of Slice Flip Flops 100 2816 3%
Number of 4 input LUTs 180 2816 6%
Number of bonded IOBs 58 140 41%
Number of GCLKs 1 4 6%
Some sample results with calculating Manhattan distance is shown in Fig. 8 to Fig. 14.
(a) (b)
Manhattan distance=127
Figure 8: Manhattan distance (a) Image1 (b) Image2

8
(a) (b)
(a) (b)
(a) (b)
(a) (b)

9
(a) (b)
(a) (b)
(a) (b)
VIII. CONCLUSION
The FPGA based architecture for calculating the Manhattan distance between two
images is useful in many image processing applications. This architecture is capable of
operating at a speed 171.585 MHz on a Vertex 2P FPGA kit which is much faster than any
software solution and hence the proposed methodology is applicable in a real time system.

10
ACKNOWLEDGMENT
Authors are thankful to the "Center for Microprocessor Application for Training
Education and Research", "Project on Storage Retrieval and Understanding of Video for
Multimedia" at Computer Science & Engineering Department, Jadavpur University, for
providing infrastructural facilities during progress of the work. Two of the authors, Dr.
Santanu Halder and Mr. Abul Hasnat, are thankful to Government College of Engineering
and Textile Technology, Berhampore,WB for kindly permitting them to carry on the
research work.
REFERENCES
[1] R. C. Gonzalez, R. E. Woods, S. L. Eddins, “Digital Image processing using
MATLB”, Mc-Graw Hill, 2011.
[2] W. K. Pratt, “Digital image processing”, A Wiley Interscience Publication, 1991.
[3] R. C. Gonzalez, R. E. Woods, “Digital Image Processing”, Addison Wesley, 2002.
[4] Jain Anil K,Vailaya Aditya, (1996), “Image retrieval using color and shape”, Pattern
Recognition, Volume 29, Issue 8, Pages 1233–1244.
[5] Abul Hasnat, Santanu Halder, D. Bhattacharjee, M. Nasipuri, D. K. Basu, “Comparative
Study of Distance Metrics for Finding Skin Color Similarity of Two Color Facial
Images,” ACER 2013, pp. 99–108, 2013, DOI : 10.5121/csit.2013.3210.
[6] A Vadivel, A K Majumdar, Shamik Sural, ( 2003),“Performance comparison of
distance metrics in content-based Image retrieval applications”, International
Conference on Information Technology (CIT), Bhubaneswar, India, pp. 159-164..
[7] Jayaram Bhasker, A VHDL Primer, 3rd
edition, P T R Prentice Hall, 1998.
[8] K.Ganapathi Babu, A.Komali, V.Satish Kumar and A.S.K.Ratnam, “An Overview of
Content Based Image Retrieval Software Systems”, International journal of Computer
Engineering & Technology (IJCET), Volume 3, Issue 2, 2012, pp. 424 - 432,
ISSN Print: 0976 – 6367, ISSN Online: 0976 – 6375.
[9] Abhishek Choubey , Omprakash Firke and Bahgwan Swaroop Sharma, “Rotation and
Illumination Invariant Image Retrieval using Texture Features”, International Journal of
Electronics and Communication Engineering &Technology (IJECET), Volume 3,
Issue 2, 2012, pp. 48 - 55, ISSN Print: 0976- 6464, ISSN Online: 0976 –6472.
[10] Tarun Dhar Diwan and Upasana Sinha, “Performance Analysis Is Basis on Color Based
Image Retrieval Technique”, International Journal of Computer Engineering &
Technology (IJCET), Volume 4, Issue 1, 2013, pp. 131 - 140, ISSN Print: 0976 – 6367,
ISSN Online: 0976 – 6375.

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