SlideShare une entreprise Scribd logo
1  sur  30
Data Representation               1

                       DATA REPRESENTATION


                         Data Types

                         Complements

                         Fixed Point Representations

                         Floating Point Representations

                         Other Binary Codes

                         Error Detection Codes




Rashid Farid Chishti                                      Computer Architecture
Data Representation                       2                              Data Types

                          DATA REPRESENTATION


               Information that a Computer is dealing with

                       * Data
                          - Numeric Data
                              Numbers( Integer, real)
                          - Non-numeric Data
                              Letters, Symbols

                       * Relationship between data elements
                          - Data Structures
                              Linear Lists, Trees, Rings, etc

                       * Program(Instruction)




Rashid Farid Chishti                                            Computer Architecture
Data Representation                      3                                 Data Types

             NUMERIC DATA REPRESENTATION
        Data
                Numeric data - numbers(integer, real)
                Non-numeric data - symbols, letters

        Number System
               Nonpositional number system
                      - Roman number system
               Positional number system
                      - Each digit position has a value called a weight
                             associated with it
                      - Decimal, Octal, Hexadecimal, Binary
        Base (or radix) R number
          - Uses R distinct symbols for each digit
          - Example AR = an-1 an-2 ... a1 a0 .a-1…a-m

                         n −1                   Radix point(.) separates the integer
           - V(AR ) =
                        ∑a R
                        i =− m
                                 i
                                     i
                                                portion and the fractional portion


                R = 10 Decimal number system,     R = 2 Binary
                R = 8 Octal,                      R = 16 Hexadecimal
Rashid Farid Chishti                                              Computer Architecture
Data Representation                    4                                              Data Types

    WHY POSITIONAL NUMBER SYSTEM IN DIGITAL COMPUTERS ?


     Major Consideration is the COST and TIME

        - Cost of building hardware
            Arithmetic and Logic Unit, CPU, Communications
        - Time to processing

     Arithmetic - Addition of Numbers - Table for Addition         Binary Addition Table
                                                                             0   1

          * Non-positional Number System                                 0   0   1

              - Table for addition is infinite                           1   1   10
                --> Impossible to build, very expensive even       Decimal Addition Table
                     if it can be built                                  0 1 2 3 4 5 6 7 8 9
                                                                     0   0 1 2 3 4 5 6 7 8 9
                                                                     1   1 2 3 4 5 6 7 8 9 10
          * Positional Number System                                 2   2 3 4 5 6 7 8 9 1011
                                                                     3   3 4 5 6 7 8 9 101112
              - Table for Addition is finite                         4   4 5 6 7 8 9 10111213
                                                                     5   5 6 7 8 9 1011121314
                --> Physically realizable, but cost wise             6   6 7 8 9 101112131415
                    the smaller the table size, the less             7   7 8 9 10111213141516
                                                                     8   8 9 1011121314151617
                    expensive --> Binary is favorable to Decimal     9   9 101112131415161718


Rashid Farid Chishti                                                     Computer Architecture
Data Representation                 5                                  Data Types

           REPRESENTATION OF NUMBERS - POSITIONAL NUMBERS


               Decimal Binary Octal Hexadecimal
                 00    0000    00       0
                 01    0001    01       1
                 02    0010    02       2
                 03    0011    03       3
                 04    0100    04       4
                 05    0101    05       5
                 06    0110    06       6
                 07    0111    07       7
                 08    1000    10       8
                 09    1001    11       9
                 10    1010    12       A
                 11    1011    13       B
                 12    1100    14       C
                 13    1101    15       D
                 14    1110    16       E
                 15    1111    17       F

                       Binary, octal, and hexadecimal conversion
                          1     2      7      5    4      3      Octal
                          1 0 1 0 1 1 1 1 0 1 1 0 0 0 1 1        Binary
                               A         F       6       3        Hexa
Rashid Farid Chishti                                          Computer Architecture
Data Representation                      6                                     Data Types

                       CONVERSION OF BASES
       Base R to Decimal Conversion
                           A = an-1 an-2 an-3 … a0 . a-1 … a-m
                        V(A) = Σ ak Rk
                (736.4)8 = 7 x 82 + 3 x 81 + 6 x 80 + 4 x 8-1
                         = 7 x 64 + 3 x 8 + 6 x 1 + 4/8 = (478.5)10
                (110110)2 = ... = (54)10
                (110.111)2 = ... = (6.785)10
                (F3)16 = ... = (243)10
                (0.325)6 = ... = (0.578703703 .................)10
      Decimal to Base R number
           - Separate the number into its integer and fraction parts and convert
                  each part separately.
           - Convert integer part into the base R number
             → successive divisions by R and accumulation of the remainders.
           - Convert fraction part into the base R number
             → successive multiplications by R and accumulation of integer
                  digits
Rashid Farid Chishti                                                  Computer Architecture
Data Representation                          7                                       Data Types

                                        EXAMPLE
                                                                 Fraction = 0.6875
        Convert 41.687510 to base 2.
                                                                 0.6875
                       Integer = 41                              x    2
                       41                                        1.3750
                       20 1                                      x    2
                       10 0                                      0.7500
                        5 0                                      x    2
                        2 1                                      1.5000
                        1 0                                       x   2
                        0 1                                      1.0000
                      (41)10   = (101001)2                      (0.6875)10   = (0.1011)2


                                 (41.6875)10 = (101001.1011)2

           Exercise
          Convert (63)10 to base 5:              (223)5
          Convert (1863)10 to base 8:            (3507)8
          Convert (0.63671875)10 to hexadecimal: (0.A3)16
Rashid Farid Chishti                                                     Computer Architecture
Data Representation                    8                                  Complements

                       COMPLEMENT OF NUMBERS

      Two types of complements for base R number system:
          - R's complement and (R-1)'s complement


      The (R-1)'s Complement
          Subtract each digit of a number from (R-1)
          Example
            - 9's complement of 83510 is 16410
             - 1's complement of 10102 is 01012(bit by bit complement operation)


      The R's Complement
          Add 1 to the low-order digit of its (R-1)'s complement
          Example
            - 10's complement of 83510 is 16410 + 1 = 16510
            - 2's complement of 10102 is 01012 + 1 = 01102
Rashid Farid Chishti                                               Computer Architecture
Data Representation                            9               Fixed Point Representations

                           FIXED POINT NUMBERS
       Numbers:          Fixed Point Numbers and Floating Point Numbers

      Binary Fixed-Point Representation

           X = xnxn-1xn-2 ... x1x0. x-1x-2 ... x-m

           Sign Bit(xn): 0 for positive - 1 for negative

           Remaining Bits(xn-1xn-2 ... x1x0. x-1x-2 ... x-m)




Rashid Farid Chishti                                               Computer Architecture
Data Representation                    10

                            SIGNED NUMBERS
      Need to be able to represent both positive and negative numbers

                - Following 3 representations

                       Signed magnitude representation
                       Signed 1's complement representation
                       Signed 2's complement representation


       Example: Represent +9 and -9 in 7 bit-binary number

              Only one way to represent +9 ==> 0 001001
              Three different ways to represent -9:
                       In signed-magnitude:         1 001001
                       In signed-1's complement: 1 110110
                       In signed-2's complement: 1 110111

      In general, in computers, fixed point numbers are represented
             either integer part only or fractional part only.
Rashid Farid Chishti                                           Computer Architecture
Data Representation                              11                        Fixed Point Representations

  CHARACTERISTICS OF 3 DIFFERENT REPRESENTATIONS
     Complement
          Signed magnitude: Complement only the sign bit
          Signed 1's complement: Complement all the bits including sign bit
          Signed 2's complement: Take the 2's complement of the number,

                                including its sign bit.
     Maximum and Minimum Representable Numbers and Representation of Zero
                     X = xn xn-1 ... x0 . x-1 ... x-m

              Signed Magnitude
                       Max: 2n - 2-m      011 ... 11.11 ... 1
                       Min: -(2n - 2-m)   111 ... 11.11 ... 1
                       Zero: +0           000 ... 00.00 ... 0
                                -0         100 ... 00.00 ... 0

              Signed 1’s Complement                              Signed 2’s Complement
                       Max: 2n - 2-m      011 ... 11.11 ... 1          Max: 2n - 2-m   011 ... 11.11 ... 1
                       Min: -(2n - 2-m)   100 ... 00.00 ... 0          Min: -2n        100 ... 00.00 ... 0
                       Zero: +0           000 ... 00.00 ... 0          Zero: 0         000 ... 00.00 ... 0
                               -0          111 ... 11.11 ... 1


Rashid Farid Chishti                                                             Computer Architecture
Data Representation                        12

    2’s COMPLEMENT REPRESENTATION WEIGHTS


     • Signed 2’s complement representation follows a “weight” scheme
       similar to that of unsigned numbers
          – Sign bit has negative weight
          – Other bits have regular weights



           X = xn xn-1 ... x0
                                 n-1
           V(X) = - xn × 2n +
                                Σi=0
                                       xi × 2i




Rashid Farid Chishti                                        Computer Architecture
Data Representation                      13                  Fixed Point Representations

     ARITHMETIC ADDITION: SIGNED MAGNITUDE
       [1] Compare their signs
       [2] If two signs are the same ,
           ADD the two magnitudes - Look out for an overflow
       [3] If not the same , compare the relative magnitudes of the numbers and
            then SUBTRACT the smaller from the larger --> need a subtractor to add
       [4] Determine the sign of the result

                       6+9                               -6 + 9
                          6   0110                   9   1001
                       +) 9   1001                 -)6   0110
                        15    1111 -> 01111          3   0011 -> 00011

                       6 + (- 9)                         -6 + (-9)
                      9 1001                           6 0110
                   -) 6 0110                        +) 9 1001
                    - 3 0011 -> 10011               -15 1111 -> 11111
          Overflow 9 + 9 or (-9) + (-9)
                          9 1001
                       +) 9 1001
                  overflow (1)0010
Rashid Farid Chishti                                              Computer Architecture
Data Representation                     14                             Fixed Point Representations

                  ARITHMETIC ADDITION: SIGNED 2’s
                           COMPLEMENT
     Add the two numbers, including their sign bit, and discard any carry out of
        leftmost (sign) bit - Look out for an overflow




           Example
                          6 0 0110                           -6    1 1010
                       +) 9 0 1001                         +) 9    0 1001
                         15 0 1111                            3    0 0011

                           6 0 0110                          -9   1 0111
                       +) -9 1 0111                       +) -9   1 0111
                          -3 1 1101                        -18 (1)0 1110
                                                                      x’n-1y’n-1sn-1
                                                                      (cn-1 ⊕ cn)

                          9   0 1001                  overflow
                       +) 9   0 1001                       2 operands have the same sign
                         18   1 0010                       and the result sign changes
                                       xn-1yn s’n-1        xn-1yn-1s’n-1 + x’n-1y’n-1sn-1 = cn-1⊕   cn
                                       (cn-1 ⊕ cn)

Rashid Farid Chishti                                                           Computer Architecture
Data Representation                       15                    Fixed Point Representations

                   ARITHMETIC ADDITION: SIGNED 1’s
                            COMPLEMENT
    Add the two numbers, including their sign bits.
       - If there is a carry out of the most significant (sign) bit, the result is
                incremented by 1 and the carry is discarded.


             Example                               end-around carry
                                   6   0 0110          -6     1 1001
                       +)         -9   1 0110     +)    9     0 1001
                                  -3   1 1100             (1) 0(1)0010
                                                  +)                 1
                                                        3     0 0011
                                                      not overflow (cn-1   ⊕ cn ) = 0


                            -9 1 0110                9 0    1001
                       +)   -9 1 0110             +) 9 0    1001
                              (1)0 1100                1 (1)0010
                       +)             1
                                 0 1101
                                                overflow
                                                (cn-1 ⊕ cn)

Rashid Farid Chishti                                                  Computer Architecture
Data Representation                     16                       Fixed Point Representations

           COMPARISON OF REPRESENTATIONS

            * Easiness of negative conversion

                       S + M > 1’s Complement > 2’s Complement

            * Hardware

                 - S+M: Needs an adder and a subtractor for Addition
                 - 1’s and 2’s Complement: Need only an adder

            * Speed of Arithmetic

                 2’s Complement > 1’s Complement(end-around C)

            * Recognition of Zero

                 2’s Complement is fast




Rashid Farid Chishti                                                 Computer Architecture
Data Representation                   17                     Fixed Point Representations

                       ARITHMETIC SUBTRACTION

        Arithmetic Subtraction in 2’s complement

              Take the complement of the subtrahend (including the sign bit)
              and add it to the minuend including the sign bits.


                          (± A)-(-B) =(± A)+ B
                          (± A)- B=(± A)+( -B)




Rashid Farid Chishti                                             Computer Architecture
Data Representation                     18                      Floating Point Representation

     FLOATING POINT NUMBER REPRESENTATION
       * The location of the fractional point is not fixed to a certain location
       * The range of the representable numbers is wide

                              F = EM

              mn ekek-1 ... e0 mn-1mn-2 … m0 . m-1 … m-m
             sign exponent             mantissa

           - Mantissa
              Signed fixed point number, either an integer or a fractional number

           - Exponent
               Designates the position of the radix point



        Decimal Value

                        V(F) = V(M) * RV(E)          M: Mantissa
                                                     E: Exponent
                                                     R: Radix

Rashid Farid Chishti                                                  Computer Architecture
Data Representation                       19                 Floating Point Representation

                       FLOATING POINT NUMBERS
     Example             sign                            sign
                           0         .1234567             0       04
                                  mantissa                 exponent
                                 ==> +.1234567 x 10+04
       Note:
        In Floating Point Number representation, only Mantissa(M) and
        Exponent(E) are explicitly represented. The Radix(R) and the position
        of the Radix Point are implied.

     Example
         A binary number +1001.11 in 16-bit floating point number representation
         (6-bit exponent and 10-bit fractional mantissa)

                         0     0 00100 100111000
                        Sign   Exponent   Mantissa
                or
                         0     0 00101 010011100



Rashid Farid Chishti                                               Computer Architecture
Data Representation                  20                      Floating Point Representation

               CHARACTERISTICS OF FLOATING POINT NUMBER
                          REPRESENTATIONS
 Normal Form

     - There are many different floating point number representations of
         the same number
       → Need for a unified representation in a given computer

     - the most significant position of the mantissa contains a non-zero digit



    Representation of Zero

        - Zero
            Mantissa = 0

        - Real Zero
            Mantissa = 0
            Exponent
                    = smallest representable number
                      which is represented as
                      00 ... 0
                      ← Easily identified by the hardware
Rashid Farid Chishti                                               Computer Architecture
Data Representation                            21

     INTERNAL REPRESENTATION AND EXTERNAL REPRESENTATION




            Another
           Computer                                            External
                                                         Representation



                   External
             Representation                Internal
                                        Representation                       Human


                                                CPU
                                               Memory



                              External
                              Representation
              Device




Rashid Farid Chishti                                                      Computer Architecture
Data Representation                22                          External Representations

                       EXTERNAL REPRESENTATION
 Numbers
    Most of numbers stored in the computer are eventually changed
      by some kinds of calculations
    → Internal Representation for calculation efficiency
    → Final results need to be converted to as External Representation
              for presentability

 Alphabets, Symbols, and some Numbers
     Elements of these information do not change in the course of processing
     → No needs for Internal Representation since they are not used
              for calculations
     → External Representation for processing and presentability
                                                     Decimal      BCD Code
                                                        0          0000
 Example                                                1          0001
    Decimal Number: 4-bit Binary Code                   2          0010
                    BCD(Binary Coded Decimal)           3          0011
                                                        4          0100
                                                        5          0101
                                                        6          0110
                                                        7          0111
                                                        8          1000
                                                        9          1001

Rashid Farid Chishti                                            Computer Architecture
Data Representation                      23                               External Representations

                       OTHER DECIMAL CODES
   Decimal BCD(8421)   2421   84-2-1   Excess-3
      0      0000      0000   0000     0011
      1      0001      0001   0111     0100
      2      0010      0010   0110     0101
      3      0011      0011   0101     0110
      4      0100      0100   0100     0111
      5      0101      1011   1011     1000
      6      0110      1100   1010     1001
      7      0111      1101   1001     1010        Note: 8,4,2,-2,1,-1 in this table is the weight
                                                   associated with each bit position.
      8      1000      1110   1000     1011
      9      1001      1111   1111     1100          d3 d2 d1 d0: symbol in the codes

                                              BCD: d3 x 8 + d2 x 4 + d1 x 2 + d0 x 1
                                                          ⇒ 8421 code.
                                              2421: d3 x 2 + d2 x 4 + d1 x 2 + d0 x 1
                                              84-2-1: d3 x 8 + d2 x 4 + d1 x (-2) + d0 x (-1)
                                              Excess-3: BCD + 3
     BCD: It is difficult to obtain the 9's complement.
     However, it is easily obtained with the other codes listed above.
           → Self-complementing codes
Rashid Farid Chishti                                                        Computer Architecture
Data Representation                    24                                 Other Binary codes

                                  GRAY CODE
   * Characterized by having their representations of the binary integers differ
          in only one digit between consecutive integers

   * Useful in some applications


                                  Decimal  Gray           Binary
                                  number g3 g2 g1   g0   b3 b2 b1 b0
                                    0     0 0 0     0     0 0 0 0
                                    1     0 0 0     1     0 0 0 1
                                    2     0 0 1     1     0 0 1 0
                                    3     0 0 1     0     0 0 1 1
                                    4     0 1 1     0     0 1 0 0
               4-bit Gray codes     5     0 1 1     1     0 1 0 1
                                    6     0 1 0     1     0 1 1 0
                                    7     0 1 0     0     0 1 1 1
                                    8     1 1 0     0     1 0 0 0
                                    9     1 1 0     1     1 0 0 1
                                   10     1 1 1     1     1 0 1 0
                                   11     1 1 1     0     1 0 1 1
                                   12     1 0 1     0     1 1 0 0
                                   13     1 0 1     1     1 1 0 1
                                   14     1 0 0     1     1 1 1 0
                                   15     1 0 0     0     1 1 1 1


Rashid Farid Chishti                                                   Computer Architecture
Data Representation                      25                                    Other Binary codes

                        GRAY CODE - ANALYSIS
   Letting gngn-1 ... g1 g0 be the (n+1)-bit Gray code
                  for the binary number bnbn-1 ... b1b0

                   gi = bi ⊕ bi+1 , 0 ≤ i ≤ n-1
                   g n = bn                               Reflection of Gray codes
                  and
                                                            ε   0   0   0     0   00   0   000
                   bn-i = gn ⊕ gn-1 ⊕ . . . ⊕ gn-i              1   0   1     0   01   0   001
                   b n = gn                                         1   1     0   11   0   011
                                                                    1   0     0   10   0   010
                                                                              1   10   0   110
                                                                              1   11   0   111
                                                                              1   01   0   101
      Note:                                                                   1   00   0   100
                                                                                       1   100
       The Gray code has a reflection property                                         1   101
                                                                                       1   111
         - easy to construct a table without calculation,                              1   010
         - for any n: reflect case n-1 about a                                         1   011
               mirror at its bottom and prefix 0 and 1                                 1   001
                                                                                       1   101
               to top and bottom halves, respectively                                  1   000


Rashid Farid Chishti                                                        Computer Architecture
Data Representation                          26                                  Other Binary codes

             CHARACTER REPRESENTATION ASCII
    ASCII (American Standard Code for Information Interchange) Code

                                      MSB (3 bits)
                                        0     1      2    3   4   5   6   7

                         LSB      0    NUL   DLE     SP   0   @   P   ‘   P
                       (4 bits)   1    SOH   DC1     !    1   A   Q   a   q
                                  2    STX   DC2     “    2   B   R   b   r
                                  3    ETX   DC3     #    3   C   S   c   s
                                  4    EOT   DC4     $    4   D   T   d   t
                                  5    ENQ   NAK     %    5   E   U   e   u
                                  6    ACK   SYN     &    6   F   V   f   v
                                  7    BEL   ETB     ‘    7   G   W   g   w
                                  8    BS    CAN     (    8   H   X   h   x
                                  9    HT    EM      )    9   I   Y   I   y
                                  A    LF    SUB     *    :   J   Z   j   z
                                  B    VT    ESC     +    ;   K   [   k   {
                                  C    FF    FS      ,    <   L      l   |
                                  D    CR    GS      -    =   M   ]   m   }
                                  E    SO    RS      .    >   N   m   n   ~
                                  F    SI    US      /    ?   O   n   o   DEL

Rashid Farid Chishti                                                          Computer Architecture
Data Representation                     27                             Other Binary codes

  CONTROL CHARACTER REPRESENTAION (ACSII)

     NUL    Null                       DC1    Device Control 1
     SOH    Start of Heading (CC)      DC2    Device Control 2
     STX    Start of Text (CC)         DC3    Device Control 3
     ETX    End of Text (CC)           DC4    Device Control 4
     EOT    End of Transmission (CC)   NAK    Negative Acknowledge (CC)
     ENQ    Enquiry (CC)               SYN    Synchronous Idle (CC)
     ACK    Acknowledge (CC)           ETB    End of Transmission Block (CC)
     BEL    Bell                       CAN    Cancel
     BS     Backspace (FE)             EM     End of Medium
     HT     Horizontal Tab. (FE)       SUB    Substitute
     LF     Line Feed (FE)             ESC    Escape
     VT     Vertical Tab. (FE)         FS     File Separator (IS)
     FF     Form Feed (FE)             GS     Group Separator (IS)
     CR     Carriage Return (FE)       RS     Record Separator (IS)
     SO     Shift Out                  US     Unit Separator (IS)
     SI     Shift In                   DEL    Delete
     DLE    Data Link Escape (CC)
                        (CC) Communication Control
                        (FE) Format Effector
                        (IS) Information Separator

Rashid Farid Chishti                                                 Computer Architecture
Data Representation                    28                         Error Detecting codes

                       ERROR DETECTING CODES


       Parity System

           - Simplest method for error detection
           - One parity bit attached to the information
           - Even Parity and Odd Parity

             Even Parity
              - One bit is attached to the information so that
                the total number of 1 bits is an even number

                       1011001 0
                       1010010 1

             Odd Parity
              - One bit is attached to the information so that
                the total number of 1 bits is an odd number

                       1011001 1
                       1010010 0


Rashid Farid Chishti                                             Computer Architecture
Data Representation                        29

                         PARITY BIT GENERATION



            Parity Bit Generation

                 For b6b5... b0(7-bit information); even parity bit beven

                       beven = b6 ⊕ b5 ⊕ ... ⊕ b0

                 For odd parity bit

                       bodd = beven ⊕ 1 = beven




Rashid Farid Chishti                                                    Computer Architecture
Data Representation                  30                  Error Detecting codes

     PARITY GENERATOR AND PARITY CHECKER


     Parity Generator Circuit (even parity)

                  b6
                  b5                             beven
                  b4
                  b3
                  b2
                  b1

                  b0

    Parity Checker
                beven
                  b6
                  b5
                  b4
                  b3
                  b2
                  b1                          Even Parity
                                              error indicator
                  b0
Rashid Farid Chishti                                     Computer Architecture

Contenu connexe

Tendances

data representation
 data representation data representation
data representationHaroon_007
 
Logic Design 2009
Logic Design 2009Logic Design 2009
Logic Design 2009lionking
 
Number System & Data Representation
Number System & Data RepresentationNumber System & Data Representation
Number System & Data RepresentationPhillip Glenn Libay
 
Data representation
 Data representation Data representation
Data representationAshraf Miraz
 
Lec 02 data representation part 1
Lec 02 data representation part 1Lec 02 data representation part 1
Lec 02 data representation part 1Abdul Khan
 
Chapter 07 Digital Alrithmetic and Arithmetic Circuits
Chapter 07 Digital Alrithmetic and Arithmetic CircuitsChapter 07 Digital Alrithmetic and Arithmetic Circuits
Chapter 07 Digital Alrithmetic and Arithmetic CircuitsSSE_AndyLi
 
Ch1.number systems
Ch1.number systemsCh1.number systems
Ch1.number systemsteba
 
Lec 02 data representation part 2
Lec 02 data representation part 2Lec 02 data representation part 2
Lec 02 data representation part 2Abdul Khan
 
Number system and codes
Number system and codesNumber system and codes
Number system and codesAbhiraj Bohra
 
FYBSC IT Digital Electronics Unit I Chapter I Number System and Binary Arithm...
FYBSC IT Digital Electronics Unit I Chapter I Number System and Binary Arithm...FYBSC IT Digital Electronics Unit I Chapter I Number System and Binary Arithm...
FYBSC IT Digital Electronics Unit I Chapter I Number System and Binary Arithm...Arti Parab Academics
 

Tendances (20)

Okkkkk
OkkkkkOkkkkk
Okkkkk
 
data representation
 data representation data representation
data representation
 
Logic Design 2009
Logic Design 2009Logic Design 2009
Logic Design 2009
 
Number System & Data Representation
Number System & Data RepresentationNumber System & Data Representation
Number System & Data Representation
 
Number Systems
Number  SystemsNumber  Systems
Number Systems
 
Data representation
 Data representation Data representation
Data representation
 
Number system
Number systemNumber system
Number system
 
Lec 02 data representation part 1
Lec 02 data representation part 1Lec 02 data representation part 1
Lec 02 data representation part 1
 
Chapter 07 Digital Alrithmetic and Arithmetic Circuits
Chapter 07 Digital Alrithmetic and Arithmetic CircuitsChapter 07 Digital Alrithmetic and Arithmetic Circuits
Chapter 07 Digital Alrithmetic and Arithmetic Circuits
 
Lecture 2
Lecture 2Lecture 2
Lecture 2
 
Data representation
Data representationData representation
Data representation
 
Number system
Number systemNumber system
Number system
 
Ch1.number systems
Ch1.number systemsCh1.number systems
Ch1.number systems
 
Lec 02 data representation part 2
Lec 02 data representation part 2Lec 02 data representation part 2
Lec 02 data representation part 2
 
Data representation
Data representationData representation
Data representation
 
Number system and codes
Number system and codesNumber system and codes
Number system and codes
 
Data representation in computers
Data representation in computersData representation in computers
Data representation in computers
 
FYBSC IT Digital Electronics Unit I Chapter I Number System and Binary Arithm...
FYBSC IT Digital Electronics Unit I Chapter I Number System and Binary Arithm...FYBSC IT Digital Electronics Unit I Chapter I Number System and Binary Arithm...
FYBSC IT Digital Electronics Unit I Chapter I Number System and Binary Arithm...
 
Cit 1101 lec 02
Cit 1101 lec 02Cit 1101 lec 02
Cit 1101 lec 02
 
Data Representation
Data RepresentationData Representation
Data Representation
 

En vedette

Data representation and boolean algebra
Data representation and boolean algebraData representation and boolean algebra
Data representation and boolean algebragourav kottawar
 
Basic Computer Organization and Design
Basic Computer Organization and DesignBasic Computer Organization and Design
Basic Computer Organization and DesignKamal Acharya
 
Basic Computer Organization and Design
Basic Computer Organization and DesignBasic Computer Organization and Design
Basic Computer Organization and Designmekind
 
Kiến trúc máy tính và hợp ngữ bài 06
Kiến trúc máy tính và hợp ngữ bài 06Kiến trúc máy tính và hợp ngữ bài 06
Kiến trúc máy tính và hợp ngữ bài 06Nhóc Nhóc
 
Quick tutorial on IEEE 754 FLOATING POINT representation
Quick tutorial on IEEE 754 FLOATING POINT representationQuick tutorial on IEEE 754 FLOATING POINT representation
Quick tutorial on IEEE 754 FLOATING POINT representationRitu Ranjan Shrivastwa
 
Fixed point and floating-point numbers
Fixed point and  floating-point numbersFixed point and  floating-point numbers
Fixed point and floating-point numbersMOHAN MOHAN
 
Arithmetic micro operations
Arithmetic micro operationsArithmetic micro operations
Arithmetic micro operationsNitesh Bichwani
 
Interprocess communication
Interprocess communicationInterprocess communication
Interprocess communicationSushil Singh
 
Logical and shift micro operations
Logical and shift micro operationsLogical and shift micro operations
Logical and shift micro operationsSanjeev Patel
 
Encoders and Decoders
Encoders and DecodersEncoders and Decoders
Encoders and DecodersNic JM
 
Encoders and decoders
Encoders and decodersEncoders and decoders
Encoders and decodersGaditek
 
Register transfer and micro-operation
Register transfer and micro-operationRegister transfer and micro-operation
Register transfer and micro-operationNikhil Pandit
 
Register transfer and micro operation
Register transfer and micro operationRegister transfer and micro operation
Register transfer and micro operationKamal Acharya
 
Computer Architecture – An Introduction
Computer Architecture – An IntroductionComputer Architecture – An Introduction
Computer Architecture – An IntroductionDilum Bandara
 
Lec11 Intro to Computer Engineering by Hsien-Hsin Sean Lee Georgia Tech -- De...
Lec11 Intro to Computer Engineering by Hsien-Hsin Sean Lee Georgia Tech -- De...Lec11 Intro to Computer Engineering by Hsien-Hsin Sean Lee Georgia Tech -- De...
Lec11 Intro to Computer Engineering by Hsien-Hsin Sean Lee Georgia Tech -- De...Hsien-Hsin Sean Lee, Ph.D.
 
Bcd to excess 3 code converter
Bcd to excess 3 code converterBcd to excess 3 code converter
Bcd to excess 3 code converterUshaswini Chowdary
 
Microprogram Control
Microprogram Control Microprogram Control
Microprogram Control Anuj Modi
 

En vedette (20)

Data representation and boolean algebra
Data representation and boolean algebraData representation and boolean algebra
Data representation and boolean algebra
 
Basic Computer Organization and Design
Basic Computer Organization and DesignBasic Computer Organization and Design
Basic Computer Organization and Design
 
Basic Computer Organization and Design
Basic Computer Organization and DesignBasic Computer Organization and Design
Basic Computer Organization and Design
 
Ch3
Ch3Ch3
Ch3
 
Encoder
EncoderEncoder
Encoder
 
Kiến trúc máy tính và hợp ngữ bài 06
Kiến trúc máy tính và hợp ngữ bài 06Kiến trúc máy tính và hợp ngữ bài 06
Kiến trúc máy tính và hợp ngữ bài 06
 
Quick tutorial on IEEE 754 FLOATING POINT representation
Quick tutorial on IEEE 754 FLOATING POINT representationQuick tutorial on IEEE 754 FLOATING POINT representation
Quick tutorial on IEEE 754 FLOATING POINT representation
 
Fixed point and floating-point numbers
Fixed point and  floating-point numbersFixed point and  floating-point numbers
Fixed point and floating-point numbers
 
Arithmetic micro operations
Arithmetic micro operationsArithmetic micro operations
Arithmetic micro operations
 
Interprocess communication
Interprocess communicationInterprocess communication
Interprocess communication
 
Logical and shift micro operations
Logical and shift micro operationsLogical and shift micro operations
Logical and shift micro operations
 
Encoders and Decoders
Encoders and DecodersEncoders and Decoders
Encoders and Decoders
 
Encoders and decoders
Encoders and decodersEncoders and decoders
Encoders and decoders
 
Register transfer and micro-operation
Register transfer and micro-operationRegister transfer and micro-operation
Register transfer and micro-operation
 
Register transfer and micro operation
Register transfer and micro operationRegister transfer and micro operation
Register transfer and micro operation
 
Computer Architecture – An Introduction
Computer Architecture – An IntroductionComputer Architecture – An Introduction
Computer Architecture – An Introduction
 
Encoder and decoder
Encoder and decoderEncoder and decoder
Encoder and decoder
 
Lec11 Intro to Computer Engineering by Hsien-Hsin Sean Lee Georgia Tech -- De...
Lec11 Intro to Computer Engineering by Hsien-Hsin Sean Lee Georgia Tech -- De...Lec11 Intro to Computer Engineering by Hsien-Hsin Sean Lee Georgia Tech -- De...
Lec11 Intro to Computer Engineering by Hsien-Hsin Sean Lee Georgia Tech -- De...
 
Bcd to excess 3 code converter
Bcd to excess 3 code converterBcd to excess 3 code converter
Bcd to excess 3 code converter
 
Microprogram Control
Microprogram Control Microprogram Control
Microprogram Control
 

Similaire à Ch3

Chapter 1 Digital Systems and Binary Numbers.ppt
Chapter 1 Digital Systems and Binary Numbers.pptChapter 1 Digital Systems and Binary Numbers.ppt
Chapter 1 Digital Systems and Binary Numbers.pptAparnaDas827261
 
Chapter 1 digital design.pptx
Chapter 1 digital design.pptxChapter 1 digital design.pptx
Chapter 1 digital design.pptxAliaaTarek5
 
Computer organiztion2
Computer organiztion2Computer organiztion2
Computer organiztion2Umang Gupta
 
3.Floating Point arith.ppt
3.Floating Point arith.ppt3.Floating Point arith.ppt
3.Floating Point arith.pptRavikumarR77
 
Unit 1 PDF.pptx
Unit 1 PDF.pptxUnit 1 PDF.pptx
Unit 1 PDF.pptxChandraV13
 
f31-book-arith-pres-pt1.ppt
f31-book-arith-pres-pt1.pptf31-book-arith-pres-pt1.ppt
f31-book-arith-pres-pt1.pptJawwadRafiq1
 
Digital logic degin, Number system
Digital logic degin, Number systemDigital logic degin, Number system
Digital logic degin, Number systemAshish Kumar Thakur
 
computer architecture
computer architecture computer architecture
computer architecture Dr.Umadevi V
 
Accelerating analytics on the Sensor and IoT Data.
Accelerating analytics on the Sensor and IoT Data. Accelerating analytics on the Sensor and IoT Data.
Accelerating analytics on the Sensor and IoT Data. Keshav Murthy
 
Unit-6 Computer Arithmetic.ppsx
Unit-6 Computer Arithmetic.ppsxUnit-6 Computer Arithmetic.ppsx
Unit-6 Computer Arithmetic.ppsxtest227270
 

Similaire à Ch3 (20)

DATA REPRESENTATION
DATA  REPRESENTATIONDATA  REPRESENTATION
DATA REPRESENTATION
 
Chapter 1 Digital Systems and Binary Numbers.ppt
Chapter 1 Digital Systems and Binary Numbers.pptChapter 1 Digital Systems and Binary Numbers.ppt
Chapter 1 Digital Systems and Binary Numbers.ppt
 
Chapter 1 digital design.pptx
Chapter 1 digital design.pptxChapter 1 digital design.pptx
Chapter 1 digital design.pptx
 
W 9 numbering system
W 9 numbering systemW 9 numbering system
W 9 numbering system
 
W 9 numbering system
W 9 numbering systemW 9 numbering system
W 9 numbering system
 
Computer organiztion2
Computer organiztion2Computer organiztion2
Computer organiztion2
 
Numbering Systems
Numbering SystemsNumbering Systems
Numbering Systems
 
3.Floating Point arith.ppt
3.Floating Point arith.ppt3.Floating Point arith.ppt
3.Floating Point arith.ppt
 
COMPUTER AWARENESS.pptx
COMPUTER AWARENESS.pptxCOMPUTER AWARENESS.pptx
COMPUTER AWARENESS.pptx
 
Unit 1 PDF.pptx
Unit 1 PDF.pptxUnit 1 PDF.pptx
Unit 1 PDF.pptx
 
Number system
Number systemNumber system
Number system
 
Number Codes and Registers
Number Codes and RegistersNumber Codes and Registers
Number Codes and Registers
 
f31-book-arith-pres-pt1.ppt
f31-book-arith-pres-pt1.pptf31-book-arith-pres-pt1.ppt
f31-book-arith-pres-pt1.ppt
 
computer Arithmetic.ppt
computer Arithmetic.pptcomputer Arithmetic.ppt
computer Arithmetic.ppt
 
Digital logic design part1
Digital logic design part1Digital logic design part1
Digital logic design part1
 
Digital logic degin, Number system
Digital logic degin, Number systemDigital logic degin, Number system
Digital logic degin, Number system
 
computer architecture
computer architecture computer architecture
computer architecture
 
Accelerating analytics on the Sensor and IoT Data.
Accelerating analytics on the Sensor and IoT Data. Accelerating analytics on the Sensor and IoT Data.
Accelerating analytics on the Sensor and IoT Data.
 
Unit-6 Computer Arithmetic.ppsx
Unit-6 Computer Arithmetic.ppsxUnit-6 Computer Arithmetic.ppsx
Unit-6 Computer Arithmetic.ppsx
 
1. basic theories of information
1. basic theories of information1. basic theories of information
1. basic theories of information
 

Plus de Teksify

HCTE C&C08(TDM)
HCTE C&C08(TDM) HCTE C&C08(TDM)
HCTE C&C08(TDM) Teksify
 
Data Structure Lecture 7
Data Structure Lecture 7Data Structure Lecture 7
Data Structure Lecture 7Teksify
 
Data Structure Lecture 6
Data Structure Lecture 6Data Structure Lecture 6
Data Structure Lecture 6Teksify
 
Data Structure Lecture 5
Data Structure Lecture 5Data Structure Lecture 5
Data Structure Lecture 5Teksify
 
Data Structure Lecture 4
Data Structure Lecture 4Data Structure Lecture 4
Data Structure Lecture 4Teksify
 
Data Structure Lecture 3
Data Structure Lecture 3Data Structure Lecture 3
Data Structure Lecture 3Teksify
 
Data Structure Lecture 2
Data Structure Lecture 2Data Structure Lecture 2
Data Structure Lecture 2Teksify
 
data Structure Lecture 1
data Structure Lecture 1data Structure Lecture 1
data Structure Lecture 1Teksify
 
Variable power supply
Variable power supplyVariable power supply
Variable power supplyTeksify
 
Use of rib tool in pro e
Use of rib tool in pro eUse of rib tool in pro e
Use of rib tool in pro eTeksify
 
Make lens of mobile by pro e
Make lens of mobile by pro eMake lens of mobile by pro e
Make lens of mobile by pro eTeksify
 

Plus de Teksify (12)

HCTE C&C08(TDM)
HCTE C&C08(TDM) HCTE C&C08(TDM)
HCTE C&C08(TDM)
 
Data Structure Lecture 7
Data Structure Lecture 7Data Structure Lecture 7
Data Structure Lecture 7
 
Data Structure Lecture 6
Data Structure Lecture 6Data Structure Lecture 6
Data Structure Lecture 6
 
Data Structure Lecture 5
Data Structure Lecture 5Data Structure Lecture 5
Data Structure Lecture 5
 
Data Structure Lecture 4
Data Structure Lecture 4Data Structure Lecture 4
Data Structure Lecture 4
 
Data Structure Lecture 3
Data Structure Lecture 3Data Structure Lecture 3
Data Structure Lecture 3
 
Data Structure Lecture 2
Data Structure Lecture 2Data Structure Lecture 2
Data Structure Lecture 2
 
data Structure Lecture 1
data Structure Lecture 1data Structure Lecture 1
data Structure Lecture 1
 
Ch1 2
Ch1 2Ch1 2
Ch1 2
 
Variable power supply
Variable power supplyVariable power supply
Variable power supply
 
Use of rib tool in pro e
Use of rib tool in pro eUse of rib tool in pro e
Use of rib tool in pro e
 
Make lens of mobile by pro e
Make lens of mobile by pro eMake lens of mobile by pro e
Make lens of mobile by pro e
 

Dernier

Unit-IV- Pharma. Marketing Channels.pptx
Unit-IV- Pharma. Marketing Channels.pptxUnit-IV- Pharma. Marketing Channels.pptx
Unit-IV- Pharma. Marketing Channels.pptxVishalSingh1417
 
Grant Readiness 101 TechSoup and Remy Consulting
Grant Readiness 101 TechSoup and Remy ConsultingGrant Readiness 101 TechSoup and Remy Consulting
Grant Readiness 101 TechSoup and Remy ConsultingTechSoup
 
Seal of Good Local Governance (SGLG) 2024Final.pptx
Seal of Good Local Governance (SGLG) 2024Final.pptxSeal of Good Local Governance (SGLG) 2024Final.pptx
Seal of Good Local Governance (SGLG) 2024Final.pptxnegromaestrong
 
ICT Role in 21st Century Education & its Challenges.pptx
ICT Role in 21st Century Education & its Challenges.pptxICT Role in 21st Century Education & its Challenges.pptx
ICT Role in 21st Century Education & its Challenges.pptxAreebaZafar22
 
Class 11th Physics NEET formula sheet pdf
Class 11th Physics NEET formula sheet pdfClass 11th Physics NEET formula sheet pdf
Class 11th Physics NEET formula sheet pdfAyushMahapatra5
 
psychiatric nursing HISTORY COLLECTION .docx
psychiatric  nursing HISTORY  COLLECTION  .docxpsychiatric  nursing HISTORY  COLLECTION  .docx
psychiatric nursing HISTORY COLLECTION .docxPoojaSen20
 
1029 - Danh muc Sach Giao Khoa 10 . pdf
1029 -  Danh muc Sach Giao Khoa 10 . pdf1029 -  Danh muc Sach Giao Khoa 10 . pdf
1029 - Danh muc Sach Giao Khoa 10 . pdfQucHHunhnh
 
Explore beautiful and ugly buildings. Mathematics helps us create beautiful d...
Explore beautiful and ugly buildings. Mathematics helps us create beautiful d...Explore beautiful and ugly buildings. Mathematics helps us create beautiful d...
Explore beautiful and ugly buildings. Mathematics helps us create beautiful d...christianmathematics
 
An Overview of Mutual Funds Bcom Project.pdf
An Overview of Mutual Funds Bcom Project.pdfAn Overview of Mutual Funds Bcom Project.pdf
An Overview of Mutual Funds Bcom Project.pdfSanaAli374401
 
Holdier Curriculum Vitae (April 2024).pdf
Holdier Curriculum Vitae (April 2024).pdfHoldier Curriculum Vitae (April 2024).pdf
Holdier Curriculum Vitae (April 2024).pdfagholdier
 
SOCIAL AND HISTORICAL CONTEXT - LFTVD.pptx
SOCIAL AND HISTORICAL CONTEXT - LFTVD.pptxSOCIAL AND HISTORICAL CONTEXT - LFTVD.pptx
SOCIAL AND HISTORICAL CONTEXT - LFTVD.pptxiammrhaywood
 
Russian Escort Service in Delhi 11k Hotel Foreigner Russian Call Girls in Delhi
Russian Escort Service in Delhi 11k Hotel Foreigner Russian Call Girls in DelhiRussian Escort Service in Delhi 11k Hotel Foreigner Russian Call Girls in Delhi
Russian Escort Service in Delhi 11k Hotel Foreigner Russian Call Girls in Delhikauryashika82
 
microwave assisted reaction. General introduction
microwave assisted reaction. General introductionmicrowave assisted reaction. General introduction
microwave assisted reaction. General introductionMaksud Ahmed
 
fourth grading exam for kindergarten in writing
fourth grading exam for kindergarten in writingfourth grading exam for kindergarten in writing
fourth grading exam for kindergarten in writingTeacherCyreneCayanan
 
Basic Civil Engineering first year Notes- Chapter 4 Building.pptx
Basic Civil Engineering first year Notes- Chapter 4 Building.pptxBasic Civil Engineering first year Notes- Chapter 4 Building.pptx
Basic Civil Engineering first year Notes- Chapter 4 Building.pptxDenish Jangid
 
Unit-IV; Professional Sales Representative (PSR).pptx
Unit-IV; Professional Sales Representative (PSR).pptxUnit-IV; Professional Sales Representative (PSR).pptx
Unit-IV; Professional Sales Representative (PSR).pptxVishalSingh1417
 
PROCESS RECORDING FORMAT.docx
PROCESS      RECORDING        FORMAT.docxPROCESS      RECORDING        FORMAT.docx
PROCESS RECORDING FORMAT.docxPoojaSen20
 
Introduction to Nonprofit Accounting: The Basics
Introduction to Nonprofit Accounting: The BasicsIntroduction to Nonprofit Accounting: The Basics
Introduction to Nonprofit Accounting: The BasicsTechSoup
 
Measures of Central Tendency: Mean, Median and Mode
Measures of Central Tendency: Mean, Median and ModeMeasures of Central Tendency: Mean, Median and Mode
Measures of Central Tendency: Mean, Median and ModeThiyagu K
 

Dernier (20)

Unit-IV- Pharma. Marketing Channels.pptx
Unit-IV- Pharma. Marketing Channels.pptxUnit-IV- Pharma. Marketing Channels.pptx
Unit-IV- Pharma. Marketing Channels.pptx
 
Grant Readiness 101 TechSoup and Remy Consulting
Grant Readiness 101 TechSoup and Remy ConsultingGrant Readiness 101 TechSoup and Remy Consulting
Grant Readiness 101 TechSoup and Remy Consulting
 
Seal of Good Local Governance (SGLG) 2024Final.pptx
Seal of Good Local Governance (SGLG) 2024Final.pptxSeal of Good Local Governance (SGLG) 2024Final.pptx
Seal of Good Local Governance (SGLG) 2024Final.pptx
 
ICT Role in 21st Century Education & its Challenges.pptx
ICT Role in 21st Century Education & its Challenges.pptxICT Role in 21st Century Education & its Challenges.pptx
ICT Role in 21st Century Education & its Challenges.pptx
 
Class 11th Physics NEET formula sheet pdf
Class 11th Physics NEET formula sheet pdfClass 11th Physics NEET formula sheet pdf
Class 11th Physics NEET formula sheet pdf
 
psychiatric nursing HISTORY COLLECTION .docx
psychiatric  nursing HISTORY  COLLECTION  .docxpsychiatric  nursing HISTORY  COLLECTION  .docx
psychiatric nursing HISTORY COLLECTION .docx
 
1029 - Danh muc Sach Giao Khoa 10 . pdf
1029 -  Danh muc Sach Giao Khoa 10 . pdf1029 -  Danh muc Sach Giao Khoa 10 . pdf
1029 - Danh muc Sach Giao Khoa 10 . pdf
 
Explore beautiful and ugly buildings. Mathematics helps us create beautiful d...
Explore beautiful and ugly buildings. Mathematics helps us create beautiful d...Explore beautiful and ugly buildings. Mathematics helps us create beautiful d...
Explore beautiful and ugly buildings. Mathematics helps us create beautiful d...
 
An Overview of Mutual Funds Bcom Project.pdf
An Overview of Mutual Funds Bcom Project.pdfAn Overview of Mutual Funds Bcom Project.pdf
An Overview of Mutual Funds Bcom Project.pdf
 
Holdier Curriculum Vitae (April 2024).pdf
Holdier Curriculum Vitae (April 2024).pdfHoldier Curriculum Vitae (April 2024).pdf
Holdier Curriculum Vitae (April 2024).pdf
 
Mehran University Newsletter Vol-X, Issue-I, 2024
Mehran University Newsletter Vol-X, Issue-I, 2024Mehran University Newsletter Vol-X, Issue-I, 2024
Mehran University Newsletter Vol-X, Issue-I, 2024
 
SOCIAL AND HISTORICAL CONTEXT - LFTVD.pptx
SOCIAL AND HISTORICAL CONTEXT - LFTVD.pptxSOCIAL AND HISTORICAL CONTEXT - LFTVD.pptx
SOCIAL AND HISTORICAL CONTEXT - LFTVD.pptx
 
Russian Escort Service in Delhi 11k Hotel Foreigner Russian Call Girls in Delhi
Russian Escort Service in Delhi 11k Hotel Foreigner Russian Call Girls in DelhiRussian Escort Service in Delhi 11k Hotel Foreigner Russian Call Girls in Delhi
Russian Escort Service in Delhi 11k Hotel Foreigner Russian Call Girls in Delhi
 
microwave assisted reaction. General introduction
microwave assisted reaction. General introductionmicrowave assisted reaction. General introduction
microwave assisted reaction. General introduction
 
fourth grading exam for kindergarten in writing
fourth grading exam for kindergarten in writingfourth grading exam for kindergarten in writing
fourth grading exam for kindergarten in writing
 
Basic Civil Engineering first year Notes- Chapter 4 Building.pptx
Basic Civil Engineering first year Notes- Chapter 4 Building.pptxBasic Civil Engineering first year Notes- Chapter 4 Building.pptx
Basic Civil Engineering first year Notes- Chapter 4 Building.pptx
 
Unit-IV; Professional Sales Representative (PSR).pptx
Unit-IV; Professional Sales Representative (PSR).pptxUnit-IV; Professional Sales Representative (PSR).pptx
Unit-IV; Professional Sales Representative (PSR).pptx
 
PROCESS RECORDING FORMAT.docx
PROCESS      RECORDING        FORMAT.docxPROCESS      RECORDING        FORMAT.docx
PROCESS RECORDING FORMAT.docx
 
Introduction to Nonprofit Accounting: The Basics
Introduction to Nonprofit Accounting: The BasicsIntroduction to Nonprofit Accounting: The Basics
Introduction to Nonprofit Accounting: The Basics
 
Measures of Central Tendency: Mean, Median and Mode
Measures of Central Tendency: Mean, Median and ModeMeasures of Central Tendency: Mean, Median and Mode
Measures of Central Tendency: Mean, Median and Mode
 

Ch3

  • 1. Data Representation 1 DATA REPRESENTATION Data Types Complements Fixed Point Representations Floating Point Representations Other Binary Codes Error Detection Codes Rashid Farid Chishti Computer Architecture
  • 2. Data Representation 2 Data Types DATA REPRESENTATION Information that a Computer is dealing with * Data - Numeric Data Numbers( Integer, real) - Non-numeric Data Letters, Symbols * Relationship between data elements - Data Structures Linear Lists, Trees, Rings, etc * Program(Instruction) Rashid Farid Chishti Computer Architecture
  • 3. Data Representation 3 Data Types NUMERIC DATA REPRESENTATION Data Numeric data - numbers(integer, real) Non-numeric data - symbols, letters Number System Nonpositional number system - Roman number system Positional number system - Each digit position has a value called a weight associated with it - Decimal, Octal, Hexadecimal, Binary Base (or radix) R number - Uses R distinct symbols for each digit - Example AR = an-1 an-2 ... a1 a0 .a-1…a-m n −1 Radix point(.) separates the integer - V(AR ) = ∑a R i =− m i i portion and the fractional portion R = 10 Decimal number system, R = 2 Binary R = 8 Octal, R = 16 Hexadecimal Rashid Farid Chishti Computer Architecture
  • 4. Data Representation 4 Data Types WHY POSITIONAL NUMBER SYSTEM IN DIGITAL COMPUTERS ? Major Consideration is the COST and TIME - Cost of building hardware Arithmetic and Logic Unit, CPU, Communications - Time to processing Arithmetic - Addition of Numbers - Table for Addition Binary Addition Table 0 1 * Non-positional Number System 0 0 1 - Table for addition is infinite 1 1 10 --> Impossible to build, very expensive even Decimal Addition Table if it can be built 0 1 2 3 4 5 6 7 8 9 0 0 1 2 3 4 5 6 7 8 9 1 1 2 3 4 5 6 7 8 9 10 * Positional Number System 2 2 3 4 5 6 7 8 9 1011 3 3 4 5 6 7 8 9 101112 - Table for Addition is finite 4 4 5 6 7 8 9 10111213 5 5 6 7 8 9 1011121314 --> Physically realizable, but cost wise 6 6 7 8 9 101112131415 the smaller the table size, the less 7 7 8 9 10111213141516 8 8 9 1011121314151617 expensive --> Binary is favorable to Decimal 9 9 101112131415161718 Rashid Farid Chishti Computer Architecture
  • 5. Data Representation 5 Data Types REPRESENTATION OF NUMBERS - POSITIONAL NUMBERS Decimal Binary Octal Hexadecimal 00 0000 00 0 01 0001 01 1 02 0010 02 2 03 0011 03 3 04 0100 04 4 05 0101 05 5 06 0110 06 6 07 0111 07 7 08 1000 10 8 09 1001 11 9 10 1010 12 A 11 1011 13 B 12 1100 14 C 13 1101 15 D 14 1110 16 E 15 1111 17 F Binary, octal, and hexadecimal conversion 1 2 7 5 4 3 Octal 1 0 1 0 1 1 1 1 0 1 1 0 0 0 1 1 Binary A F 6 3 Hexa Rashid Farid Chishti Computer Architecture
  • 6. Data Representation 6 Data Types CONVERSION OF BASES Base R to Decimal Conversion A = an-1 an-2 an-3 … a0 . a-1 … a-m V(A) = Σ ak Rk (736.4)8 = 7 x 82 + 3 x 81 + 6 x 80 + 4 x 8-1 = 7 x 64 + 3 x 8 + 6 x 1 + 4/8 = (478.5)10 (110110)2 = ... = (54)10 (110.111)2 = ... = (6.785)10 (F3)16 = ... = (243)10 (0.325)6 = ... = (0.578703703 .................)10 Decimal to Base R number - Separate the number into its integer and fraction parts and convert each part separately. - Convert integer part into the base R number → successive divisions by R and accumulation of the remainders. - Convert fraction part into the base R number → successive multiplications by R and accumulation of integer digits Rashid Farid Chishti Computer Architecture
  • 7. Data Representation 7 Data Types EXAMPLE Fraction = 0.6875 Convert 41.687510 to base 2. 0.6875 Integer = 41 x 2 41 1.3750 20 1 x 2 10 0 0.7500 5 0 x 2 2 1 1.5000 1 0 x 2 0 1 1.0000 (41)10 = (101001)2 (0.6875)10 = (0.1011)2 (41.6875)10 = (101001.1011)2 Exercise Convert (63)10 to base 5: (223)5 Convert (1863)10 to base 8: (3507)8 Convert (0.63671875)10 to hexadecimal: (0.A3)16 Rashid Farid Chishti Computer Architecture
  • 8. Data Representation 8 Complements COMPLEMENT OF NUMBERS Two types of complements for base R number system: - R's complement and (R-1)'s complement The (R-1)'s Complement Subtract each digit of a number from (R-1) Example - 9's complement of 83510 is 16410 - 1's complement of 10102 is 01012(bit by bit complement operation) The R's Complement Add 1 to the low-order digit of its (R-1)'s complement Example - 10's complement of 83510 is 16410 + 1 = 16510 - 2's complement of 10102 is 01012 + 1 = 01102 Rashid Farid Chishti Computer Architecture
  • 9. Data Representation 9 Fixed Point Representations FIXED POINT NUMBERS Numbers: Fixed Point Numbers and Floating Point Numbers Binary Fixed-Point Representation X = xnxn-1xn-2 ... x1x0. x-1x-2 ... x-m Sign Bit(xn): 0 for positive - 1 for negative Remaining Bits(xn-1xn-2 ... x1x0. x-1x-2 ... x-m) Rashid Farid Chishti Computer Architecture
  • 10. Data Representation 10 SIGNED NUMBERS Need to be able to represent both positive and negative numbers - Following 3 representations Signed magnitude representation Signed 1's complement representation Signed 2's complement representation Example: Represent +9 and -9 in 7 bit-binary number Only one way to represent +9 ==> 0 001001 Three different ways to represent -9: In signed-magnitude: 1 001001 In signed-1's complement: 1 110110 In signed-2's complement: 1 110111 In general, in computers, fixed point numbers are represented either integer part only or fractional part only. Rashid Farid Chishti Computer Architecture
  • 11. Data Representation 11 Fixed Point Representations CHARACTERISTICS OF 3 DIFFERENT REPRESENTATIONS Complement Signed magnitude: Complement only the sign bit Signed 1's complement: Complement all the bits including sign bit Signed 2's complement: Take the 2's complement of the number, including its sign bit. Maximum and Minimum Representable Numbers and Representation of Zero X = xn xn-1 ... x0 . x-1 ... x-m Signed Magnitude Max: 2n - 2-m 011 ... 11.11 ... 1 Min: -(2n - 2-m) 111 ... 11.11 ... 1 Zero: +0 000 ... 00.00 ... 0 -0 100 ... 00.00 ... 0 Signed 1’s Complement Signed 2’s Complement Max: 2n - 2-m 011 ... 11.11 ... 1 Max: 2n - 2-m 011 ... 11.11 ... 1 Min: -(2n - 2-m) 100 ... 00.00 ... 0 Min: -2n 100 ... 00.00 ... 0 Zero: +0 000 ... 00.00 ... 0 Zero: 0 000 ... 00.00 ... 0 -0 111 ... 11.11 ... 1 Rashid Farid Chishti Computer Architecture
  • 12. Data Representation 12 2’s COMPLEMENT REPRESENTATION WEIGHTS • Signed 2’s complement representation follows a “weight” scheme similar to that of unsigned numbers – Sign bit has negative weight – Other bits have regular weights X = xn xn-1 ... x0 n-1  V(X) = - xn × 2n + Σi=0 xi × 2i Rashid Farid Chishti Computer Architecture
  • 13. Data Representation 13 Fixed Point Representations ARITHMETIC ADDITION: SIGNED MAGNITUDE [1] Compare their signs [2] If two signs are the same , ADD the two magnitudes - Look out for an overflow [3] If not the same , compare the relative magnitudes of the numbers and then SUBTRACT the smaller from the larger --> need a subtractor to add [4] Determine the sign of the result 6+9 -6 + 9 6 0110 9 1001 +) 9 1001 -)6 0110 15 1111 -> 01111 3 0011 -> 00011 6 + (- 9) -6 + (-9) 9 1001 6 0110 -) 6 0110 +) 9 1001 - 3 0011 -> 10011 -15 1111 -> 11111 Overflow 9 + 9 or (-9) + (-9) 9 1001 +) 9 1001 overflow (1)0010 Rashid Farid Chishti Computer Architecture
  • 14. Data Representation 14 Fixed Point Representations ARITHMETIC ADDITION: SIGNED 2’s COMPLEMENT Add the two numbers, including their sign bit, and discard any carry out of leftmost (sign) bit - Look out for an overflow Example 6 0 0110 -6 1 1010 +) 9 0 1001 +) 9 0 1001 15 0 1111 3 0 0011 6 0 0110 -9 1 0111 +) -9 1 0111 +) -9 1 0111 -3 1 1101 -18 (1)0 1110 x’n-1y’n-1sn-1 (cn-1 ⊕ cn) 9 0 1001 overflow +) 9 0 1001 2 operands have the same sign 18 1 0010 and the result sign changes xn-1yn s’n-1 xn-1yn-1s’n-1 + x’n-1y’n-1sn-1 = cn-1⊕ cn (cn-1 ⊕ cn) Rashid Farid Chishti Computer Architecture
  • 15. Data Representation 15 Fixed Point Representations ARITHMETIC ADDITION: SIGNED 1’s COMPLEMENT Add the two numbers, including their sign bits. - If there is a carry out of the most significant (sign) bit, the result is incremented by 1 and the carry is discarded. Example end-around carry 6 0 0110 -6 1 1001 +) -9 1 0110 +) 9 0 1001 -3 1 1100 (1) 0(1)0010 +) 1 3 0 0011 not overflow (cn-1 ⊕ cn ) = 0 -9 1 0110 9 0 1001 +) -9 1 0110 +) 9 0 1001 (1)0 1100 1 (1)0010 +) 1 0 1101 overflow (cn-1 ⊕ cn) Rashid Farid Chishti Computer Architecture
  • 16. Data Representation 16 Fixed Point Representations COMPARISON OF REPRESENTATIONS * Easiness of negative conversion S + M > 1’s Complement > 2’s Complement * Hardware - S+M: Needs an adder and a subtractor for Addition - 1’s and 2’s Complement: Need only an adder * Speed of Arithmetic 2’s Complement > 1’s Complement(end-around C) * Recognition of Zero 2’s Complement is fast Rashid Farid Chishti Computer Architecture
  • 17. Data Representation 17 Fixed Point Representations ARITHMETIC SUBTRACTION Arithmetic Subtraction in 2’s complement Take the complement of the subtrahend (including the sign bit) and add it to the minuend including the sign bits. (± A)-(-B) =(± A)+ B (± A)- B=(± A)+( -B) Rashid Farid Chishti Computer Architecture
  • 18. Data Representation 18 Floating Point Representation FLOATING POINT NUMBER REPRESENTATION * The location of the fractional point is not fixed to a certain location * The range of the representable numbers is wide F = EM mn ekek-1 ... e0 mn-1mn-2 … m0 . m-1 … m-m sign exponent mantissa - Mantissa Signed fixed point number, either an integer or a fractional number - Exponent Designates the position of the radix point Decimal Value V(F) = V(M) * RV(E) M: Mantissa E: Exponent R: Radix Rashid Farid Chishti Computer Architecture
  • 19. Data Representation 19 Floating Point Representation FLOATING POINT NUMBERS Example sign sign 0 .1234567 0 04 mantissa exponent ==> +.1234567 x 10+04 Note: In Floating Point Number representation, only Mantissa(M) and Exponent(E) are explicitly represented. The Radix(R) and the position of the Radix Point are implied. Example A binary number +1001.11 in 16-bit floating point number representation (6-bit exponent and 10-bit fractional mantissa) 0 0 00100 100111000 Sign Exponent Mantissa or 0 0 00101 010011100 Rashid Farid Chishti Computer Architecture
  • 20. Data Representation 20 Floating Point Representation CHARACTERISTICS OF FLOATING POINT NUMBER REPRESENTATIONS Normal Form - There are many different floating point number representations of the same number → Need for a unified representation in a given computer - the most significant position of the mantissa contains a non-zero digit Representation of Zero - Zero Mantissa = 0 - Real Zero Mantissa = 0 Exponent = smallest representable number which is represented as 00 ... 0 ← Easily identified by the hardware Rashid Farid Chishti Computer Architecture
  • 21. Data Representation 21 INTERNAL REPRESENTATION AND EXTERNAL REPRESENTATION Another Computer External Representation External Representation Internal Representation Human CPU Memory External Representation Device Rashid Farid Chishti Computer Architecture
  • 22. Data Representation 22 External Representations EXTERNAL REPRESENTATION Numbers Most of numbers stored in the computer are eventually changed by some kinds of calculations → Internal Representation for calculation efficiency → Final results need to be converted to as External Representation for presentability Alphabets, Symbols, and some Numbers Elements of these information do not change in the course of processing → No needs for Internal Representation since they are not used for calculations → External Representation for processing and presentability Decimal BCD Code 0 0000 Example 1 0001 Decimal Number: 4-bit Binary Code 2 0010 BCD(Binary Coded Decimal) 3 0011 4 0100 5 0101 6 0110 7 0111 8 1000 9 1001 Rashid Farid Chishti Computer Architecture
  • 23. Data Representation 23 External Representations OTHER DECIMAL CODES Decimal BCD(8421) 2421 84-2-1 Excess-3 0 0000 0000 0000 0011 1 0001 0001 0111 0100 2 0010 0010 0110 0101 3 0011 0011 0101 0110 4 0100 0100 0100 0111 5 0101 1011 1011 1000 6 0110 1100 1010 1001 7 0111 1101 1001 1010 Note: 8,4,2,-2,1,-1 in this table is the weight associated with each bit position. 8 1000 1110 1000 1011 9 1001 1111 1111 1100 d3 d2 d1 d0: symbol in the codes BCD: d3 x 8 + d2 x 4 + d1 x 2 + d0 x 1 ⇒ 8421 code. 2421: d3 x 2 + d2 x 4 + d1 x 2 + d0 x 1 84-2-1: d3 x 8 + d2 x 4 + d1 x (-2) + d0 x (-1) Excess-3: BCD + 3 BCD: It is difficult to obtain the 9's complement. However, it is easily obtained with the other codes listed above. → Self-complementing codes Rashid Farid Chishti Computer Architecture
  • 24. Data Representation 24 Other Binary codes GRAY CODE * Characterized by having their representations of the binary integers differ in only one digit between consecutive integers * Useful in some applications Decimal Gray Binary number g3 g2 g1 g0 b3 b2 b1 b0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 1 2 0 0 1 1 0 0 1 0 3 0 0 1 0 0 0 1 1 4 0 1 1 0 0 1 0 0 4-bit Gray codes 5 0 1 1 1 0 1 0 1 6 0 1 0 1 0 1 1 0 7 0 1 0 0 0 1 1 1 8 1 1 0 0 1 0 0 0 9 1 1 0 1 1 0 0 1 10 1 1 1 1 1 0 1 0 11 1 1 1 0 1 0 1 1 12 1 0 1 0 1 1 0 0 13 1 0 1 1 1 1 0 1 14 1 0 0 1 1 1 1 0 15 1 0 0 0 1 1 1 1 Rashid Farid Chishti Computer Architecture
  • 25. Data Representation 25 Other Binary codes GRAY CODE - ANALYSIS Letting gngn-1 ... g1 g0 be the (n+1)-bit Gray code for the binary number bnbn-1 ... b1b0 gi = bi ⊕ bi+1 , 0 ≤ i ≤ n-1 g n = bn Reflection of Gray codes and ε 0 0 0 0 00 0 000 bn-i = gn ⊕ gn-1 ⊕ . . . ⊕ gn-i 1 0 1 0 01 0 001 b n = gn 1 1 0 11 0 011 1 0 0 10 0 010 1 10 0 110 1 11 0 111 1 01 0 101 Note: 1 00 0 100 1 100 The Gray code has a reflection property 1 101 1 111 - easy to construct a table without calculation, 1 010 - for any n: reflect case n-1 about a 1 011 mirror at its bottom and prefix 0 and 1 1 001 1 101 to top and bottom halves, respectively 1 000 Rashid Farid Chishti Computer Architecture
  • 26. Data Representation 26 Other Binary codes CHARACTER REPRESENTATION ASCII ASCII (American Standard Code for Information Interchange) Code MSB (3 bits) 0 1 2 3 4 5 6 7 LSB 0 NUL DLE SP 0 @ P ‘ P (4 bits) 1 SOH DC1 ! 1 A Q a q 2 STX DC2 “ 2 B R b r 3 ETX DC3 # 3 C S c s 4 EOT DC4 $ 4 D T d t 5 ENQ NAK % 5 E U e u 6 ACK SYN & 6 F V f v 7 BEL ETB ‘ 7 G W g w 8 BS CAN ( 8 H X h x 9 HT EM ) 9 I Y I y A LF SUB * : J Z j z B VT ESC + ; K [ k { C FF FS , < L l | D CR GS - = M ] m } E SO RS . > N m n ~ F SI US / ? O n o DEL Rashid Farid Chishti Computer Architecture
  • 27. Data Representation 27 Other Binary codes CONTROL CHARACTER REPRESENTAION (ACSII) NUL Null DC1 Device Control 1 SOH Start of Heading (CC) DC2 Device Control 2 STX Start of Text (CC) DC3 Device Control 3 ETX End of Text (CC) DC4 Device Control 4 EOT End of Transmission (CC) NAK Negative Acknowledge (CC) ENQ Enquiry (CC) SYN Synchronous Idle (CC) ACK Acknowledge (CC) ETB End of Transmission Block (CC) BEL Bell CAN Cancel BS Backspace (FE) EM End of Medium HT Horizontal Tab. (FE) SUB Substitute LF Line Feed (FE) ESC Escape VT Vertical Tab. (FE) FS File Separator (IS) FF Form Feed (FE) GS Group Separator (IS) CR Carriage Return (FE) RS Record Separator (IS) SO Shift Out US Unit Separator (IS) SI Shift In DEL Delete DLE Data Link Escape (CC) (CC) Communication Control (FE) Format Effector (IS) Information Separator Rashid Farid Chishti Computer Architecture
  • 28. Data Representation 28 Error Detecting codes ERROR DETECTING CODES Parity System - Simplest method for error detection - One parity bit attached to the information - Even Parity and Odd Parity Even Parity - One bit is attached to the information so that the total number of 1 bits is an even number 1011001 0 1010010 1 Odd Parity - One bit is attached to the information so that the total number of 1 bits is an odd number 1011001 1 1010010 0 Rashid Farid Chishti Computer Architecture
  • 29. Data Representation 29 PARITY BIT GENERATION Parity Bit Generation For b6b5... b0(7-bit information); even parity bit beven beven = b6 ⊕ b5 ⊕ ... ⊕ b0 For odd parity bit bodd = beven ⊕ 1 = beven Rashid Farid Chishti Computer Architecture
  • 30. Data Representation 30 Error Detecting codes PARITY GENERATOR AND PARITY CHECKER Parity Generator Circuit (even parity) b6 b5 beven b4 b3 b2 b1 b0 Parity Checker beven b6 b5 b4 b3 b2 b1 Even Parity error indicator b0 Rashid Farid Chishti Computer Architecture