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Formal Verification
 Academic Research
     in the UK

          Kerstin Eder
 Design Automation and Verification
                           f


                                Department of
                      COMPUTER SCIENCE
UK Research in Verification




                               University of
 University of                 Cambridge
 Warwick


                              University of
                              Oxford
    University of
    Bristol         University of
                    Southampton
University of Cambridge
Programming, Logic and Semantics Group
  Mike Gordon
  – “Why higher order logic is a good formalism for
    specifying and verifying hardware“ [1986/1991]
                             hardware
  – HOL theorem prover

  Larry Paulson
  – interactive theorem prover Isabelle
  – applying automated theorem provers to verification
    problems
  – applying set theory to specification and verification
      pp y g          y     p

  Alan Mycroft
  – from semantic models of programming languages to
    actually building optimising compilers
  – Collaborations with ARM and Microsoft
University of Warwick
Formal Methods Research Group
  Doron Peled
  –   Concurrency theory
  –   Semantics of Programming Languages
  –   Formal Verification, Formal Specification
  –   Model Checking, Finite Automata
  –   Software Testing, Temporal Logics, Partial
      order methods and Traces.

  – Recent work on combining model checking
    and testing
University of Oxford
Verification Research Theme
 Bill Roscoe
  – Concurrency, Verification, FDR
  – Analysis of cryptographic protocols


  Marta Kwiatkowska
  – Modelling and quantitative verification of
    probabilistic systems

  Tom Melham
  – Formal logic, mechanised reasoning, model
    checking and theorem proving, formal
    verification
Verification Methodology

Robert B. Jones, John W. O'Leary, Carl-
   Johan H. Seger, Mark D. Aagaard,
   and Thomas F. Melham. Practical
   formal verification in microprocessor
   design. IEEE Design & Test of
   Computers, 18(4):16-25, July/August
   2001.

   Methodology addresses:
    –   Realism
    –   Transparency and soundness
    –   Structure
    –   Incrementality and recoverability
    –   Debugging and feedback
    –   Top-down and bottom-up
    –   Regression and reuse

   Work in collaboration with Carl Seger
   (Intel)
   Forte
   F t verification environment (Intel)
            ifi ti      i       t (I t l)
University of Southampton
DSSE: Dependable Systems & Software
 Engineering G
 E i     i Group
  Michael Butler (Head of group)
  –   The Refinement Calculus and tool support for refinement
  –   Refinement of distributed systems
  –   Formal modelling and analysis of business transactions
  –   CSP and B (Rodin)
  –   Model checking


  Joao Marques-Silva
       Marques Silva
  – algorithms for boolean satisfiability and extensions
  – formal methods, model checking, system
    specification and verification
  – application of formal methods
  – design automation
Conclusion
In academic context, verification is often
taken to mean Formal Verification
– Raise awareness for simulation-based
  verification and associated interesting
  research problems
UK good base providing foundations for
formal verification

More industrial collaboration needed

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Formal Verification: Academic Research in the UK

  • 1. Formal Verification Academic Research in the UK Kerstin Eder Design Automation and Verification f Department of COMPUTER SCIENCE
  • 2. UK Research in Verification University of University of Cambridge Warwick University of Oxford University of Bristol University of Southampton
  • 3. University of Cambridge Programming, Logic and Semantics Group Mike Gordon – “Why higher order logic is a good formalism for specifying and verifying hardware“ [1986/1991] hardware – HOL theorem prover Larry Paulson – interactive theorem prover Isabelle – applying automated theorem provers to verification problems – applying set theory to specification and verification pp y g y p Alan Mycroft – from semantic models of programming languages to actually building optimising compilers – Collaborations with ARM and Microsoft
  • 4. University of Warwick Formal Methods Research Group Doron Peled – Concurrency theory – Semantics of Programming Languages – Formal Verification, Formal Specification – Model Checking, Finite Automata – Software Testing, Temporal Logics, Partial order methods and Traces. – Recent work on combining model checking and testing
  • 5. University of Oxford Verification Research Theme Bill Roscoe – Concurrency, Verification, FDR – Analysis of cryptographic protocols Marta Kwiatkowska – Modelling and quantitative verification of probabilistic systems Tom Melham – Formal logic, mechanised reasoning, model checking and theorem proving, formal verification
  • 6. Verification Methodology Robert B. Jones, John W. O'Leary, Carl- Johan H. Seger, Mark D. Aagaard, and Thomas F. Melham. Practical formal verification in microprocessor design. IEEE Design & Test of Computers, 18(4):16-25, July/August 2001. Methodology addresses: – Realism – Transparency and soundness – Structure – Incrementality and recoverability – Debugging and feedback – Top-down and bottom-up – Regression and reuse Work in collaboration with Carl Seger (Intel) Forte F t verification environment (Intel) ifi ti i t (I t l)
  • 7. University of Southampton DSSE: Dependable Systems & Software Engineering G E i i Group Michael Butler (Head of group) – The Refinement Calculus and tool support for refinement – Refinement of distributed systems – Formal modelling and analysis of business transactions – CSP and B (Rodin) – Model checking Joao Marques-Silva Marques Silva – algorithms for boolean satisfiability and extensions – formal methods, model checking, system specification and verification – application of formal methods – design automation
  • 8. Conclusion In academic context, verification is often taken to mean Formal Verification – Raise awareness for simulation-based verification and associated interesting research problems UK good base providing foundations for formal verification More industrial collaboration needed