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IOSR Journal of Engineering (IOSRJEN) www.iosrjen.org
ISSN (e): 2250-3021, ISSN (p): 2278-8719
Vol. 05, Issue 04 (April. 2015), ||V3|| PP 24-35
International organization of Scientific Research 24 | P a g e
Design And Simulation of Three-Phase Diode Clamped And
Improved Inverter Fed Asynchronous Motor
Drive With Three-Level Configurations
1
G. C. Diyoke, 1
I. K. Onwuka, 2
O.A. Okoye
1
Department of Electrical and Electronics Engineering,
2
Department of Mechanical Engineering,
Michael Okpara University of Agriculture, Umudike, Umuahia, Abia State, Nigeria.
Abstract: - This paper presents the study of Three-phase Three-Level inverter topology fed Asynchronous
motor drive. Three-level configurations are realized by Diode clamped and Improved multilevel inverter
topologies. The poor quality of voltage and current of a conventional inverter fed induction machine is due to
the presence of harmonics and hence there is significant level of energy losses. The Multilevel inverter
configurations are used to reduce the harmonics by means of synthesizing the output waveforms. The inverters
modes of operations are discussed under single phase one leg voltage circuit analysis. The three-phase
asynchronous motor is analysed under a split-single phase asynchronous motor. The higher levels can be
modulated by comparing a sinusoidal reference signal and multiple triangular carrier signals by means of pulse
width modulation technique. The simulation of three-phase three-level inverters fed induction motor model are
done using Matlab/Simulink. The results of rotor currents, stator currents, rotor speed, electromagnetic torque
and three-phase output voltages are plotted. Furthermore, the numbers of circuit component counts in different
inverter topologies are obtained.
Keywords: Asynchronous motor, Multilevel Inverter, Pulse width modulation, Speed, Three-phase, Torque.
I. INTRODUCTION
Nowadays, there are many applications for multilevel inverter topologies, such as Flexible AC Transmission
Systems (FACTS), High Voltage Direct Current (HVDC) transmission, electrical drives such as speed control of
three-phase water pump, conveyor systems, machine tools, and Dispersed Generation (DG) systems. A
multilevel inverter is a power electronic device built to synthesize a desired AC voltage from several levels of
DC voltages. Such inverters have been the subject of research in the recent years where the DC levels were
considered to be identical in that all of them were capacitors, batteries, solar cells, etc. In Recent Years, industry
has begun to demand higher power equipment, which now reaches the megawatt level. Controlled ac drives in
the megawatt range are usually connected to the medium-voltage network. Today, it is hard to connect a single
power semiconductor switch directly to medium voltage grids. For these reasons, a new family of multilevel
inverters has emerged as the solution for working with higher voltage levels [1], [2]. Multilevel inverters include
an array of power semiconductors and capacitor voltage sources, the output of which generate voltages with
staircase waveforms. The commutation of the switches permits the addition of the capacitor voltages, which
reach high voltage at the output, while the power semiconductors must withstand only reduced voltages. Fig. 1
shows a schematic diagram of one phase leg of inverters with different numbers of levels, for which the action
of the power semiconductors is represented by an ideal switch with several positions.
Fig. 1 One phase leg of an inverter with (a) two-level, (b) three-level, and (c) n-level.
Design And Simulation Of Three-Phase Diode Clamped And Improved Inverter Fed Asynchronous Motor Drive
International organization of Scientific Research 25 | P a g e
A two-level inverter generates an output voltage with two values (levels) with respect to the negative terminal of
the capacitor and the voltages are zero and VC (see Fig. 1(a)), while the three-level inverter generates three
voltages as zero,VC, 2VC (see fig. 1(b)) and n-level inverter generates zero, VC, 2VC, 3VC… (n-1) VC (see fig.
1(c)).
Considering that m is the number of steps of the phase voltage with respect to the negative terminal of the
inverter, then the number of steps in the voltage between two phases of the load is K
K=2m-1 (1)
and the number of steps p in the phase voltage of a three-phase load in wye connection is
p=4m-3 (2)
The term multilevel starts with the least member which is three-level inverter as introduced by Nabae I t. [3]. By
increasing the number of levels in the inverter, the output voltages have more steps generating a staircase
waveform, which has a reduced harmonic distortion with high switching losses. However, a high number of
levels increases the control complexity and introduces voltage imbalance problems. Three different topologies
have been proposed for multilevel inverters: diode-clamped (neutral-clamped) [3]; capacitor-clamped (flying
capacitors) [1], [4]; and cascaded H-bridge with separate dc sources [1], [5]. In addition, several modulation and
control strategies have been developed or adopted for multilevel inverters including the following: multi-carrier
sinusoidal pulse width modulation (PWM), multilevel selective harmonic elimination, and space-vector
modulation (SVM).
II. THREE-PHASE MULTILEVEL INVERTER TOPOLOGIES
A. Diode-clamped multilevel inverter:
The most commonly used multilevel topology is the diode clamped inverter, in which the diode is used as the
clamping device to clamp the dc bus voltage so as to achieve steps in the output voltage. One phase of a three-
level diode clamped inverter is shown in Fig. 2.
Fig. 2 One Phase of three-Level diode clamped inverter topology
As it is shown in the circuit above, in this type of multilevel we have only one DC-source and the DC-
bus is split into n-level by n-1 capacitors. Here n= 3 and we have two capacitors. Fig. 2(A) represents half-wave
circuit topology for three-level diode clamped inverter. Consequently, the output phase voltage has the
following:
Vdc
2
, 0, -
Vdc
2
,. To explain how the staircase voltage is synthesized in fig. 2(A) above, the neutral point
0 is considered as the output phase voltage reference point. There are two switch combinations to synthesize two
level voltages across Va and 0. Firstly, for voltage level Va0 =
Vdc
2
, turn on all upper switches 𝑆1 and 𝑆2,
secondly, for voltage level Van = -
Vdc
2
, turn on all lower switches 𝑆1and 𝑆2and finally, for voltage level Van = 0,
Design And Simulation Of Three-Phase Diode Clamped And Improved Inverter Fed Asynchronous Motor Drive
International organization of Scientific Research 26 | P a g e
turn on two middle switches 𝑆2 and 𝑆1. Fig. 2(B) represents full-wave circuit topology for three-level diode
clamped inverter. The output phase voltage has three-levels with negative reference:
Vdc
2
, 𝑉𝑑𝑐 , 0. To explain how
the staircase voltage is synthesized in fig. 2(B) above, the neutral point 0 is considered as the output phase
voltage reference point. There are two switch combinations to synthesize two level voltages across Va and 0.
Firstly, for voltage level Va0 =
Vdc
2
, turn on two middle switches 𝑆2 and 𝑆1, secondly, for voltage level Van = Vdc ,
turn on all upper switches 𝑆1 and 𝑆2, and finally, for voltage level Van = 0, turn on all lower switches 𝑆1and 𝑆2.
Fig. 2(B) represents full-wave circuit topology for three-level diode clamped inverter. There are two clamping
diodes (Da1 and Da1) and four anti-parallel diodes (D1 , D2, D1 and D2). These clamping diodes clamp the
switching voltage to half level of the dc-bus voltage. The neutral point 0 is considered as the reference point [6].
To produce a three-level voltage, two switch combinations must be used. Although each active switching device
is only required to block a voltage level of
Vdc
(𝑛−1)
, the clamping diodes must have different voltage rating for
reverse voltage blocking [7]. So if diodes with same voltage rating as the active devices are used, the number of
required diodes for each phase will be 2(2n-3) and the number of power switches are given by 2(n-1). This
number represents a linear increment and when n is sufficiently high, the number of diodes required will make
the system impractical to implement and if the inverter runs under PWM, the diodes reverse recovery of these
clamping diodes becomes the major design challenge in high-voltage high-power applications [7]. Fig. 2(B)
above can be extended to three-phase circuit configuration by interconnection of another two-phase circuit to get
Vb andVc, and the control logic circuit is achieved by phase-shifting phase -A by 120° and 240° respectively.
B. Improved multilevel inverter: This inverter topology consists of a diode embedded bidirectional
switches, half H-bridge convectional inverter circuit and two bank capacitors.
Fig. 3. One Phase of three-Level Improved inverter topology.
As it is shown in the circuit above, in this type of multilevel we have only one DC-source and the DC-
bus is split into n-level by n-1 capacitors. Here n= 3 and we have two capacitors. Fig. 3(A) represents half-wave
circuit topology for three-level improved inverter. Consequently, the output phase voltage has the following:
𝐕 𝐝𝐜
𝟐
, 0, -
𝐕 𝐝𝐜
𝟐
,. To explain how the staircase voltage is synthesized in fig. 3(A) above, the neutral point 0 is
considered as the output phase voltage reference point. The output voltage can be synthesized as follows:
Firstly, for voltage level 𝐕𝐚𝟎 =
𝐕 𝐝𝐜
𝟐
, turn on the upper switch 𝐒 𝟏, secondly, for voltage level 𝐕𝐚𝐧 = -
𝐕 𝐝𝐜
𝟐
, turn on
lower switch 𝐒 𝟐 and finally, for voltage level 𝐕𝐚𝐧 = 0, turn on the middle switch 𝑺 𝒂. Fig. 2(B) represents full-
Design And Simulation Of Three-Phase Diode Clamped And Improved Inverter Fed Asynchronous Motor Drive
International organization of Scientific Research 27 | P a g e
wave circuit topology for three-level improved inverter. The output phase voltage has three-levels with negative
reference:
𝐕 𝐝𝐜
𝟐
, 𝐕𝐝𝐜, 0. Furthermore, fig. 3(B) depicts full-wave three-level improved inverter topology with
output voltage of 0,
𝐕 𝐝𝐜
𝟐
, and 𝐕𝐝𝐜. Thus, the proposed inverter synthesizes one and half levels of the dc bus
voltage. To obtain the maximum positive output voltage 𝐕𝐚𝟎 = 𝑽 𝒅𝒄, 𝑺 𝟏 is turned ON, to obtain the half-positive
output voltage 𝐕𝐚𝟎 =
𝐕 𝐝𝐜
𝟐
, 𝑺 𝒂 is turned ON and, 𝐕𝐚𝟎 = 0, when 𝑺 𝟐 is turned ON. If diodes with same voltage
rating as the active devices are used, the number of required diodes for each phase will be 2(2n-3) and the
number of power switches are given by n, where n is the number of the inverter output voltage level.
III. THREE-PHASE ASYNCHRONOUS MOTOR
Asynchronous machines are widely used in industries. Induction motors have their characteristic during
starting and fault conditions [8]. At this study a kind of squirrel cage asynchronous machine from the library of
MATLAB/Sims Power is used as a load for our multilevel inverters. Synchronous speed of Asynchronous
Motor varies directly proportional to the supply frequency. Hence, by changing the frequency, the synchronous
speed and the motor speed can be controlled below and above the normal full load speed. The voltage induced
in the stator, E is directly proportional to the product of slip frequency and air gap flux. The Asynchronous
Motor terminal voltage can be considered proportional to the product of the frequency and flux, if the stator
voltage is neglected. Any reduction in the supply frequency without a change in the terminal voltage causes an
increase in the air gap flux. Asynchronous motors are designed to operate at the knee point of the magnetization
characteristic to make full use of the magnetic material. Therefore the increase in flux will saturate the motor.
This will increase the magnetizing current, distort the line current and voltage, increase the core loss and the
stator copper loss, and produce a high pitch acoustic noise. While any increase in flux beyond rated value is
undesirable from the consideration of saturation effects, a decrease in flux is also avoided to retain the torque
capability of the motor. Therefore, the pulse width modulation (PWM) control below the rated frequency is
generally carried out by reducing the machine phase voltage, V, along with the frequency in such a manner that
the flux is maintained constant. Above the rated frequency, the motor is operated at a constant voltage because
of the limitation imposed by stator insulation or by supply voltage limitations [9]. In this paper split-phase
single-phase Asynchronous Motor is used as inverter load throughout the simulation process.
Fig. 4. Split-phase Single-phase Asynchronous Motor.
A three-phase symmetrical induction motor upon losing one of its stator phase supplies while running
may continue to operate as essentially a single-phase motor with the remaining line-to-line voltage across the
other two connected phases. When the main winding coil is connected in parallel with ac voltage, as in the split-
phase single-phase asynchronous motor of fig. 4, the current of the auxiliary winding, 𝒊 𝒅𝒔, leads 𝒊 𝒒𝒔 of the main
winding. For even a larger single-phase induction motor, that lead can be further increased by connecting a
capacitor in series with the auxiliary winding, this arrangement brings about a Capacitor-start single-phase
asynchronous motor. Fig. 4 shows that the motor has two windings: the main (running) winding and the
auxiliary (starting) winding. This motor is modeled in two parts: Electrical part which is represented by a
fourth-order state-space model and, mechanical part which is represented by second-order system. All electrical
variables and parameters are referred to the stator. This is indicated by the prime signs in the machine equations
given below. All stator and rotor quantities are in the stator reference frame (d-q frame).
Electrical System Part Analysis:
Design And Simulation Of Three-Phase Diode Clamped And Improved Inverter Fed Asynchronous Motor Drive
International organization of Scientific Research 28 | P a g e
Fig. 5 Main winding (q-axis) circuit diagram
𝐕𝐪𝐬 = 𝐑 𝐬 𝐢 𝐪𝐬 +
𝐝
𝐝𝐭
𝛗 𝐪𝐬 (3)
Where, 𝛗 𝐪𝐬 = 𝐋𝐥𝐬 + 𝐋 𝐦𝐬 𝐢 𝐪𝐬 + 𝐋 𝐦𝐬 𝐢′
𝐪𝐫
𝐕′
𝐪𝐫 = 𝐑′
𝐫 𝐢′
𝐪𝐫 +
𝐝
𝐝𝐭
𝛗′
𝐪𝐫
−
𝐍 𝐬
𝐍𝐬
𝛚 𝐫 𝛗′
𝐝𝐫
(4)
Where, 𝝋′
𝒒𝒓
= 𝐋′
𝐥𝐫 + 𝐋 𝐦𝐬 𝐢′
𝐪𝐫 + 𝐋 𝐦𝐬 𝐢 𝐪𝐬
Fig. 6 Auxiliary winding (d-axis) circuit diagram
𝐕𝐝𝐬 = 𝐑 𝐒 𝐢 𝐝𝐬 +
𝐝
𝐝𝐭
𝛗 𝐝𝐬 (5)
Where, 𝝋 𝒅𝒔 = 𝐋𝐥𝐒 + 𝐋 𝐦𝐒 𝐢 𝐝𝐬 + 𝐋 𝐦𝐒 𝐢′
𝐝𝐫
𝐕′
𝐝𝐫 = 𝐑′
𝐑 𝐢′
𝐝𝐫 +
𝐝
𝐝𝐭
𝛗′
𝐝𝐫
+
𝐍𝐬
𝐍 𝐬
𝛚 𝐫 𝛗′
𝐪𝐫
(6)
Where, 𝝋′
𝒅𝒓
= 𝐋′
𝐥𝐑 + 𝐋 𝐦𝐒 𝐢′
𝐝𝐫 + 𝐋 𝐦𝐒 𝐢 𝐝𝐬
𝐓𝐞 = 𝐩(
𝐍𝐬
𝐍 𝐬
𝛗′
𝐪𝐫
𝐢′
𝐝𝐫 −
𝐍 𝐬
𝐍𝐬
𝛗′
𝐝𝐫
𝐢′
𝐪𝐫) (7)
Mechanical System part Analysis
𝒅
𝒅𝒕
𝝎 𝐦 =
𝟏
𝟐𝑯
(𝑻 𝒆 − 𝑭𝝎 𝐦 − 𝑻 𝑳) (8)
𝒅
𝒅𝒕
𝛉 𝐦 = 𝝎 𝐦 (9)
It is vital to note that the reference frame fixed in the stator is used to convert voltages and currents to the dq
frame, this enables for easier model analysis of the system. The following relationships describe the ab-to-dq
frame transformations applied to the single phase asynchronous machine.
𝐟 𝐪𝐬
𝐟 𝐝𝐬
=
𝟏 𝟎
𝟎 −𝟏
𝐟 𝐚𝐬
𝐟 𝐛𝐬
(10)
𝐟 𝐪𝐫
𝐟 𝐝𝐫
=
𝐜𝐨𝐬𝛉 𝐫 −𝐬𝐢𝐧𝛉 𝐫
−𝐬𝐢𝐧𝛉 𝐫 −𝐜𝐨𝐬𝛉 𝐫
𝐟 𝐚𝐫
𝐟 𝐛𝐫
(11)
The variable f can represent either voltage, current or flux linkage. The single phase asynchronous machine
block parameters as shown in fig. 7 are defined as follows (all quantities are referred to the stator):
Table 1 Definition Of Symbols In Asynchronous Motor Model
Para-
meters
Definitions units
𝐑 𝐬, 𝐋𝐥𝐬 Main winding stator resistance and leakage
inductance
𝛀 𝒂𝒏𝒅 H𝐑 𝐒, 𝐋𝐥𝐒 Auxiliary winding stator resistance and leakage
Design And Simulation Of Three-Phase Diode Clamped And Improved Inverter Fed Asynchronous Motor Drive
International organization of Scientific Research 29 | P a g e
inductance
𝐑′
𝐫, 𝐋′
𝐥𝐫 Main winding rotor resistance and leakage
inductance
𝐑′
𝐑, 𝐋′
𝐥𝐑 Auxiliary winding rotor resistance and leakage
inductance
𝐋 𝐦𝐬 Main winding magnetizing inductance H
𝐋 𝐦𝐒 Auxiliary winding magnetizing inductance
𝐕𝐚𝐬, 𝐢 𝐚𝐬
𝐕𝐛𝐬, 𝐢 𝐛𝐬
𝐕𝐪𝐬, 𝐢 𝐪𝐬
𝐕𝐝𝐬, 𝐢 𝐝𝐬
𝐕′
𝐪𝐫, 𝐢′
𝐪𝐫
𝐕′
𝐝𝐫, 𝐢′
𝐝𝐫
Main winding stator voltage and current
Auxiliary winding stator voltage and current
q-axis stator voltage and current
d-axis stator voltage and current
q-axis rotor voltage and current
d-axis rotor voltage and current
V and A
𝛗 𝐪𝐬, 𝛗 𝐝𝐬 Stator q and d-axis fluxes V.s
𝛗′
𝐪𝐫
, 𝛗′
𝐝𝐫
Rotor q and d-axis fluxes V.s
𝛚 𝐦 Rotor angular velocity Rad/sec
𝜽 𝒎 Rotor angular position rad
p Number of pair poles
𝝎 𝒓 Electrical angular velocity (𝝎 𝒓 ∗ 𝒑) Rad/sec
𝜽 𝒓 Electrical rotor angular position ( 𝜽 𝒓 ∗ 𝒑) rad
𝑻 𝒆 Electromagnetic torque Nm
𝑻 𝒎 Shaft mechanical torque Nm
J Combined rotor and load inertia coefficient.
Set to infinite to simulate locked rotor
Kg.m^2
F Combined rotor and load viscous friction
coefficient
Nms
H Combined rotor and load inertia constant.
Set to infinite to simulate locked rotor
sec
Ns Number of auxiliary winding‟s effective turns turns
𝑵 𝒔 Number of main winding‟s effective turns Turns
Fig. 7 A three-phase Squirrel-cage asynchronous motor parameter.
Design And Simulation Of Three-Phase Diode Clamped And Improved Inverter Fed Asynchronous Motor Drive
International organization of Scientific Research 30 | P a g e
IV. MATLAB SIMULINK SIMULATION RESULTS
Multilevel inverter fed asynchronous motor drive is implemented in MATLAB/ SIMULINK which is
shown in fig. 8. The MATLAB/ SIMULINK model of diode clamped and improved three-phase multilevel
inverter using three-level configuration topology is shown in fig. 8. The logic algorithm for firing each of the
circuit topology is embedded in the logic circuit and also different inverter configurations are also embedded in
the diagram with a name as multilevel invereter topology. Voltmeter is attached between the inverter output
terminal and motor input terminal, this helps to measure the inverter ouput readings and machine input voltages.
Fig. 8 Matlab/Simulink model of Multilevel Asynchronous Motor drive.
Diode clamped three phase three-level inverter output voltage after feeding to synchronous motor is
shown in fig. 9. The stator main and rotor winding output currents with respect to three-phase are shown in fig.
10. The variation of speed and torque are also shown. The inverter output voltage which serves as the machine
input voltage is also plotted in fig.10. The machine starts at no load and then at t=0.20secs, once the machine
has reached its steady state, the load torque is increased to its nominal value (10 N.m) in 1.0 sec. The speed
increases and settles at 1500 rpm without torque load and drops to 1450 rpm when loaded with torque load.
Fig. 9 Matlab/Simulink model of Diode clamped Three-phase Three-level Inverter.
powergui
Discrete,
Ts= 5e-005 s.
Wm
Vtri 2
Vtri1
Vref 2
Vref1
Vref
Three -Phase
V-I Measurement
Vabc
A
B
C
a
b
c
Te
TL =10 Nm
Stator
Current
Rotor
Current
Ouput Inverter
Voltages
Multilevel
Inverter topology
Leg A firing signals
Leg B firing signals
Leg C firing signal
Positive terminal
Negative Terminal
Va
Vb
Vc
Logic circuit
for firing signal
sin(theta)
sin(theta-120)
Asin(theta-240)
Triangular2
Triangular1
ga
gb
gc Gain
-K-
DC Voltage
Source
Asynchronous Machine
SI Units squirrel cage
Rating 5.4HP, 400 V,
50Hz,1500 rpm .
Tm
m
A
B
C
<Stator current is _a (A)>
<Stator current is _b (A)>
<Electromagnetic torque Te (N*m)>
<Rotor current ir _a (A)>
<Rotor current ir _b (A)>
<Rotor current ir _c (A)>
<Stator current is _c (A)>
<Rotor speed (wm)>
Sc2
g
C
E
Sc1
g
C
E
Sb 2
g
C
E
Sb 1
g
C
E
Sa2
g
C
E
Sa1
g
C
E
NotSc 2
g
C
E
NotSc 1
g
C
E
NotSb 2
g
C
E
NotSb 1
g
C
E
NotSa 2
g
C
E
NotSa 1
g
C
E
NotDa 1
From 9
[ga 2]
From 8
[ga 1]
From 7
NOTgb 2]
From 6
NOTgb 1]
From 5
[gb 2]
From 4
[gb 1]
From 3
NOTgc 2]
From 2
NOTgc 1]
From 11
NOTga 2]
From 10
NOTga 1]
From 1
[gc2]
From
[gc 1]
Diode 5Db1Da1
DC Voltage
Source
D1D
C2
C1
Asynchronous Machine
SI Units
Tm
m
A
B
C
Design And Simulation Of Three-Phase Diode Clamped And Improved Inverter Fed Asynchronous Motor Drive
International organization of Scientific Research 31 | P a g e
Fig. 10a Diode Clamped Multilevel Inverter Topology Simulation Results.
Fig. 10b A Waveform for Torque versus Rotor Speed
An Improved three phase three-level inverter output voltage after feeding to asynchronous motor is
shown in fig. 11. The stator main and rotor winding output currents with respect to three-phase are shown in fig.
12. The variation of speed and torque are also shown. The inverter output voltage which serves as the machine
input voltage is also plotted in fig.12. The machine starts at no load and then at t=2.0secs, once the machine has
reached its steady state, the load torque is increased to its nominal value (10 N.m) in 1.0 sec. The speed
increases and settles at 1500 rpm without torque load and drops to 1450 rpm when loaded with torque load.
0 0.5 1 1.5 2
-60
-40
-20
0
20
40
Time (secs)
RotorCurrentIra
(A)
Graph of Phase A Rotor Current
0 0.5 1 1.5 2
-40
-20
0
20
40
60
Time(secs)
StatorcurrentIsa
(A)
Graph of Phase A Stator current
0 0.5 1 1.5 2
0
500
1000
1500
2000
Time (secs)
RotorSpeed(rpm)
Graph of Rotor Speed
0 0.5 1 1.5 2
-40
-20
0
20
40
Time (secs)
RotorCurrentIrb
(A)
Graph of Phase B Rotor Current
0 0.5 1 1.5 2
-40
-20
0
20
40
Time (secs)
StatorCurrentIsb
(A)
Graph of Phase B Stator Current
0 0.5 1 1.5 2
-20
0
20
40
Time(secs)
Torque(N-m)
Graph of Electromagnetic Torque(N.m)
0 0.5 1 1.5 2
-40
-20
0
20
40
Time (secs)
RotorcurrentIrc
(A)
Graph of Phase C Rotor current
0 0.5 1 1.5 2
-40
-20
0
20
40
Time(secs)
StatorCurrentIsc
(A)
Graph of Phase C Stator Current(A)
0 0.01 0.02 0.03 0.04 0.05 0.06
-500
0
500
Time(secs)
MotorInputVoltages(V)
Graph of Inverter Output Voltages
Va
Vb
Vc
0 200 400 600 800 1000 1200 1400 1600
-10
-5
0
5
10
15
20
25
30
35
40
Rotor Speed (RPM)
Torque(Nm)
Graph of Torque versus Rotor-Speed
Design And Simulation Of Three-Phase Diode Clamped And Improved Inverter Fed Asynchronous Motor Drive
International organization of Scientific Research 32 | P a g e
Fig. 11 Matlab/Simulink model of An Improved Three-phase Three-level Inverter.
Fig. 12a An Improved Multilevel inverter topology simulation results.
powergui
Discrete,
Ts= 5e-005 s.
Scc
g
C
E
Sc2
g
C
E
Sc1
g
C
E
Sb2
g
C
E
Sb 1
g
C
E
Sb
g
C
E
Sa 2 g
C
E
Sa1
g
C
E
Sa
g
C
E
From 8
[g5 ]
From 7
[g6]
From 6
[g4 ]
From 5
[g3 ]
From 4
[g2 ]
From 3
[g1 ]
From 2
[gc]
From1
[gb ]
From
[ga ]
DC Voltage
Source
D8
D7D6
D5
D4
D3
D2
D14
D13
D12
D11
D1
C2
C1
Asynchronous Machine
SI Units
Tm
m
A
B
C
0 0.5 1 1.5 2
-40
-20
0
20
40
Time (secs)
RotorCurrentIra
(A)
Graph of Phase A Rotor Current
0 0.5 1 1.5 2
-40
-20
0
20
40
60
Time(secs)
StatorcurrentIsa
(A)
Graph of Phase A Stator current
0 0.5 1 1.5 2
0
500
1000
1500
2000
Time (secs)
RotorSpeed(rpm)
Graph of Rotor Speed
0 0.5 1 1.5 2
-40
-20
0
20
40
Time (secs)
RotorCurrentIrb
(A)
Graph of Phase B Rotor Current
0 0.5 1 1.5 2
-40
-20
0
20
40
Time (secs)
StatorCurrentIsb
(A)
Graph of Phase B Stator Current
0 0.5 1 1.5 2
-10
0
10
20
30
40
Time(secs)
Torque(N-m)
Graph of Electromagnetic Torque(N.m)
0 0.5 1 1.5 2
-40
-20
0
20
40
Time (secs)
RotorcurrentIrc
(A)
Graph of Phase C Rotor current
0 0.5 1 1.5 2
-40
-20
0
20
40
Time(secs)
StatorCurrentIsc
(A)
Graph of Phase C Stator Current(A)
0 0.01 0.02 0.03 0.04 0.05 0.06
-600
-400
-200
0
200
400
Time(secs)
MotorInputVoltages(V)
Graph of Inverter Output Voltages
Va
Vb
Vc
Design And Simulation Of Three-Phase Diode Clamped And Improved Inverter Fed Asynchronous Motor Drive
International organization of Scientific Research 33 | P a g e
Fig. 12b Waveform for Torque versus Rotor Speed
4.1 NUMBER OF COMPONENT COUNT.
The number of required three-phase multilevel inverter components according to output voltage levels
(N) is illustrated in table 2. Analysis from Table 2 clearly shows that the numbers of components in this
proposed configuration are lower than any other configuration.
Table 2: NUMBER OF COMPONENTS FOR THREE-PHASE MULTILEVEL INVERTER
Inverter
Type/comp
onents
Diode
Clamped
Flying
Capacit
or
Cascaded
H-bridge
Improv
ed
Main
Switches
𝟑(𝟑𝐍 − 𝟓) 𝟑(𝟑𝐍
− 𝟓)
𝟑(𝟑𝐍
− 𝟓)
𝟑𝐍
Main
Diodes
𝟑(𝟑𝐍 − 𝟓) 𝟑(𝟑𝐍
− 𝟓)
𝟑(𝟑𝐍
− 𝟓)
6
Clamping
Diodes
𝟔(𝐍 − 𝟐) 0 0 𝟏𝟐(𝐍
− 𝟐)
DC bus
Capacitor/i
solate
supplies
𝐍 − 𝟏 1 𝐍 − 𝟏 𝐍 − 𝟏
Flying
capacitors
0 𝟐(𝐍
− 𝟐)
0 0
Total
Numbers
𝟐(𝟏𝟕𝐍
− 𝟐𝟔)
𝟐𝟎𝐍
− 𝟑𝟑
𝟏𝟗𝐍
− 𝟑𝟏
𝟏𝟔𝐍
− 𝟕
0 200 400 600 800 1000 1200 1400 1600
-5
0
5
10
15
20
25
30
35
40
Rotor Speed (RPM)
Torque(Nm)
Graph of Torque versus Rotor-Speed
Design And Simulation Of Three-Phase Diode Clamped And Improved Inverter Fed Asynchronous Motor Drive
International organization of Scientific Research 34 | P a g e
Fig. 13 required components for multi-level inverter in different topology.
V. CONCLUSION
The Diode clamped and Improved multilevel inverter topologies were simulated in MATLAB
simulation platform and their output performances were obtained. The circuit performance was tested by three-
phase asynchronous motor load. It was observed that their outputs displayed similar performance. In the
required circuit components count, it is also observed that the Improved inverter topology shows significantly
reduced number of component count, when compared with other inverter topologies. As a result of this the cost,
weight and size of the improved inverter power circuit has to be reduced.
REFERENCE
[1] J. S. Lai and F. Z. Peng, “Multilevel converters–A new breed of power converters,” IEEE Trans. Ind.
Applicat., vol. 32, pp. 509–517, May/June 1996.
[2] L. Tolbert, F.-Z. Peng, and T. Habetler, “Multilevel converters for large electric drives,” IEEE Trans. Ind.
Applicat., vol. 35, pp. 36–44, Jan./Feb. 1999.
[3] A. Nabae, I. Takahashi, and H. Akagi, “A new neutral-point clamped PWM inverter,” IEEE Trans. Ind.
Applicat., vol. IA-17, pp. 518–523, Sept./Oct. 1981.
[4] T. A. Meynard and H. Foch, “Multi-level choppers for high voltage applications,” Eur. Power Electron.
Drives J., vol. 2, no. 1, p. 41, Mar.1992.
[5] P. Hammond, “A new approach to enhance power quality for medium voltage ac drives,” IEEE Trans.
Ind. Applicat., vol. 33, pp. 202–208, Jan./Feb. 1997.
[6] Qiang, S. and L. Wenhua,‟ Control of a cascade statcom with star configuration under unbalanced
conditions‟. IEEE T. Power Electr., 24(1): 45-58, 2009.
[7] José, R., L. Jih-Sheng and Z.P. Fang, „Multilevel inverters: A survey of topologies, controls and
applications‟. IEEE T. Power Electr., 49(4): 724-738. 2002.
[8] Hagiwara, M., K. Nishimura and H. Akagi, A medium-voltage motor drive with a modular multilevel
PWM inverter. IEEE T. Power Electr., 25(7): 1786-1799, 2010.
[9] S. Manasa, S. Balajiramakrishna, S. Madhura and H. M Mohan, “Design and Simulation of three Phase
five level and seven level inverter fed induction motor drive with two cascaded H-bridge configuration”
International Journal of electrical and electronics Engineering (IJEEE), ISSN(Print): 2231-5284 Vol-1
Iss-4, 2012.
APPENDIX
FIG.8 LOGIC FIRING SIGNALS
function [ga1,ga2,gb1,gb2,gc1,gc2]=
fcn(SIN,SIN1,SIN2,T1,T2)
if (SIN >T1)
ga1=1;
else
ga1=0;
end
if (SIN >T2)
ga2=1;
else
ga2=0;
end
%Phase b programme
%SIN1=(SIN-2*pi/3);
if (SIN1 >T1)
gb1=1;
0 5 10 15 20 25 30 35 40 45 50
0
200
400
600
800
1000
1200
1400
1600
1800
Numberofcomponentcount
Numberofthree-phasecomponentcount
Diode
Flying
Cascaded
Improved
Design And Simulation Of Three-Phase Diode Clamped And Improved Inverter Fed Asynchronous Motor Drive
International organization of Scientific Research 35 | P a g e
else
gb1=0;
end
if (SIN1 >T2)
gb2=1;
else
gb2=0;
end
% phase c programme
%SIN2=(SIN-4*pi/3);
if (SIN2 >T1)
gc1=1;
else
gc1=0;
end
if (SIN2 >T2)
gc2=1;
else
gc2=0;
end
FIG.10a SIMULATION RESULT
x=Xout;
T=x(:,1);
figure(1)
subplot(3,3,1)
plot(T,x(:,2),'r')
xlabel('Time (secs)')
ylabel('Rotor Current Ir_a(A)')
title('Graph of Phase A Rotor Current')
grid on
subplot(3,3,2)
plot(T,x(:,5),'r')
xlabel('Time(secs)')
ylabel('Stator current Is_a(A)')
title('Graph of Phase A Stator current')
grid on
subplot(3,3,3)
plot(T,x(:,8),'k','linewidth',2.0)
xlabel('Time (secs)')
ylabel('Rotor Speed(rpm)')
title('Graph of Rotor Speed')
grid on
subplot(3,3,4)
plot(T,x(:,3),'b')
xlabel('Time (secs)')
ylabel('Rotor Current Ir_b(A)')
title('Graph of Phase B Rotor Current')
grid on
subplot(3,3,5)
plot(T,x(:,6),'b')
xlabel('Time (secs)')
ylabel('Stator Current Is_b(A)')
title('Graph of Phase B Stator Current')
grid on
subplot(3,3,6)
plot(T,x(:,9),'k','LineWidth',2.0')
xlabel('Time(secs)')
ylabel('Torque (N-m)')
title('Graph of Electromagnetic Torque(N.m)')
grid on
subplot(3,3,7)
plot(T,x(:,4),'m')
xlabel('Time (secs)')
ylabel('Rotor current Ir_c(A)')
title('Graph of Phase C Rotor current')
grid on
subplot(3,3,8)
plot(T,x(:,7),'m')
xlabel('Time(secs)')
ylabel('Stator Current Is_c(A)')
title('Graph of Phase C Stator Current(A)')
grid on
subplot(3,3,9)
plot(T,x(:,10),':r','linewidth',2)
xlabel('Time(secs)')
ylabel('Motor Input Voltages(V)')
title('Graph of Inverter Output Voltages')
grid on
hold on
plot(T,x(:,11),'-.b','linewidth',2)
hold on
plot(T,x(:,12),'m','linewidth',2)
Legend('Va','Vb','Vc')
figure(2)
plot(x(:,8),x(:,9),'r','linewidth',1)
xlabel('Rotor Speed (RPM)')
ylabel('Torque (Nm)')
title('Graph of Torque versus Rotor-Speed')
grid on

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D05432435

  • 1. IOSR Journal of Engineering (IOSRJEN) www.iosrjen.org ISSN (e): 2250-3021, ISSN (p): 2278-8719 Vol. 05, Issue 04 (April. 2015), ||V3|| PP 24-35 International organization of Scientific Research 24 | P a g e Design And Simulation of Three-Phase Diode Clamped And Improved Inverter Fed Asynchronous Motor Drive With Three-Level Configurations 1 G. C. Diyoke, 1 I. K. Onwuka, 2 O.A. Okoye 1 Department of Electrical and Electronics Engineering, 2 Department of Mechanical Engineering, Michael Okpara University of Agriculture, Umudike, Umuahia, Abia State, Nigeria. Abstract: - This paper presents the study of Three-phase Three-Level inverter topology fed Asynchronous motor drive. Three-level configurations are realized by Diode clamped and Improved multilevel inverter topologies. The poor quality of voltage and current of a conventional inverter fed induction machine is due to the presence of harmonics and hence there is significant level of energy losses. The Multilevel inverter configurations are used to reduce the harmonics by means of synthesizing the output waveforms. The inverters modes of operations are discussed under single phase one leg voltage circuit analysis. The three-phase asynchronous motor is analysed under a split-single phase asynchronous motor. The higher levels can be modulated by comparing a sinusoidal reference signal and multiple triangular carrier signals by means of pulse width modulation technique. The simulation of three-phase three-level inverters fed induction motor model are done using Matlab/Simulink. The results of rotor currents, stator currents, rotor speed, electromagnetic torque and three-phase output voltages are plotted. Furthermore, the numbers of circuit component counts in different inverter topologies are obtained. Keywords: Asynchronous motor, Multilevel Inverter, Pulse width modulation, Speed, Three-phase, Torque. I. INTRODUCTION Nowadays, there are many applications for multilevel inverter topologies, such as Flexible AC Transmission Systems (FACTS), High Voltage Direct Current (HVDC) transmission, electrical drives such as speed control of three-phase water pump, conveyor systems, machine tools, and Dispersed Generation (DG) systems. A multilevel inverter is a power electronic device built to synthesize a desired AC voltage from several levels of DC voltages. Such inverters have been the subject of research in the recent years where the DC levels were considered to be identical in that all of them were capacitors, batteries, solar cells, etc. In Recent Years, industry has begun to demand higher power equipment, which now reaches the megawatt level. Controlled ac drives in the megawatt range are usually connected to the medium-voltage network. Today, it is hard to connect a single power semiconductor switch directly to medium voltage grids. For these reasons, a new family of multilevel inverters has emerged as the solution for working with higher voltage levels [1], [2]. Multilevel inverters include an array of power semiconductors and capacitor voltage sources, the output of which generate voltages with staircase waveforms. The commutation of the switches permits the addition of the capacitor voltages, which reach high voltage at the output, while the power semiconductors must withstand only reduced voltages. Fig. 1 shows a schematic diagram of one phase leg of inverters with different numbers of levels, for which the action of the power semiconductors is represented by an ideal switch with several positions. Fig. 1 One phase leg of an inverter with (a) two-level, (b) three-level, and (c) n-level.
  • 2. Design And Simulation Of Three-Phase Diode Clamped And Improved Inverter Fed Asynchronous Motor Drive International organization of Scientific Research 25 | P a g e A two-level inverter generates an output voltage with two values (levels) with respect to the negative terminal of the capacitor and the voltages are zero and VC (see Fig. 1(a)), while the three-level inverter generates three voltages as zero,VC, 2VC (see fig. 1(b)) and n-level inverter generates zero, VC, 2VC, 3VC… (n-1) VC (see fig. 1(c)). Considering that m is the number of steps of the phase voltage with respect to the negative terminal of the inverter, then the number of steps in the voltage between two phases of the load is K K=2m-1 (1) and the number of steps p in the phase voltage of a three-phase load in wye connection is p=4m-3 (2) The term multilevel starts with the least member which is three-level inverter as introduced by Nabae I t. [3]. By increasing the number of levels in the inverter, the output voltages have more steps generating a staircase waveform, which has a reduced harmonic distortion with high switching losses. However, a high number of levels increases the control complexity and introduces voltage imbalance problems. Three different topologies have been proposed for multilevel inverters: diode-clamped (neutral-clamped) [3]; capacitor-clamped (flying capacitors) [1], [4]; and cascaded H-bridge with separate dc sources [1], [5]. In addition, several modulation and control strategies have been developed or adopted for multilevel inverters including the following: multi-carrier sinusoidal pulse width modulation (PWM), multilevel selective harmonic elimination, and space-vector modulation (SVM). II. THREE-PHASE MULTILEVEL INVERTER TOPOLOGIES A. Diode-clamped multilevel inverter: The most commonly used multilevel topology is the diode clamped inverter, in which the diode is used as the clamping device to clamp the dc bus voltage so as to achieve steps in the output voltage. One phase of a three- level diode clamped inverter is shown in Fig. 2. Fig. 2 One Phase of three-Level diode clamped inverter topology As it is shown in the circuit above, in this type of multilevel we have only one DC-source and the DC- bus is split into n-level by n-1 capacitors. Here n= 3 and we have two capacitors. Fig. 2(A) represents half-wave circuit topology for three-level diode clamped inverter. Consequently, the output phase voltage has the following: Vdc 2 , 0, - Vdc 2 ,. To explain how the staircase voltage is synthesized in fig. 2(A) above, the neutral point 0 is considered as the output phase voltage reference point. There are two switch combinations to synthesize two level voltages across Va and 0. Firstly, for voltage level Va0 = Vdc 2 , turn on all upper switches 𝑆1 and 𝑆2, secondly, for voltage level Van = - Vdc 2 , turn on all lower switches 𝑆1and 𝑆2and finally, for voltage level Van = 0,
  • 3. Design And Simulation Of Three-Phase Diode Clamped And Improved Inverter Fed Asynchronous Motor Drive International organization of Scientific Research 26 | P a g e turn on two middle switches 𝑆2 and 𝑆1. Fig. 2(B) represents full-wave circuit topology for three-level diode clamped inverter. The output phase voltage has three-levels with negative reference: Vdc 2 , 𝑉𝑑𝑐 , 0. To explain how the staircase voltage is synthesized in fig. 2(B) above, the neutral point 0 is considered as the output phase voltage reference point. There are two switch combinations to synthesize two level voltages across Va and 0. Firstly, for voltage level Va0 = Vdc 2 , turn on two middle switches 𝑆2 and 𝑆1, secondly, for voltage level Van = Vdc , turn on all upper switches 𝑆1 and 𝑆2, and finally, for voltage level Van = 0, turn on all lower switches 𝑆1and 𝑆2. Fig. 2(B) represents full-wave circuit topology for three-level diode clamped inverter. There are two clamping diodes (Da1 and Da1) and four anti-parallel diodes (D1 , D2, D1 and D2). These clamping diodes clamp the switching voltage to half level of the dc-bus voltage. The neutral point 0 is considered as the reference point [6]. To produce a three-level voltage, two switch combinations must be used. Although each active switching device is only required to block a voltage level of Vdc (𝑛−1) , the clamping diodes must have different voltage rating for reverse voltage blocking [7]. So if diodes with same voltage rating as the active devices are used, the number of required diodes for each phase will be 2(2n-3) and the number of power switches are given by 2(n-1). This number represents a linear increment and when n is sufficiently high, the number of diodes required will make the system impractical to implement and if the inverter runs under PWM, the diodes reverse recovery of these clamping diodes becomes the major design challenge in high-voltage high-power applications [7]. Fig. 2(B) above can be extended to three-phase circuit configuration by interconnection of another two-phase circuit to get Vb andVc, and the control logic circuit is achieved by phase-shifting phase -A by 120° and 240° respectively. B. Improved multilevel inverter: This inverter topology consists of a diode embedded bidirectional switches, half H-bridge convectional inverter circuit and two bank capacitors. Fig. 3. One Phase of three-Level Improved inverter topology. As it is shown in the circuit above, in this type of multilevel we have only one DC-source and the DC- bus is split into n-level by n-1 capacitors. Here n= 3 and we have two capacitors. Fig. 3(A) represents half-wave circuit topology for three-level improved inverter. Consequently, the output phase voltage has the following: 𝐕 𝐝𝐜 𝟐 , 0, - 𝐕 𝐝𝐜 𝟐 ,. To explain how the staircase voltage is synthesized in fig. 3(A) above, the neutral point 0 is considered as the output phase voltage reference point. The output voltage can be synthesized as follows: Firstly, for voltage level 𝐕𝐚𝟎 = 𝐕 𝐝𝐜 𝟐 , turn on the upper switch 𝐒 𝟏, secondly, for voltage level 𝐕𝐚𝐧 = - 𝐕 𝐝𝐜 𝟐 , turn on lower switch 𝐒 𝟐 and finally, for voltage level 𝐕𝐚𝐧 = 0, turn on the middle switch 𝑺 𝒂. Fig. 2(B) represents full-
  • 4. Design And Simulation Of Three-Phase Diode Clamped And Improved Inverter Fed Asynchronous Motor Drive International organization of Scientific Research 27 | P a g e wave circuit topology for three-level improved inverter. The output phase voltage has three-levels with negative reference: 𝐕 𝐝𝐜 𝟐 , 𝐕𝐝𝐜, 0. Furthermore, fig. 3(B) depicts full-wave three-level improved inverter topology with output voltage of 0, 𝐕 𝐝𝐜 𝟐 , and 𝐕𝐝𝐜. Thus, the proposed inverter synthesizes one and half levels of the dc bus voltage. To obtain the maximum positive output voltage 𝐕𝐚𝟎 = 𝑽 𝒅𝒄, 𝑺 𝟏 is turned ON, to obtain the half-positive output voltage 𝐕𝐚𝟎 = 𝐕 𝐝𝐜 𝟐 , 𝑺 𝒂 is turned ON and, 𝐕𝐚𝟎 = 0, when 𝑺 𝟐 is turned ON. If diodes with same voltage rating as the active devices are used, the number of required diodes for each phase will be 2(2n-3) and the number of power switches are given by n, where n is the number of the inverter output voltage level. III. THREE-PHASE ASYNCHRONOUS MOTOR Asynchronous machines are widely used in industries. Induction motors have their characteristic during starting and fault conditions [8]. At this study a kind of squirrel cage asynchronous machine from the library of MATLAB/Sims Power is used as a load for our multilevel inverters. Synchronous speed of Asynchronous Motor varies directly proportional to the supply frequency. Hence, by changing the frequency, the synchronous speed and the motor speed can be controlled below and above the normal full load speed. The voltage induced in the stator, E is directly proportional to the product of slip frequency and air gap flux. The Asynchronous Motor terminal voltage can be considered proportional to the product of the frequency and flux, if the stator voltage is neglected. Any reduction in the supply frequency without a change in the terminal voltage causes an increase in the air gap flux. Asynchronous motors are designed to operate at the knee point of the magnetization characteristic to make full use of the magnetic material. Therefore the increase in flux will saturate the motor. This will increase the magnetizing current, distort the line current and voltage, increase the core loss and the stator copper loss, and produce a high pitch acoustic noise. While any increase in flux beyond rated value is undesirable from the consideration of saturation effects, a decrease in flux is also avoided to retain the torque capability of the motor. Therefore, the pulse width modulation (PWM) control below the rated frequency is generally carried out by reducing the machine phase voltage, V, along with the frequency in such a manner that the flux is maintained constant. Above the rated frequency, the motor is operated at a constant voltage because of the limitation imposed by stator insulation or by supply voltage limitations [9]. In this paper split-phase single-phase Asynchronous Motor is used as inverter load throughout the simulation process. Fig. 4. Split-phase Single-phase Asynchronous Motor. A three-phase symmetrical induction motor upon losing one of its stator phase supplies while running may continue to operate as essentially a single-phase motor with the remaining line-to-line voltage across the other two connected phases. When the main winding coil is connected in parallel with ac voltage, as in the split- phase single-phase asynchronous motor of fig. 4, the current of the auxiliary winding, 𝒊 𝒅𝒔, leads 𝒊 𝒒𝒔 of the main winding. For even a larger single-phase induction motor, that lead can be further increased by connecting a capacitor in series with the auxiliary winding, this arrangement brings about a Capacitor-start single-phase asynchronous motor. Fig. 4 shows that the motor has two windings: the main (running) winding and the auxiliary (starting) winding. This motor is modeled in two parts: Electrical part which is represented by a fourth-order state-space model and, mechanical part which is represented by second-order system. All electrical variables and parameters are referred to the stator. This is indicated by the prime signs in the machine equations given below. All stator and rotor quantities are in the stator reference frame (d-q frame). Electrical System Part Analysis:
  • 5. Design And Simulation Of Three-Phase Diode Clamped And Improved Inverter Fed Asynchronous Motor Drive International organization of Scientific Research 28 | P a g e Fig. 5 Main winding (q-axis) circuit diagram 𝐕𝐪𝐬 = 𝐑 𝐬 𝐢 𝐪𝐬 + 𝐝 𝐝𝐭 𝛗 𝐪𝐬 (3) Where, 𝛗 𝐪𝐬 = 𝐋𝐥𝐬 + 𝐋 𝐦𝐬 𝐢 𝐪𝐬 + 𝐋 𝐦𝐬 𝐢′ 𝐪𝐫 𝐕′ 𝐪𝐫 = 𝐑′ 𝐫 𝐢′ 𝐪𝐫 + 𝐝 𝐝𝐭 𝛗′ 𝐪𝐫 − 𝐍 𝐬 𝐍𝐬 𝛚 𝐫 𝛗′ 𝐝𝐫 (4) Where, 𝝋′ 𝒒𝒓 = 𝐋′ 𝐥𝐫 + 𝐋 𝐦𝐬 𝐢′ 𝐪𝐫 + 𝐋 𝐦𝐬 𝐢 𝐪𝐬 Fig. 6 Auxiliary winding (d-axis) circuit diagram 𝐕𝐝𝐬 = 𝐑 𝐒 𝐢 𝐝𝐬 + 𝐝 𝐝𝐭 𝛗 𝐝𝐬 (5) Where, 𝝋 𝒅𝒔 = 𝐋𝐥𝐒 + 𝐋 𝐦𝐒 𝐢 𝐝𝐬 + 𝐋 𝐦𝐒 𝐢′ 𝐝𝐫 𝐕′ 𝐝𝐫 = 𝐑′ 𝐑 𝐢′ 𝐝𝐫 + 𝐝 𝐝𝐭 𝛗′ 𝐝𝐫 + 𝐍𝐬 𝐍 𝐬 𝛚 𝐫 𝛗′ 𝐪𝐫 (6) Where, 𝝋′ 𝒅𝒓 = 𝐋′ 𝐥𝐑 + 𝐋 𝐦𝐒 𝐢′ 𝐝𝐫 + 𝐋 𝐦𝐒 𝐢 𝐝𝐬 𝐓𝐞 = 𝐩( 𝐍𝐬 𝐍 𝐬 𝛗′ 𝐪𝐫 𝐢′ 𝐝𝐫 − 𝐍 𝐬 𝐍𝐬 𝛗′ 𝐝𝐫 𝐢′ 𝐪𝐫) (7) Mechanical System part Analysis 𝒅 𝒅𝒕 𝝎 𝐦 = 𝟏 𝟐𝑯 (𝑻 𝒆 − 𝑭𝝎 𝐦 − 𝑻 𝑳) (8) 𝒅 𝒅𝒕 𝛉 𝐦 = 𝝎 𝐦 (9) It is vital to note that the reference frame fixed in the stator is used to convert voltages and currents to the dq frame, this enables for easier model analysis of the system. The following relationships describe the ab-to-dq frame transformations applied to the single phase asynchronous machine. 𝐟 𝐪𝐬 𝐟 𝐝𝐬 = 𝟏 𝟎 𝟎 −𝟏 𝐟 𝐚𝐬 𝐟 𝐛𝐬 (10) 𝐟 𝐪𝐫 𝐟 𝐝𝐫 = 𝐜𝐨𝐬𝛉 𝐫 −𝐬𝐢𝐧𝛉 𝐫 −𝐬𝐢𝐧𝛉 𝐫 −𝐜𝐨𝐬𝛉 𝐫 𝐟 𝐚𝐫 𝐟 𝐛𝐫 (11) The variable f can represent either voltage, current or flux linkage. The single phase asynchronous machine block parameters as shown in fig. 7 are defined as follows (all quantities are referred to the stator): Table 1 Definition Of Symbols In Asynchronous Motor Model Para- meters Definitions units 𝐑 𝐬, 𝐋𝐥𝐬 Main winding stator resistance and leakage inductance 𝛀 𝒂𝒏𝒅 H𝐑 𝐒, 𝐋𝐥𝐒 Auxiliary winding stator resistance and leakage
  • 6. Design And Simulation Of Three-Phase Diode Clamped And Improved Inverter Fed Asynchronous Motor Drive International organization of Scientific Research 29 | P a g e inductance 𝐑′ 𝐫, 𝐋′ 𝐥𝐫 Main winding rotor resistance and leakage inductance 𝐑′ 𝐑, 𝐋′ 𝐥𝐑 Auxiliary winding rotor resistance and leakage inductance 𝐋 𝐦𝐬 Main winding magnetizing inductance H 𝐋 𝐦𝐒 Auxiliary winding magnetizing inductance 𝐕𝐚𝐬, 𝐢 𝐚𝐬 𝐕𝐛𝐬, 𝐢 𝐛𝐬 𝐕𝐪𝐬, 𝐢 𝐪𝐬 𝐕𝐝𝐬, 𝐢 𝐝𝐬 𝐕′ 𝐪𝐫, 𝐢′ 𝐪𝐫 𝐕′ 𝐝𝐫, 𝐢′ 𝐝𝐫 Main winding stator voltage and current Auxiliary winding stator voltage and current q-axis stator voltage and current d-axis stator voltage and current q-axis rotor voltage and current d-axis rotor voltage and current V and A 𝛗 𝐪𝐬, 𝛗 𝐝𝐬 Stator q and d-axis fluxes V.s 𝛗′ 𝐪𝐫 , 𝛗′ 𝐝𝐫 Rotor q and d-axis fluxes V.s 𝛚 𝐦 Rotor angular velocity Rad/sec 𝜽 𝒎 Rotor angular position rad p Number of pair poles 𝝎 𝒓 Electrical angular velocity (𝝎 𝒓 ∗ 𝒑) Rad/sec 𝜽 𝒓 Electrical rotor angular position ( 𝜽 𝒓 ∗ 𝒑) rad 𝑻 𝒆 Electromagnetic torque Nm 𝑻 𝒎 Shaft mechanical torque Nm J Combined rotor and load inertia coefficient. Set to infinite to simulate locked rotor Kg.m^2 F Combined rotor and load viscous friction coefficient Nms H Combined rotor and load inertia constant. Set to infinite to simulate locked rotor sec Ns Number of auxiliary winding‟s effective turns turns 𝑵 𝒔 Number of main winding‟s effective turns Turns Fig. 7 A three-phase Squirrel-cage asynchronous motor parameter.
  • 7. Design And Simulation Of Three-Phase Diode Clamped And Improved Inverter Fed Asynchronous Motor Drive International organization of Scientific Research 30 | P a g e IV. MATLAB SIMULINK SIMULATION RESULTS Multilevel inverter fed asynchronous motor drive is implemented in MATLAB/ SIMULINK which is shown in fig. 8. The MATLAB/ SIMULINK model of diode clamped and improved three-phase multilevel inverter using three-level configuration topology is shown in fig. 8. The logic algorithm for firing each of the circuit topology is embedded in the logic circuit and also different inverter configurations are also embedded in the diagram with a name as multilevel invereter topology. Voltmeter is attached between the inverter output terminal and motor input terminal, this helps to measure the inverter ouput readings and machine input voltages. Fig. 8 Matlab/Simulink model of Multilevel Asynchronous Motor drive. Diode clamped three phase three-level inverter output voltage after feeding to synchronous motor is shown in fig. 9. The stator main and rotor winding output currents with respect to three-phase are shown in fig. 10. The variation of speed and torque are also shown. The inverter output voltage which serves as the machine input voltage is also plotted in fig.10. The machine starts at no load and then at t=0.20secs, once the machine has reached its steady state, the load torque is increased to its nominal value (10 N.m) in 1.0 sec. The speed increases and settles at 1500 rpm without torque load and drops to 1450 rpm when loaded with torque load. Fig. 9 Matlab/Simulink model of Diode clamped Three-phase Three-level Inverter. powergui Discrete, Ts= 5e-005 s. Wm Vtri 2 Vtri1 Vref 2 Vref1 Vref Three -Phase V-I Measurement Vabc A B C a b c Te TL =10 Nm Stator Current Rotor Current Ouput Inverter Voltages Multilevel Inverter topology Leg A firing signals Leg B firing signals Leg C firing signal Positive terminal Negative Terminal Va Vb Vc Logic circuit for firing signal sin(theta) sin(theta-120) Asin(theta-240) Triangular2 Triangular1 ga gb gc Gain -K- DC Voltage Source Asynchronous Machine SI Units squirrel cage Rating 5.4HP, 400 V, 50Hz,1500 rpm . Tm m A B C <Stator current is _a (A)> <Stator current is _b (A)> <Electromagnetic torque Te (N*m)> <Rotor current ir _a (A)> <Rotor current ir _b (A)> <Rotor current ir _c (A)> <Stator current is _c (A)> <Rotor speed (wm)> Sc2 g C E Sc1 g C E Sb 2 g C E Sb 1 g C E Sa2 g C E Sa1 g C E NotSc 2 g C E NotSc 1 g C E NotSb 2 g C E NotSb 1 g C E NotSa 2 g C E NotSa 1 g C E NotDa 1 From 9 [ga 2] From 8 [ga 1] From 7 NOTgb 2] From 6 NOTgb 1] From 5 [gb 2] From 4 [gb 1] From 3 NOTgc 2] From 2 NOTgc 1] From 11 NOTga 2] From 10 NOTga 1] From 1 [gc2] From [gc 1] Diode 5Db1Da1 DC Voltage Source D1D C2 C1 Asynchronous Machine SI Units Tm m A B C
  • 8. Design And Simulation Of Three-Phase Diode Clamped And Improved Inverter Fed Asynchronous Motor Drive International organization of Scientific Research 31 | P a g e Fig. 10a Diode Clamped Multilevel Inverter Topology Simulation Results. Fig. 10b A Waveform for Torque versus Rotor Speed An Improved three phase three-level inverter output voltage after feeding to asynchronous motor is shown in fig. 11. The stator main and rotor winding output currents with respect to three-phase are shown in fig. 12. The variation of speed and torque are also shown. The inverter output voltage which serves as the machine input voltage is also plotted in fig.12. The machine starts at no load and then at t=2.0secs, once the machine has reached its steady state, the load torque is increased to its nominal value (10 N.m) in 1.0 sec. The speed increases and settles at 1500 rpm without torque load and drops to 1450 rpm when loaded with torque load. 0 0.5 1 1.5 2 -60 -40 -20 0 20 40 Time (secs) RotorCurrentIra (A) Graph of Phase A Rotor Current 0 0.5 1 1.5 2 -40 -20 0 20 40 60 Time(secs) StatorcurrentIsa (A) Graph of Phase A Stator current 0 0.5 1 1.5 2 0 500 1000 1500 2000 Time (secs) RotorSpeed(rpm) Graph of Rotor Speed 0 0.5 1 1.5 2 -40 -20 0 20 40 Time (secs) RotorCurrentIrb (A) Graph of Phase B Rotor Current 0 0.5 1 1.5 2 -40 -20 0 20 40 Time (secs) StatorCurrentIsb (A) Graph of Phase B Stator Current 0 0.5 1 1.5 2 -20 0 20 40 Time(secs) Torque(N-m) Graph of Electromagnetic Torque(N.m) 0 0.5 1 1.5 2 -40 -20 0 20 40 Time (secs) RotorcurrentIrc (A) Graph of Phase C Rotor current 0 0.5 1 1.5 2 -40 -20 0 20 40 Time(secs) StatorCurrentIsc (A) Graph of Phase C Stator Current(A) 0 0.01 0.02 0.03 0.04 0.05 0.06 -500 0 500 Time(secs) MotorInputVoltages(V) Graph of Inverter Output Voltages Va Vb Vc 0 200 400 600 800 1000 1200 1400 1600 -10 -5 0 5 10 15 20 25 30 35 40 Rotor Speed (RPM) Torque(Nm) Graph of Torque versus Rotor-Speed
  • 9. Design And Simulation Of Three-Phase Diode Clamped And Improved Inverter Fed Asynchronous Motor Drive International organization of Scientific Research 32 | P a g e Fig. 11 Matlab/Simulink model of An Improved Three-phase Three-level Inverter. Fig. 12a An Improved Multilevel inverter topology simulation results. powergui Discrete, Ts= 5e-005 s. Scc g C E Sc2 g C E Sc1 g C E Sb2 g C E Sb 1 g C E Sb g C E Sa 2 g C E Sa1 g C E Sa g C E From 8 [g5 ] From 7 [g6] From 6 [g4 ] From 5 [g3 ] From 4 [g2 ] From 3 [g1 ] From 2 [gc] From1 [gb ] From [ga ] DC Voltage Source D8 D7D6 D5 D4 D3 D2 D14 D13 D12 D11 D1 C2 C1 Asynchronous Machine SI Units Tm m A B C 0 0.5 1 1.5 2 -40 -20 0 20 40 Time (secs) RotorCurrentIra (A) Graph of Phase A Rotor Current 0 0.5 1 1.5 2 -40 -20 0 20 40 60 Time(secs) StatorcurrentIsa (A) Graph of Phase A Stator current 0 0.5 1 1.5 2 0 500 1000 1500 2000 Time (secs) RotorSpeed(rpm) Graph of Rotor Speed 0 0.5 1 1.5 2 -40 -20 0 20 40 Time (secs) RotorCurrentIrb (A) Graph of Phase B Rotor Current 0 0.5 1 1.5 2 -40 -20 0 20 40 Time (secs) StatorCurrentIsb (A) Graph of Phase B Stator Current 0 0.5 1 1.5 2 -10 0 10 20 30 40 Time(secs) Torque(N-m) Graph of Electromagnetic Torque(N.m) 0 0.5 1 1.5 2 -40 -20 0 20 40 Time (secs) RotorcurrentIrc (A) Graph of Phase C Rotor current 0 0.5 1 1.5 2 -40 -20 0 20 40 Time(secs) StatorCurrentIsc (A) Graph of Phase C Stator Current(A) 0 0.01 0.02 0.03 0.04 0.05 0.06 -600 -400 -200 0 200 400 Time(secs) MotorInputVoltages(V) Graph of Inverter Output Voltages Va Vb Vc
  • 10. Design And Simulation Of Three-Phase Diode Clamped And Improved Inverter Fed Asynchronous Motor Drive International organization of Scientific Research 33 | P a g e Fig. 12b Waveform for Torque versus Rotor Speed 4.1 NUMBER OF COMPONENT COUNT. The number of required three-phase multilevel inverter components according to output voltage levels (N) is illustrated in table 2. Analysis from Table 2 clearly shows that the numbers of components in this proposed configuration are lower than any other configuration. Table 2: NUMBER OF COMPONENTS FOR THREE-PHASE MULTILEVEL INVERTER Inverter Type/comp onents Diode Clamped Flying Capacit or Cascaded H-bridge Improv ed Main Switches 𝟑(𝟑𝐍 − 𝟓) 𝟑(𝟑𝐍 − 𝟓) 𝟑(𝟑𝐍 − 𝟓) 𝟑𝐍 Main Diodes 𝟑(𝟑𝐍 − 𝟓) 𝟑(𝟑𝐍 − 𝟓) 𝟑(𝟑𝐍 − 𝟓) 6 Clamping Diodes 𝟔(𝐍 − 𝟐) 0 0 𝟏𝟐(𝐍 − 𝟐) DC bus Capacitor/i solate supplies 𝐍 − 𝟏 1 𝐍 − 𝟏 𝐍 − 𝟏 Flying capacitors 0 𝟐(𝐍 − 𝟐) 0 0 Total Numbers 𝟐(𝟏𝟕𝐍 − 𝟐𝟔) 𝟐𝟎𝐍 − 𝟑𝟑 𝟏𝟗𝐍 − 𝟑𝟏 𝟏𝟔𝐍 − 𝟕 0 200 400 600 800 1000 1200 1400 1600 -5 0 5 10 15 20 25 30 35 40 Rotor Speed (RPM) Torque(Nm) Graph of Torque versus Rotor-Speed
  • 11. Design And Simulation Of Three-Phase Diode Clamped And Improved Inverter Fed Asynchronous Motor Drive International organization of Scientific Research 34 | P a g e Fig. 13 required components for multi-level inverter in different topology. V. CONCLUSION The Diode clamped and Improved multilevel inverter topologies were simulated in MATLAB simulation platform and their output performances were obtained. The circuit performance was tested by three- phase asynchronous motor load. It was observed that their outputs displayed similar performance. In the required circuit components count, it is also observed that the Improved inverter topology shows significantly reduced number of component count, when compared with other inverter topologies. As a result of this the cost, weight and size of the improved inverter power circuit has to be reduced. REFERENCE [1] J. S. Lai and F. Z. Peng, “Multilevel converters–A new breed of power converters,” IEEE Trans. Ind. Applicat., vol. 32, pp. 509–517, May/June 1996. [2] L. Tolbert, F.-Z. Peng, and T. Habetler, “Multilevel converters for large electric drives,” IEEE Trans. Ind. Applicat., vol. 35, pp. 36–44, Jan./Feb. 1999. [3] A. Nabae, I. Takahashi, and H. Akagi, “A new neutral-point clamped PWM inverter,” IEEE Trans. Ind. Applicat., vol. IA-17, pp. 518–523, Sept./Oct. 1981. [4] T. A. Meynard and H. Foch, “Multi-level choppers for high voltage applications,” Eur. Power Electron. Drives J., vol. 2, no. 1, p. 41, Mar.1992. [5] P. Hammond, “A new approach to enhance power quality for medium voltage ac drives,” IEEE Trans. Ind. Applicat., vol. 33, pp. 202–208, Jan./Feb. 1997. [6] Qiang, S. and L. Wenhua,‟ Control of a cascade statcom with star configuration under unbalanced conditions‟. IEEE T. Power Electr., 24(1): 45-58, 2009. [7] José, R., L. Jih-Sheng and Z.P. Fang, „Multilevel inverters: A survey of topologies, controls and applications‟. IEEE T. Power Electr., 49(4): 724-738. 2002. [8] Hagiwara, M., K. Nishimura and H. Akagi, A medium-voltage motor drive with a modular multilevel PWM inverter. IEEE T. Power Electr., 25(7): 1786-1799, 2010. [9] S. Manasa, S. Balajiramakrishna, S. Madhura and H. M Mohan, “Design and Simulation of three Phase five level and seven level inverter fed induction motor drive with two cascaded H-bridge configuration” International Journal of electrical and electronics Engineering (IJEEE), ISSN(Print): 2231-5284 Vol-1 Iss-4, 2012. APPENDIX FIG.8 LOGIC FIRING SIGNALS function [ga1,ga2,gb1,gb2,gc1,gc2]= fcn(SIN,SIN1,SIN2,T1,T2) if (SIN >T1) ga1=1; else ga1=0; end if (SIN >T2) ga2=1; else ga2=0; end %Phase b programme %SIN1=(SIN-2*pi/3); if (SIN1 >T1) gb1=1; 0 5 10 15 20 25 30 35 40 45 50 0 200 400 600 800 1000 1200 1400 1600 1800 Numberofcomponentcount Numberofthree-phasecomponentcount Diode Flying Cascaded Improved
  • 12. Design And Simulation Of Three-Phase Diode Clamped And Improved Inverter Fed Asynchronous Motor Drive International organization of Scientific Research 35 | P a g e else gb1=0; end if (SIN1 >T2) gb2=1; else gb2=0; end % phase c programme %SIN2=(SIN-4*pi/3); if (SIN2 >T1) gc1=1; else gc1=0; end if (SIN2 >T2) gc2=1; else gc2=0; end FIG.10a SIMULATION RESULT x=Xout; T=x(:,1); figure(1) subplot(3,3,1) plot(T,x(:,2),'r') xlabel('Time (secs)') ylabel('Rotor Current Ir_a(A)') title('Graph of Phase A Rotor Current') grid on subplot(3,3,2) plot(T,x(:,5),'r') xlabel('Time(secs)') ylabel('Stator current Is_a(A)') title('Graph of Phase A Stator current') grid on subplot(3,3,3) plot(T,x(:,8),'k','linewidth',2.0) xlabel('Time (secs)') ylabel('Rotor Speed(rpm)') title('Graph of Rotor Speed') grid on subplot(3,3,4) plot(T,x(:,3),'b') xlabel('Time (secs)') ylabel('Rotor Current Ir_b(A)') title('Graph of Phase B Rotor Current') grid on subplot(3,3,5) plot(T,x(:,6),'b') xlabel('Time (secs)') ylabel('Stator Current Is_b(A)') title('Graph of Phase B Stator Current') grid on subplot(3,3,6) plot(T,x(:,9),'k','LineWidth',2.0') xlabel('Time(secs)') ylabel('Torque (N-m)') title('Graph of Electromagnetic Torque(N.m)') grid on subplot(3,3,7) plot(T,x(:,4),'m') xlabel('Time (secs)') ylabel('Rotor current Ir_c(A)') title('Graph of Phase C Rotor current') grid on subplot(3,3,8) plot(T,x(:,7),'m') xlabel('Time(secs)') ylabel('Stator Current Is_c(A)') title('Graph of Phase C Stator Current(A)') grid on subplot(3,3,9) plot(T,x(:,10),':r','linewidth',2) xlabel('Time(secs)') ylabel('Motor Input Voltages(V)') title('Graph of Inverter Output Voltages') grid on hold on plot(T,x(:,11),'-.b','linewidth',2) hold on plot(T,x(:,12),'m','linewidth',2) Legend('Va','Vb','Vc') figure(2) plot(x(:,8),x(:,9),'r','linewidth',1) xlabel('Rotor Speed (RPM)') ylabel('Torque (Nm)') title('Graph of Torque versus Rotor-Speed') grid on