3. DIT
Digital Encoding
In a digital communication system, the first step is to convert the
information into a bit stream of ones and zeros. Then the bit stream
has to be represented as an electrical signal.
The electrical signal representation has to be chosen carefully for
the following reasons:
The electrical representation decides the bandwidth requirement.
The electrical representation helps in clocking— the beginning and
ending of each bit.
Error detection can be built into the signal representation.
Noise immunity can be increased by a good electrical
representation.
The complexity of the decoder can be decreased.
The encoding scheme should be chosen keeping in view.
bandwidth requirement, clocking, error detection capability, noise
immunity, and complexity of the decoder.
4. DIT
Signaling Format
Signaling format can be divided into the following categories:
Unipolar nonreturn-to-zero (NRZ) signaling
Symbol 1 is represented by transmitting a pulse of constant amplitude for the entire
duration of the bit interval, and symbol 0 is represented by no pulse.
Bipolar nonreturn-to-zero (NRZ) signaling
Symbol 1 and 0 are represented by pulses of equal positive and negative
amplitudes.
Unipolar return-to-zero (RZ) signaling
Symbol 1 is represented by a positive pulse that returns to zero before the end of
the bit interval, and symbol 0 is represented by the absence of pulse.
Bipolar return-to-zero (RZ) signaling
Positive and negative pulses of equal amplitude are used for symbol 1 and 0,
respectively. In either case, the pulse return to 0 before the end of the bit interval.
Alternate Mark Inversion (AMI) RZ signaling
Positive and negative pulses are used for symbol 1, and no pulse is used for
symbol 0.
Manchester Encoding
Symbol 1 is represented by a positive pulse followed by a negative pulse, with both
pulses being of equal amplitude and half-bit duration; for symbol 0, the polarities of
these are reversed.
6. DIT
Introduction to Digital Modulation
Digital modulation is the process by which digital symbols are
transformed into waveforms that are compatible with the
characteristics of the channel.
In the case of base-band modulation, these waveforms usually takes
the form of shaped pulses.
In the case of band-pass modulation the shaped pulses modulate a
sinusoid called a carrier wave, or simply a carrier; for radio
transmission the carrier is converted to an electromagnetic (EM) field
for propagation to the desired destination.
Band-pass signal can transmit more than one signal on a single
channel by assigning different frequencies to different signals.
8. DIT
Digital Modulation Techniques
Digital modulation technique used to transmit binary
data over a band-pass communication channel with
fixed frequency limits set by the channel.
The notions involved in the generation of digital-
modulated waves are basically the same as those
described for analog-modulated waves.
With a binary modulation technique, the modulation
process corresponds to switching or keying the
amplitude, frequency, or phase of the carrier
between either of two possible values corresponding
to binary symbol 0 and 1.
This results in three basic signaling techniques,
namely, amplitude-shift keying (ASK), frequency-
shift keying (FSK), and phase-shift keying (PSK).
9. DIT
ASK, PSK, and FSK
Amplitude Shift Keying (ASK)
Phase Shift Keying (PSK)
Frequency Shift Keying
=
=
==
)"0("0)(0
)"1(")()2cos(
)2cos()(
2
)(
2
b
bbcT
E
c
b nTb
EnTbtf
tftb
T
ts b
b
π
π
−=
=
=
bbT
E
bbT
E
EnTbtf
EnTbtf
ts
b
b
b
b
)()2cos(
)()2cos(
)(
2
2
1
2
π
π
1 0 1 1
1 0 1 1
1 0 1 1
b(t)
b(t)
−=+
=
==
)"0(")()2cos(
)"1(")()2cos(
)2cos()(
2
)( 2
2
bbcT
E
bbcT
E
c
b EnTbtf
EnTbtf
tftb
T
ts
b
b
b
b
ππ
π
π
10. DIT
Binary Phase-Shift Keying (PSK)
In a coherent binary PSK system, the pair of signals s1(t) and s2(t)
used to represent binary symbols 1 and 0, respectively, is defined
by
where and Eb is the transmitted signal energy per bit.
in the case of binary PSK, there is only one basis function of unit
energy, namely,
Then we may express the transmitted signals s1(t) and s2(t) in terms
of as follows:
and
bTt ≤≤0
( )t1φ
11. DIT
Generation of Coherent Binary PSK Signals
To generate a binary PSK signal, we represent the input binary
sequence in polar form with symbols 1 and 0 represented by
constant amplitude levels of and respectively.
The resulting binary wave and a sinusoidal carrier , are applied
to a product modulator.
The carrier and the timing pulses used to generate the binary wave
are usually extracted from a common master clock. The desired
PSK wave is obtained at the modulator output.
bE−bE+
( )t1φ
12. DIT
Detection of Coherent Binary PSK Signals
To detect the original binary sequence of Is and Os, we apply the
noisy PSK signal x(t) (at the channel output) to a correlator, which is
also supplied with a locally generated coherent reference signal
The correlator output, x1,is compared with a threshold of zero volts.
If x1 > 0, the receiver decides in favor of symbol 1. On the other
hand, if x1 < 0, it decides in favor of symbol 0. If x1 is exactly zero, the
receiver makes a random guess in favor of 0 or 1.
( )t1φ
13. DIT
Binary Frequency-shift Keying (FSK)
In a binary FSK system, symbols 1 and 0 are distinguished from
each other by transmitting one of two sinusoidal waves that differ in
frequency by a fixed amount. A typical pair of sinusoidal waves is
described by
where i = 1,2, and Eb is the transmitted signal energy per bit
Thus symbol 1 is represented by s1(t) and symbol 0 by s2(t).
We therefore deduce that the most useful form for the set of
orthonormal basis functions is
Thus, unlike coherent binary PSK, a coherent binary FSK system is
characterized by having a signal space that is two-dimensional. The
two message point are:
and
14. DIT
Generation of Coherent Binary FSK Signals
To generate a binary FSK signal, the incoming binary data sequence is first
applied to an on-off level encoder, at the output of which symbol 1 is
represented by a constant amplitude of volts and symbol 0 is represented
by zero volts.
When we have symbol 1 at the input, the oscillator with frequency f1 in the
upper channel is switched on while the oscillator with frequency f2 in the lower
channel is switched off, with the result that frequency f1 is transmitted.
For symbol 0 at the input, the oscillator in the upper channel is switched off and
the oscillator in the lower channel is switched on, with the result that frequency
f2 is transmitted.
bE
15. DIT
Detection of Coherent Binary FSK Signals
To detect the original binary sequence given the noisy received
signal x(t), we may use the receiver which consists of two
correlators with a common input, which are supplied with locally
generated coherent reference signals and
The correlator outputs are then subtracted, one from the other, and
the resulting difference y, is compared with a threshold of zero volts.
If y > 0, the receiver decides in favor of 1. On the other hand, if y <
0, it decides in favor of 0. If y is exactly zero, the receiver makes a
random guess in favor of 1 or 0.
( )t1φ ( )t2φ
16. DIT
Generation and Detection of Coherent ASK Signals
To generate an ASK wave, we apply the incoming binary data (represented
in unipolar form) and the sinusoidal carrier to a product modulator. The
resulting output provides the desired ASK wave.
( )tf
T
E
c
b
b
π2cos
2
17. DIT
QuadriPhase Shift Keying (QPSK)
The provision of reliable performance, exemplified by a very low probability of
error, is one important goal in the design of a digital communication system.
Another important goal is the efficient utilization of channel bandwidth.
The coherent QPSK is an example of the efficient utilization of channel
bandwidth.
In quadriphase-shift keying (QPSK), as with binary PSK, information carried by
the transmitted signal is contained in the phase. In particular, the phase of the
carrier takes on one of four equally spaced values, such as π/4, 3π/4, 5π/4,
and 7π/4. its transmitted signal is
where i = 1, 2, 3, 4; E is the transmitted signal energy per symbol, and T is the
symbol duration. Each possible value of the phase corresponds to a unique
dibit. Thus, for example, we may choose the foregoing set of phase values to
represent the Gray-encoded set of dibits: 10,00,01, and 11, where only a single
bit is changed from one dibit to the next.
18. DIT
Signal-Space of QPSK
We redefine the transmitted signal si(t) for the interval in the
equivalent form:
where i = 1,2,3,4. we can make the following observations:
There are two orthonormal basis functions, Ф1(t) and Ф2(t) contained
in the expansion of si(t).
There are four message points, and the associated signal vectors
are defined by
Tt ≤≤0
20. DIT
Generation of Coherent QPSK Signals
The incoming binary data sequence is first transformed into polar
form by a nonreturn-to-zero level encoder. Thus, symbols 1 and 0
are represented by and respectively.
This binary wave is next divided by means of a demultiplexer into
two separate binary waves consisting of the odd- and even
numbered input bits.
bE+ bE−
21. DIT
Detection of Coherent QPSK Signals
The QPSK receiver consists of a pair of correlators with a common input
and supplied with a locally generated pair of coherent reference signals Ф1(t)
and Ф2(t).
The correlator outputs x1 and x2, produced in response to the received signal
x(t), are each compared with a threshold of zero.
Finally, these two binary sequences at the in-phase and quadrature channel
outputs are combined in a multiplexer to reproduce the original binary
sequence at the transmitter input with the minimum probability of symbol
error in an AWGN channel.
22. 8-PSK Transmitter
With 8-PSK, three bits are encoded, forming tribits and producing
eight different output phases. With 8-PSK, n=3, M=8, and there
are eight possible output phases.
The incoming serial bit stream enters the bit splitter, where it is
converted to a parallel, three channel output (the I or in-phase
channel, the Q or in-quadrature channel, and the C or control
channel.
The bit rate in each of the three channel is fb/3.
The bits in the I and C channels enter the I channel 2-to-4-level
converter, and the bits in the Q and channels enter the Q
channel 2-to-4-level converter. Essentially, the 2-to-4-level
converters are parallel-input Digital-to-Analog Converters (DAC).
With two input bits, four output voltages are possible.
I-channel and Q-channel truth tables are as follows:
C
I C Output
0 0
0 1
1 0
1 1
-0.541 V
-1.307 V
+0.541 V
+1.307V
CQ Output
0 0
0 1
1 0
1 1
-1.307 V
-0.541 V
+1.307 V
+0.541 V
24. 8-PSK Receiver
The power splitter directs the input 8-PSK signal to the I and Q
product detectors and the carrier recovery circuit.
The carrier recovery circuit reproduces the original reference
oscillator signal.
The incoming 8-PSK signal is mixed with the recovered carrier
in the I product detector and with a quadrature carrier in the Q
product detector.
The output of the product detectors are 4-level PAM signals that
are fed to the 4-to-2 level Analog-to-Digital Converters (ADCs).
The outputs from the Q channel 4-to-2-level converter are the I
and C bits, whereas the outputs from the Q channel 4-to-2-level
converter are the Q and bits.
The parallel-to-serial logic circuit converts the I/C and Q/ bit
pairs to serial I, Q, and C output data streams.
C
C
26. Quadrature Amplitude Modulation (QAM)
8-QAM is an M-ary encoding technique where
M=8. Unlike 8-PSK, the output signal from an 8-
QAM modulator is not a constant-amplitude signal.
Only difference between the 8-QAM transmitter
and the 8-PSK transmitter is the omission of the
inverter between the C channel and the Q product
modulator.
The incoming data are divided into groups of three
bits (tribits): the I, Q, and C bit streams, each with a
bit rate equal to 1/3 of the incoming data rate.
The I and Q bits determine the polarity of the PAM
signal at the output of the 2-to-4-level converters,
and the C channel determines the magnitude.
Because the C bit is fed uninverted to both the I and
the Q channel 2-to-4-level converters, the
magnitudes of the I and Q PAM signal are always
equal.
Their polarities depend on the logic condition of the
I and Q bits, therefore, may be different.
I/Q C Output
0 0
0 1
1 0
1 1
-0.541 V
-1.307 V
+0.541 V
+1.307V
8-QAM Truth Table
2-4 level converter
8-QAM Truth Table
and phase
Binary
input
8-QAM output
Q I C Amplitude Phase
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
0.765 V -135o
1.848 V -135o
0.765 V -45o
1.848 V -45o
0.765 V +135o
1.848 V +135o
0.765 V +45o
1.848 V +45o
28. 8-QAM Receiver
An 8-QAM receiver is almost identical to the 8-PSK
receiver.
The differences are the PAM levels at the output of the
product detectors and the binary signals at the output
of the Analog-to-Digital Converters.
Because there are two transmit amplitudes possible
with 8-QAM that are different from those achievable
with 8-PSK, the four demodulated PAM levels in 8-
QAM are different from those in 8-PSK.
Therefore the conversion factor for the Analog-to-
Digital Converters must also be different.
With 8-QAM the binary output signals from the I
channel ADC are the I and C bits, and the binary
output signals from the Q channel ADC are the Q and
C bits.
29. 16-QAM
16-QAM is an M-ary system where M=16. The input data are acted in
groups of four (24
=16). As with 8-QAM, both the phase and the amplitude
of the transmit carrier are varied.
The input binary data are divided into four channels: I, I’
, Q, and Q’
. The
bit rate in each channel is fb/4 of the input bit rate.
The I channel, Q channel and 16-QAM Modulator truth tables:
I I’ Output
0 0
0 1
1 0
1 1
-0.22 V
-0.821 V
+0.22 V
+0.821 V
Q Q’ Output
0 0
0 1
1 0
1 1
-0.22 V
-0.821 V
+0.22 V
+0.821 V
Binary input 16-QAM output
Q Q’
I I’
0 0 0 0
0 0 0 1
0 0 1 0
0 0 1 1
0 1 0 0
0 1 0 1
0 1 1 0
0 1 1 1
1 0 0 0
1 0 0 1
1 0 1 0
1 0 1 1
1 1 0 0
1 1 0 1
1 1 1 0
1 1 1 0
0.311 V -135o
0.850 V -165o
0.311 V -45o
0.850 V -15o
0.850 V -105o
1.161 V -135o
0.850 V -75o
1.161 V -45o
0.311 V +135o
0.850 V +165o
0.311 V +45o
0.850 V +15o
0.850 V +105o
1.161 V +135o
0.850 V +75o
1.161 V +45o
31. DIT
Baud and Minimum Bandwidth
Baud is a term that is often misunderstood and
commonly confused with bit rate (bps)
Bit rate is the rate of change of a digital information
signal, which is usually binary.
Baud is the rate of change of a signal on the
transmission medium after encoding and modulation
have occurred.
Baud is a unit of transmission rate, modulation rate, or
symbol rate and therefore, the terms symbols per
second and baud are often used interchangeably.
Mathematically, baud is the reciprocal of the time of
one output signaling element, and a signaling element
may represent several information bits.
32. DIT
Probability of Error and Bit Error Rate
Probability of Error P(e) and Bit error Rate (BER) are
often used interchangeably, although in practice they
do have slightly different meanings.
P(e) is a theoretical (mathematical) expectation of the
bit error rate for a given system, OR P(e) is the
probability of the detector making an incorrect
decision.
BER is an empirical (historical) record of a system’s
actual bit error performance.
For example, if a system has a P(e) of 10-5
, this
means that mathematically you can expect one bit
error in every 100,000 bits transmitted (1/10-5
=
1/100,000). If a system has a BER of 10-5
, this means
that in past performance there was one bit error for
every 100,000 bits transmitted.
33. DIT
Probability of Error and Bit Error Rate (2)
Probability of error is a function of the carrier-to-noise power ratio
(or, the average energy per bit-to-noise power density ratio) and
the number of possible encoding conditions used.
Carrier-to-noise power ratio is the ratio of the average carrier
power to the thermal noise power.
C(dBm)=10log(C(watts)/0.001)
Thermal noise power is expressed mathematically as
N = KTB (watts)
where, N = thermal noise power (watts)
K = Boltzman’s proportionality constant (1.38X10-23
J/K)
T = temperature (kelvin)
B = Bandwidth (hertz)
Mathematically, the carrier-to-noise power ratio is
C/N = C/KTB (unitless ratio) or C/N (dB) = 10log(C/N) = C(dBm)-N(dBm)
34. DIT
Probability of Error and Bit Error Rate (3)
Energy per bit is the energy of a single bit of information
Eb = CTb (J/bit) or Eb = C/fb (J/bit)
where, Eb = energy of a single bit (joules per bit)
Tb = time of a single bit (seconds)
C = carrier power (watts)
Noise power density is the thermal noise power normalized to a
1-Hz bandwidth. Mathematically, noise power density is given by
No = N/B (W/Hz) or No = KTB/B = KT (W/Hz)
The energy per bit-to-noise power density ratio is given by
Eb/ No = (C/fb)/(N/B) = (C/N) X (B/fb) or Eb/ No(dB) = 10log(C/N)-10log(B/fb)
where, Eb/ No = energy per bit-to-noise power density ratio
C/N = carrier-to-noise power ratio
B/fb = noise bandwidth-to-bit rate ratio
35. DIT
Error Performance
Error Probability of Binary PSK is given by
Error Probability of QPSK is given by
Error Probability of coherent binary FSK is
given by
36. DIT
Error Performance (2)
Error Probability of noncoherent binary FSK is given by
Error Probability of coherent binary ASK is given by
Error Probability of noncoherent binary ASK is given by
Error Probability for M-QAM, where M=2k
and k is even
=
o
b
N
E
erfcPe
2
1
2
1
−=
o
b
N
E
Pe
4
exp
2
1
−=
o
b
N
E
Pe
2
exp
2
1
( )
−
−
=
−
No
E
L
LLog
Q
LLog
L
P b
e
2
1
312
2
2
2
1
ML =
37. DIT
Goals of the designer to Digital Communications
To maximize transmission bit rate, R.
To minimize probability of error, Pe.
To minimize required power or equivalently, to
minimize required bit energy to noise power
spectral density Eb/No.
To minimize required system bandwidth, W.
To maximize system utilization, that is to provide
reliable service for a maximum number of users
with minimum delay and with maximum resistance
to interference.
To minimize system complexity, computational
load, and system cost.
For the demodulation of a binary PSK we use a coherent detector, the detector consists of three basic components:
A multiplier (i.e. product modulator), supplied with a locally generated version of the sinusoid carrier.
An integrator that operates on the multiplier output for successive bit intervals; this integrator performs a low-pass filtering action
A decision device that compares the integrator output with a preset threshold; it makes a decision in favor of symbol 1 if the threshold is exceeded, and in favor of symbol 0 otherwise