its a proper ppt with subject coa

1. MODULE -1

2. CONTENTSCONTENTS
1.1 Basic structure of computers
1.2 Machine Instructions and programs:
Memory Locations and addresses
1.3 Memory Operations
1.4 Instructions and Instruction Sequencing
1.5 Addressing Modes
1.6 Basic Input Output Operations
1.7 Subroutines.

3. Module 1 : Introduction Slide 3
1.1 BASIC STRUCTURE OF1.1 BASIC STRUCTURE OF
COMPUTERCOMPUTER

4. 1.1.1 Computer Types
1.1.2 Software
1.1.3 Functional Units
1.1.4 Basic Operational Concepts
1.1.5 Bus structures
1.1.6 Performance
1.1 BASIC STRUCTURE OF
COMPUTER

5. What is a Computer ?What is a Computer ?
• Digital Computer is a fast
electronic calculating machine that
– accepts digitized input information,
– processes it according to a list of
internally stored instructions,
– and produces the resulting output
information.
• It executes four basic operation
[IPOS]
• input
• processing
• output
• storage

6. IPOS cycleIPOS cycle
IPOS : Input, Processing, Output, Storage

7. • Computer organization refers to the operational
units and their interconnections that realize the
architectural specifications.
• Examples of architectural attributes include the
instruction set, the no: of bits used to represent
various data types, I/O mechanisms, and
techniques for addressing memory.
Computer Organization

8. Types of Computers
• They differ widely in Size, Cost, Computational
Power and intended Use
1. Personal Computer/ Desktop computers
2. Portable Notebook Computers
3. Work Stations
4. Enterprise System Servers / mainframes
5. Super Computers

9. Types of Computers
Personal Computer/
Desktop computers
• Processing and storage units.
• Visual display and audio output
units. Keyboard.
• intended for individual users
for their word processing and
other small application
requirements.

10. Types of Computers
Portable Notebook
Computers
• Compact version of
Desktop computers
• small personal computer
designed for portability
• All units packed into a
thin brief case unit.
• Laptops are also called
notebooks, ultrabooks
or netbooks.

11. Types of Computers
Workstations
• Personal computer designed for
technical or scientific
applications. High resolution
graphics input/output
capability.
• More computational power
than PC
• Workstations are used for tasks
such as computer-aided design,
drafting and modeling,
computation-intensive
scientific and engineering
calculations, image processing

12. Types of Computers
Work stations
• Used for problems which are limited
by data movement in I/O devices.
• Designed to handle very high
volume input and output and
emphasize throughput computing.
• Contains sizable database storage
units.
• More emphasize on extensive data
movement.
• Capable of handling large volume of
request.
• Measured in MIPS (Million of
instructions per second)
• Integer operations – eg: data
movement
Enterprise System Servers /
mainframes

13. Types of Computers
Super Computers
• Used for the large scale
numerical calculations
required for
– Weather forecasting
– Aircraft design
– Simulation
• Multiple processors
contributes to this
functionality.
• Measured in FLOPS (Floating
point operations per second)

14. Types of ComputersTypes of Computers
• Multiprocessor computer
– Execute a number of different application tasks in parallel
– Execute subtasks of a single large task in parallel
– All processors have access to all of the memory : shared-memory
multiprocessor
– Cost is increased because of the need for more complex
interconnection networks
• Multicomputers
– Interconnected group of complete computers to achieve high
computational power.
– Each computer only have access only to its own memory
– Exchange messages via a communication network – message-
passing multicomputers

15. 1.1.2 Computer Systems1.1.2 Computer Systems
• Hardware
– Physical component of computer such as
mechanical & electronic circuit which can be
touched
• Software
– Program which instructs computer to do something
– Consist from bunch of programming, algorithm and
instruction set which can’t be touched

16. 1.1.2 Computer Software1.1.2 Computer Software
• System software:
– All program related to computer operation coordination
– It is a collection of programs that are executed as needed to
perform functions such as:
• Receiving and interpreting user commands
• Entering and editing application programs and storing them as files in
secondary storage; Running standard application programs
• Managing the storage and retrieval of files in secondary storage.
• Controlling i/o unit to receive input and produce output.
• Translating programs from source form to machine instructions.
– Eg Operating System- Windows ,Mac OS, Unix, Linux, MS Dos
• Compiler, interpreter
• Application software
– Program that direct computer to do specific task
• text processing (Microsoft Word), mathematical operation (Microsoft
Excel), database management.

17. Personal Computer HardwarePersonal Computer Hardware
• Component inside microcomputer system

18. • A computer consists of 5 functionally independent main parts:
• Input
• Memory
• Arithmetic and Logic Unit
• Output Unit
• Control Unit
• The input unit accepts coded information from human operators,
from electromechanical devices such as keyboards, or from other
computers over digital communication lines.
• The information received is either stored in the computer’s
memory for later reference or immediately used by the arithmetic
and logic circuitry to perform the desired operations. The
processing steps are determined by a program stored in the
memory.
• Finally , the results are sent back to the out side world through
the output unit.
1.1.3. Functional Units of a Computer

19. I/O Processor
Output Unit
Memory
Unit
Input Unit and
Arithmetic
Logic unit
Control
Unit
1.1.3. Functional Units of a ComputerBasic functional units of a computer.

20. 1.1.3.1. Input Unit
 Device for entering information into a computer .
 The data entered in high level language is converted to the
machine level language
 Some Input Devices
Keyboard
Mouse
Joystick
Touch screen
Digitizers and pen-based (stylus) systems

21. 1.1.3.2. Output Unit
 An output device is any piece of computer hardware equipment used to
communicate the outputs to the outside world.
 Outputs are the signals or data sent by the system to the outside
 The data in the machine level language is converted to the high level
language
 Some common output devices
 Visual display unit – (also called VDU, monitor, or screen) offers a
two-dimensional visual presentation of information.
 Speaker - A speaker can be used for various sounds meant to alert
the user, as well as music and spoken text.
 Printer - Printers produce a permanent hard copy of the information
on paper.

22. 1.1.3.3 Memory Unit
• Stores programs and data
• Two classes of storage
– Primary storage
• Fast memory; Programs must be stored in memory while they are
being executed; expensive
• Memory contains a large number of semiconductor storage cells,
each capable of storing one bit of information.
• Processed in words( 16 to 64 bits), not as individual cells
• Distinct Address is associated with each word for accessing any
word.
• RAM
• memory access time- time required to access one word
– Secondary storage
• larger and cheaper ; Magnetic Tape Storage
• Optical disk; Magneto-optical , CD-ROM ,CD-R, CD-RW, DVD-
ROM

23. 1.1.3.3 Measure storage capacity1.1.3.3 Measure storage capacity
KB – kilobyte
– 1024 byte
– diskette
– Cache memory
MB – megabyte
– million byte
– RAM
GB – gigabyte
• Billion bytes
• Hard disk
• CDs and DVDs
TB – terabytes
• Trillion bytes
• Large hard disk
• Petabyte
• Exabyte
• Zettabyte
• Yottabyte

24. Inside the Processor

25. 1.1.3.4. Arithmetic and Logic Unit1.1.3.4. Arithmetic and Logic Unit
• Most computer operations are executed in
ALU of the processor.
– Load the operands into memory – bring them to the
processor – perform operation in ALU – store the
result back to memory or retain in the processor.
• processes the data in the registers according to
instructions issued by the control unit.
• Performs arithmetic (addition, subtraction,
etc..) and logical (comparison) operations

26. Arithmetic OperationArithmetic Operation
• Addition
• Subtraction
• Multiplication
• Division

27. Logical OperationLogical Operation
• Evaluate condition
• Compare
• Can compare
– Numbers
– Characters
– Specialized character

28. 1.1.3.5. Control Unit1.1.3.5. Control Unit.
• It is the nerve center that sends control signals to other
units and senses their states.
• It sends the timing signals, which determines when a given
action is to be carried out, that govern the I/O transfers are
also generated by the control unit.
• It controls the data transfer between processor and memory.
• Control unit is physically distributed (wires) throughout the
machine instead of standing alone.

29. Operation of a Computer
Accept information in the form of programs and data through
an input unit and store it in the memory
Fetch the information stored in the memory, under program
control, into an ALU, where the information is processed
Output the processed information through an output unit
Control all activities inside the machine through a control
unit

30. • The activity in a computer is governed by
instructions.
• To perform a task, an appropriate program
consisting of a list of instructions is stored in
the memory.
• Individual instructions are brought from the
memory into the processor, which executes the
specified operations. Data to be used as
operands are also stored in the memory.
1.1.4. Basic Operational Concepts1.1.4. Basic Operational Concepts

31. 31
Basic Operational Concepts
P1 P2
P3 P4
Hard
disk
Main Memory
P3
P3 data
loads
Processor
Each
Instructions
Data
stores
stores

32. 1.1.4. Basic Operational Concepts1.1.4. Basic Operational Concepts
• Consider a typical instruction:
– Add LOCA, R0
• Add the operand at memory location LOCA to
the operand in a register R0 in the processor.
• Place the sum into register R0.
• The original contents of LOCA are preserved.
The original contents of R0 is overwritten.
– Instruction is fetched from the memory into the processor –
the operand at LOCA is fetched and added to the contents
of R0 – the resulting sum is stored in register R0.

33. • Transfers between the memory and the
processor are started by sending the address of
the memory location to be accessed to the
memory unit and issuing the appropriate
control signals.
• The data are then transferred to or from the
memory.
1.1.4. Basic Operational Concepts

34. Connection Between the Processor andConnection Between the Processor and
the Memorythe Memory

35. Module 1 : Introduction Slide 35
• The processor contains
– ALU unit
– Control unit
– Registers
– Instruction register (IR) - stores the instruction currently being executed or
decoded
– Program counter (PC) - contains the address (location) of the instruction being
executed at the current time. After each instruction is fetched, the PC points to the
next instruction in the sequence. When the computer restarts or is reset, the PC
normally reverts to 0.
– General-purpose register (R0 – Rn-1) - can store both data and addresses
– Memory address register (MAR) - is a CPU register that either stores the
memory address from which data will be fetched to the CPU or the address to
which data will be sent and stored.
– Memory data register (MDR) - Used to temporarily store data read from or
written to memory.
• MAR & MDR facilitate the communication with the memory.
• MAR holds the address of the location to be accessed
• MDR contains the data to be written into or read out of the addressed location

36. Module 1 : Introduction Slide 36
• Typical Operating Steps :– fetch-decode-execute cycle
 Programs reside in the memory through input devices
 PC is set to point to the first instruction
 The contents of PC are transferred to MAR
 A Read signal is sent to the memory
 The first instruction is read out and loaded into MDR
 The contents of MDR are transferred to IR
 Decode and execute the instruction
 Get the required operands for ALU
 General-purpose register
 Memory (address to MAR – Read – MDR to ALU)
 Perform the operation in ALU
 Store the result back
 To general-purpose register
 To memory (address to MAR, result to MDR – Write)
 During the execution, PC is incremented to the next instruction

37. Module 1 : Introduction Slide 37
• Interrupt
– Normal execution of programs may be pre-empted
if some device requires urgent servicing.
– The normal execution of the current program must
be interrupted – the device raises an interrupt
signal.
– Processor provides the requested service by
executing interrupt-service routine
– Current system information is backup and restore
(PC, general-purpose registers, control information,
specific information)
– After completing ISR, the state of the processor is
restored.

38. Module 1 : Introduction Slide 38
Bus Structures
• There are many ways to connect different
parts inside a computer together.
• A group of lines (wires or copper tracks)
that serves as a connecting path for several
devices is called a bus.
• 3 types: Address bus, data bus, control
bus.
• the simplest way to interconnect
functional units is to use a single bus.

39. 1.1.5. Bus Structures1.1.5. Bus Structures
• Single-bus
• All units are connected to this bus.
• Since the bus can be used for only one transfer at a time,
only two units can actively use the bus at any given time.
• Bus control lines are used to arbitrate multiple requests for
use of the bus.

40. Bus Structures - Speed
• Different devices have different transfer/operate speed.
• If the speed of bus is bounded by the slowest device
connected to it, the efficiency will be very low.
• How to solve this?
– A common approach – use buffers.
– Eg: - Printer
– The processor sends the character over the bus to
the printer buffer.
– Once the buffer is loaded, the printer cab start
printing without further intervention by the
processor.
Bus Structures

41. Depends on design of
Compiler
Performance
• Performance – how quickly it can execute programs.
Depends on design of
H/W and its machine
language instructions.
• Elapsed time - -Depends on all units of the Processor
• Processor time -Depends on the H/W involved in the
execution of individual instructions.
– Implementation of Cache memory speeds up the processor time.
is the duration from when the process was
started until the time it terminated
is the time that the CPU spent
on computing the process.

42. Processor Clock
• Processor circuits are controlled by a timing signal
called a clock.
• The clock defines the regular time intervals called
clock cycles.
• Clock rate (frequency) – Hertz (Hz), Cycles per second
• Clock rate vs Performance

43. Performance Equation
• If the clock rate is R cycles per second,
the program execution time is
T= (N x S) / R
N->no: of instruction executions,
S->Average number of steps needed to execute one machine instruction
– This equation is referred to as basic performance
equation

44. 1.2. Machine Instructions and1.2. Machine Instructions and
ProgramsPrograms

45. • All computers deal with numbers.
• They have instructions that perform basic
arithmetic operations on data operands.
• Computers are built using logic circuits
that operate on information represented by
two valued electrical signals.

46. 1.2.1. Number, Arithmetic Operations,1.2.1. Number, Arithmetic Operations,
and Charactersand Characters
1.2.1.1 Number Representation
1.2.1.2 Addition of Positive Numbers
1.2.1.3 Addition and Subtraction of signed
numbers.

47. Number Representation- UnsignedNumber Representation- Unsigned
IntegerInteger
the number (unsigned Integer) in a binary
system can be interpreted as
0321 aaaaA nnn −−−=
0
0
1
1
2
2
1
1
2222 aaaaA n
n
n
n
++++= −
−
−
−

A number (unsigned Integer) can be
represented as

48. Number Representation- Unsigned Integer
3 major number representations:
Sign and magnitude
One’s complement
Two’s complement
Assumptions:
4-bit machine word
16 different values can be represented
Roughly half are positive, half are negative

49. Sign and Magnitude RepresentationSign and Magnitude Representation
0000
0111
0011
1011
1111
1110
1101
1100
1010
1001
1000
0110
0101
0100
0010
0001
+0
+1
+2
+3
+4
+5
+6
+7-0
-1
-2
-3
-4
-5
-6
-7
0 100 = + 4
1 100 = - 4
+
-
• High order bit is sign:
• 0 = positive , 1 = negative
• Number range for n bits = +/-2n-1
-1
• Two representations for 0

50. One’s Complement RepresentationOne’s Complement Representation
Subtraction implemented by addition & 1's complement
Still two representations of 0! This causes some problems
Some complexities in addition
0000
0111
0011
1011
1111
1110
1101
1100
1010
1001
1000
0110
0101
0100
0010
0001
+0
+1
+2
+3
+4
+5
+6
+7-7
-6
-5
-4
-3
-2
-1
-0
0 100 = + 4
1 011 = - 4
+
-

51. Two’s Complement RepresentationTwo’s Complement Representation
0000
0111
0011
1011
1111
1110
1101
1100
1010
1001
1000
0110
0101
0100
0010
0001
+0
+1
+2
+3
+4
+5
+6
+7-8
-7
-6
-5
-4
-3
-2
-1
0 100 = + 4
1 100 = - 4
+
-
 Only one representation for 0
 One more negative number than positive number
like 1's comp
except shifted
one position
clockwise

52. Binary, Signed-Integer RepresentationsBinary, Signed-Integer Representations
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
0
0
1
1
0
0
0
0
1
1
0
0
1
1
1
0
1
0
1
0
1
0
0
1
0
1
0
1
0
1
1+
1-
2+
3+
4+
5+
6+
7+
2-
3-
4-
5-
6-
7-
8-
0+
0-
1+
2+
3+
4+
5+
6+
7+
0+
7-
6-
5-
4-
3-
2-
1-
0-
1+
2+
3+
4+
5+
6+
7+
0+
7-
6-
5-
4-
3-
2-
1-
b3 b2b1b0
Sign and
magnitude 1' s complement 2' s complement
B Values represented

54. 1.2.1.2 Addition of Positive Numbers1.2.1.2 Addition of Positive Numbers
Figure 2.2. Addition of 1-bit numbers.
Carry-out
1
1
+
011
0
1+
0
0
0
+
1
0
1
+

55. 1.2.1.3 Addition and Subtraction – Sign Magnitude1.2.1.3 Addition and Subtraction – Sign Magnitude
4
+ 3
7
0100
0011
0111
-4
+ (-3)
-7
1100
1011
1111
result sign bit is the
same as the operands'
sign
4
- 3
1
0100
1011
0001
-4
+ 3
-1
1100
0011
1001
when signs differ,
operation is subtract,
sign of result depends
on sign of number with
the larger magnitude

56. 1.2.1.3 Addition and Subtraction – 1’s Complement1.2.1.3 Addition and Subtraction – 1’s Complement
4
+ 3
7
0100
0011
0111
-4
+ (-3)
-7
1011
1100
10111
1
1000
4
- 3
1
0100
1100
10000
1
0001
-4
+ 3
-1
1011
0011
1110
End around carry
End around carry

57. 1.2.1.3 Addition and Subtraction – 2’s Complement1.2.1.3 Addition and Subtraction – 2’s Complement
4
+ 3
7
0100
0011
0111
-4
+ (-3)
-7
1100
1101
11001
4
- 3
1
0100
1101
10001
-4
+ 3
-1
1100
0011
1111
If carry-in to the high
order bit =
carry-out then ignore
carry
if carry-in differs from
carry-out then overflow
Simpler addition scheme makes twos complement the most common
choice for integer number systems within digital systems

58. Overflow -Overflow - Add two positive numbers to get a negativeAdd two positive numbers to get a negative
number or two negative numbers to get a positive numbernumber or two negative numbers to get a positive number
5 + 3 = -8 -7 - 2 = +7
0000
0001
0010
0011
1000
0101
0110
0100
1001
1010
1011
1100
1101
0111
1110
1111
+0
+1
+2
+3
+4
+5
+6
+7-8
-7
-6
-5
-4
-3
-2
-1
0000
0001
0010
0011
1000
0101
0110
0100
1001
1010
1011
1100
1101
0111
1110
1111
+0
+1
+2
+3
+4
+5
+6
+7-8
-7
-6
-5
-4
-3
-2
-1

59. OverflowOverflow
• Overflow can occur only when adding 2
numbers that have the same sign.
• The carry out signal from the sign bit position
is not a sufficient indicator of overflow when
adding signed numbers.
• To detect overflow, examine the signs of the 2
summands X & Y and the sign of the result.
When both operands X & Y have the same
sign, an overflow occurs when the sign of S is
not the same as the signs of X & Y.

60. Memory Locations and AddressesMemory Locations and Addresses

61. 1.2.2. Memory Locations and Addresses1.2.2. Memory Locations and Addresses
• Byte Addressability
• Big Endian and Little Endian Assignments
• Word Alignment
• Accessing numbers, Characters, and Character
strings.

62. 1.2.2. Memory Locations &1.2.2. Memory Locations &
AddressesAddresses
Memory consists of many millions of storage cells, each of which can store
1 bit, either 0 or 1.

63. 1.2.2 Memory Locations & Addresses1.2.2 Memory Locations & Addresses

64. 1.2.2. Memory Location & Addresses,1.2.2. Memory Location & Addresses,
• Memory consists of
many millions of
storage cells, each of
which can store 1
bit.
• Data is usually
accessed in n-bit
groups. n is called
word length.
second word
first word
Memory words.
nbits
last word
i th word
•
•
•
•
•
•

65. 1.2.2 Memory Location and Addresses1.2.2 Memory Location and Addresses
• 32-bit word length example
(b) Four characters
charactercharactercharacter character
(a) A signed integer
Sign bit: for positive numbers
for negative numbers
ASCIIASCIIASCIIASCII
32 bits
8 bits 8 bits 8 bits 8 bits
b31 b30 b1 b0
b31 0=
b31 1=
•
•
•

66. 1.2.2. Memory Location and Addresses1.2.2. Memory Location and Addresses
• To retrieve information from memory, either
for one word or one byte (8-bit), addresses for
each location are needed.
• A k-bit address memory has 2k
memory
locations, namely 0 – 2k
-1, called memory
space.
– 24-bit memory: 224
= 16,777,216 = 16M
– 32-bit memory: 232
= 4G
• 1K(kilo)=210
• 1T(tera)=240

67. 1.2.2A Byte Addressability1.2.2A Byte Addressability
• It is not practical to assign distinct addresses to
individual bit locations in the memory.
• The most practical assignment is to have
successive addresses refer to successive byte
locations in the memory – byte-addressable
memory.
• Byte locations have addresses 0, 1, 2, …
• If word length is 32 bits, successive words are
located at addresses 0, 4, 8,…with each word
consisting of 4 bytes.

68. 1.2.2B Big-Endian and Little-Endian1.2.2B Big-Endian and Little-Endian
AssignmentsAssignments
• There are two ways that byte addresses can be
assigned across words.
– Big-Endian – lower byte addresses are used for the
most significant bytes of a word
– Little-Endian – lower byte addresses are used for
the less significant (rightmost bytes) bytes of a
word
– The Intel Architecture uses Little Endian

70. Big-Endian AssignmentsBig-Endian Assignments
• .data
• List BYTE 10, 20, 30, 40, 50, 60
100000
200001
300002
400003
500004
600005
ValueOffset
*note that with byte size data, there is no difference between Big-Endian and
Little-Endian

71. Little-Endian AssignmentsLittle-Endian Assignments
• .data
• List BYTE 10, 20, 30, 40, 50, 60
100000
200001
300002
400003
500004
600005
ValueOffset
*note that with byte size data, there is no difference between Big-Endian
and Little-Endian

72. Big-Endian AssignmentsBig-Endian Assignments
• .data
• List WORD 1020h, 3040h, 5060h
100000
200001
300002
400003
500004
600005
ValueOffset
*note that with word size data, the low-order byte is stored in a higher address

73. Little-Endian AssignmentsLittle-Endian Assignments
• .data
• List WORD 1020h, 3040h, 5060h
200000
100001
400002
300003
600004
500005
ValueOffset
*note that with word size data, the low-order byte is stored in a lower address

74. Big-Endian AssignmentsBig-Endian Assignments
• .data
• List DWORD 10203040h, 50607080h
100000
200001
300002
400003
500004
600005
ValueOffset
*note that with word size data, the low-order byte is stored in a higher address

75. Little-Endian AssignmentsLittle-Endian Assignments
• .data
• List DWORD 10203040h, 50607080h
400000
300001
200002
100003
800004
700005
ValueOffset
*note that with word size data, the low-order byte is stored in a lower address

76. Big-Endian AssignmentsBig-Endian Assignments
• .data
• List DWORD 00000006h
000000
000001
000002
060003
XX0004
XX0005
ValueOffset
*note that with word size data, the low-order byte is stored in a higher address

77. Little-Endian AssignmentsLittle-Endian Assignments
• .data
• List DWORD 00000006h
060000
000001
000002
000003
XX0004
XX0005
ValueOffset
*note that with word size data, the low-order byte is stored in a lower address

78. 1.2.2C. Word alignment1.2.2C. Word alignment
• Words are said to be aligned in memory if they
begin at a byte address that is a multiple of the
number of bytes in a word.
• 16-bit word: word addresses: 0, 2, 4,….
• 32-bit word: word addresses: 0, 4, 8,….
• 64-bit word: word addresses: 0, 8,16,….

79. 1.2.2D. Accessing Numbers, Characters,1.2.2D. Accessing Numbers, Characters,
and Character Stringsand Character Strings
• A number usually occupies one word. It can be
accessed in the memory by specifying its word
address.
• Individual characters can be accessed by their byte
address.
• The beginning of the string is indicated by giving the
address of the byte containing its first character.
– Successive byte locations contain successive characters of
the string.
– Special control character can be used for indicating the end
of the string.

80. 1.3. Memory Operations1.3. Memory Operations

81. 1.3. Memory Operations1.3. Memory Operations
• 2 basic operations involving the memory:
– Load (or Read or Fetch)
• Copy the content of a specific memory location to the
processor. The memory content doesn’t change.
• The processor sends the address of the desired location to the
memory and requests that its contents be read. Memory reads
the data and sends them to the processor.
• Registers can be used
– Store (or Write)
• Transfers an item of information from the processor to a
specific memory location.
• Overwrites the content in memory
• Processor sends address and data
• Registers can be used

82. 1.4. Instruction and Instruction1.4. Instruction and Instruction
SequencingSequencing

83. 1.4. Instruction and Instruction1.4. Instruction and Instruction
SequencingSequencing
• Register Transfer Notation
• Assembly Language Notation
• Basic Instruction Types
• Instruction Execution and Straight-Line
Sequencing
• Branching
• Condition Codes

84. ““Must-Perform” OperationsMust-Perform” Operations
• A computer must have instructions capable of
performing 4 types of operations:
– Data transfers between the memory and the
processor registers
– Arithmetic and logic operations on data
– Program sequencing and control
– I/O transfers

85. Data transfersData transfers
• The possible locations that may be involved in
transferring information from one location to another
are
– memory locations,
– processor registers, or
– registers in the I/O subsystem.
• Most of the time we identify a location by a symbolic
name standing for its hardware binary address:
– Memory Locations: LOC, PLACE, A, VAR2.
– Processor register names: R0, R5, R10, …
– I/O register names: DATAIN, OUTSTATUS

86. 1.4A Register Transfer Notation1.4A Register Transfer Notation
• The contents of a location are denoted by
placing square brackets around the name of the
location.
• Thus the expression,
• R1  [LOC] means that the contents of memory
location LOC are transferred into processor register R1
• R3  [R1]+[R2] means that the sum of the contents of
registers R1 and R2 is transferred into processor register
R3

87. • This type of notation is known as Register
Transfer Notation (RTN).
• A register transfer language is a system for
expressing in symbolic form the
microoperation sequences among the registers
of a digital module.
• The RHS of an RTN expression always
denotes a value, called source, and the LHS is
the name of a location where the value is to be
placed, overwriting the old contents of that

88. 1.4B. Assembly Language Notation1.4B. Assembly Language Notation
• RTN is easy to understand and but cannot be used to
represent machine instructions
• Assembly Language Notation is used to represent
machine instructions and programs which uses
mnemonics.
• We use assembly language format.
• Eg1: Move LOC, R1
– Means R1←[LOC]
– Contents of LOC are unchanged by the execution of this instruction,
but the old contents of R1 are overwritten.
• Eg2: Add R1, R2, R3
– means R3 ←[R1]+[R2]

89. 0-Address Architecture
• No explicit operands in the instruction
• Operands kept on stack in memory
• Instruction removes top N items from stack
• Instruction leaves result on top of stack
• Examples
– push X
– push 7
– pop X
1.4C. Basic Instruction Types1.4C. Basic Instruction Types

90. 1-Address Architecture
• One explicit operand per instruction
• Second operand is implicit
– Always found in hardware register
– Known as accumulator
• Examples
– load X
– add 7
– store X
1.4C. Basic Instruction Types1.4C. Basic Instruction Types

91. 1.4C. Basic Instruction Types1.4C. Basic Instruction Types
• One-address instruction
– A processor register called the accumulator can be
used for storing the second operand.
• Add A [ Acc<- A+ Acc]
• Load A [Acc<-A]
• Add B
• Store C [C<- Acc]
– Here the operand specified in the instruction may be
a source or a destination, depending on the
instruction.

92. 2-Address Architecture
• Two explicit operands per instruction
• Result overwrites one of the operands
• Operands known as source and destination
• Works well for instructions such as memory
copy
• Example
– Add 7, X
• Computes X ← X + 7
1.4C. Basic Instruction Types1.4C. Basic Instruction Types

93. 3-Address Architecture
• Three explicit operands per instruction
• Operands specify source, destination, and
result
• Example:
– Add X, Y, Z
• Computes Z ← X + Y
1.4C. Basic Instruction Types1.4C. Basic Instruction Types

94. Using RegistersUsing Registers
• Access to data in the registers is much faster
than to data stored in memory locations
because the registers are inside the processor.
• Registers allows faster processing
• Shorter instructions

95. Using RegistersUsing Registers
• Let Ri represent a general purpose register:
– Case 1:
• Load A, Ri
• Store Ri, A
• Add A, Ri Here Ri performs the function of the
accumulator
• Add Ri, Rj
• Add Ri, Rj, Rk
• To transfer data between different locations:
– Move Source, Destination
• Move A, Ri is same as Load A, Ri
• Move Ri, A is same as Store Ri, A

96. Using RegistersUsing Registers
• In the processors where arithmetic operations are
allowed only on operands in register, the C=A+B task
can be performed as
• Move A, Ri
Move B, Rj
Add Ri, Rj
Move Rj, C
• In the processors where one operand may be in the
memory but the other one must be in registers, the
C=A+B task can be performed as
• Move A, Ri
Add B, Ri
Move Ri, C

97. 1.4D Instruction Execution and Straight-1.4D Instruction Execution and Straight-
Line SequencingLine Sequencing
the program
3-instruction
R0,C
B,R0
A,R0
Movei + 8
Begin execution here Movei
ContentsAddress
C
B
A
Data for
segment
programAddi + 4
A program for C ← [Α] + [Β].
Assumptions:
C <- [A] + [B]
 One memory
operand per
instruction
 32-bit word length
 Memory is byte
addressable
Two-phase procedure
 Instruction fetch
 Instruction execute

98.  Address of first instruction, i, is placed in PC
 Processor control circuits use the information in the PC to
fetch and execute instructions, one at a time, in the order of
increasing addresses. This is called straight-line sequencing.
 During the execution of each instruction, PC is incremented by
4 to point to the next instruction.
 Executing a given instruction is a two-phase procedure
• Instruction fetch : instruction is fetched from the memory
location whose address is in the PC. This instruction is
placed in the IR in the processor.
• Instruction execute : the instruction in IR is examined to
determine which operation is to be performed. The
specified operation is then performed by the processor.
• When the execute phase of an instruction is completed, the
PC contains the address of the next instruction, and a new
instruction fetch phase can begin.
1.4D Instruction Execution and Straight-1.4D Instruction Execution and Straight-
Line SequencingLine Sequencing

99. Module 1 : Introduction Slide 99
1.4E. Branching1.4E. Branching
NUM n
NUM2
NUM1
Astraight-lineprogramforaddingnnumbers.
SUM
i
i+4n-4
i+8
i+4
R0,SUM
NUM ,R0
NUM3,R0
NUM2,R0
NUM1,R0
Add
Add
Move
Move
Add
•
•
•
•
•
•
•
•
•
 Consider the task of
adding a list of n
numbers.
 The addresses of the
memory locations
containing the n
numbers – NUM1,
….NUMn.
 Separate Add
instruction is used to
add each number to the
contents of register R0.
 After adding, the result
is placed in SUM.
i+4n
n

100. Module 1 : Introduction Slide 100
NUM n
NUM2
NUM1
Using a loop to add n numbers.
LOOP
loop
Program
N
SUM
N,R1Move
R0,SUM
R1
"Next" number to R0
LOOP
Decrement
Move
Determine address of
"Next" number and add
n
R0Clear
Branch>0
•
•
•
•
•
•
• Single Add instruction in loop.
• Starts at location LOOP and ends
at the instruction Branch>0.
• During each pass through this
loop, the address of the next list
entry is determined and that entry
is fetched and added to R0.
• R1 is used as a counter
• Loop is repeated as long as the
result of the decrement operation
is greater than zero.
• Branch instruction loads a new
value into the PC.
• Conditional branch causes a
branch only if a specified
condition is satisfied. If not, PC is
incremented in normal way.
Using a loop to add n numbers.

101. 1.4F Condition Codes1.4F Condition Codes
• Condition code flags
– To keep track of information about the results of various
operations for use by subsequent conditional branch instructions.
– Condition code register / status register
• The condition code flags are grouped together in a special processor
register.
• Individual condition code flags are set to 1 or 0 depending on the outcome
of the operation performed.
• Four commonly used flags:
• N (negative) : Set to 1 if result is –ive; otherwise, cleared to 0.
• Z (zero) : Set to 1 if result is 0; otherwise, cleared to 0.
• V (overflow) : Set to 1 if arithmetic overflow occurs; otherwise, cleared to
0.
• C (carry) : Set to 1 if carry out results from the operation; otherwise,
cleared to 0.
• Different instructions affect different flags

102. 1.5 Addressing Modes1.5 Addressing Modes

103. 1.5 Addressing Modes1.5 Addressing Modes
• When the complier translates the programs using constants,
local and global variables, pointers, arrays etc written in high
level language into assembly language, the compiler must be
able to implement these constructs using the facilities provided
in the instruction set of the computer in which the program will
be run.
• The different ways in which the location of an operand is
specified in an instruction are referred to as addressing modes.
• An addressing mode is a method of specifying an operand
• The various addressing modes that are defined in a given
instruction set architecture define how machine language
instructions in that architecture identify the operand (or
operands) of each instruction

104. 1.5 Addressing Modes- Types1.5 Addressing Modes- Types

105. 1.5.1 Implementation of Variables1.5.1 Implementation of Variables
• A variable is represented by allocating a register or a
memory location to hold its value.
• Values can be changed as needed.
• Two modes:
1. Register mode :-
– operand is the contents of a processor register; the name of the register
is given in the instruction.
– Eg: Add R4,R3 ; When a value is in a register
2. Absolute mode [Direct Mode] :-
– operand is in a memory location; the address of this location is given
explicitly in the instruction. Eg: Add A,B
– Move LOC, R2 uses 2 modes.

106. 1.5.2 Implementation of Constants1.5.2 Implementation of Constants
• Address and data constants can be represented in
assembly language using the Immediate mode.
3. Immediate mode :-
– the operand is given explicitly in the instruction.
– Eg1: Move 200immediate, R0 ;
• places the value 200 in register R0.
– Eg2: Move #200, R0
• # in front of the value indicates that this value is to be used as an
immediate operand.
– Consider A = B + 6, which can be accomplished as
• Move B, R1
• Add #6, R1
• Move R1, A

107. Module 1 : Introduction Slide 107
1.5.3 Indirection and Pointers1.5.3 Indirection and Pointers
• Some instructions does not give the operand or its address
explicitly. Instead, it provides information from which the
memory address of the operand can be determined and this
address is the effective address (EA) of the operand.
4. Indirect mode :–
– EA of the operand is the contents of a register or memory
location whose address appears in the instruction.
– Indirection can be denoted by placing the name of the register or
the memory address in parenthesis
– Eg:- Add (R1), R0

108. 1.5.3 Indirection and Pointers1.5.3 Indirection and Pointers
• To execute the instruction
Add (R1), R0 the
processor uses the value B,
which is in R1, as the EA
of the operand.
• It requests a read operation
from the memory to read
the contents of location B.
• The value of read is the
desired operand, which the
processor adds to the
content of register R0.

109. 1.5.3 Indirection and Pointers1.5.3 Indirection and Pointers
• The processor first reads
the contents of memory
location A, then requests
a second read operation
using the value B as an
address to obtain the
operand.
• The register or memory
location that contains the
address of an operand is
called a pointer.

110. 1.5.3 Indirection and Pointers1.5.3 Indirection and Pointers
• R2 is used as a pointer to the numbers in the list, and the
operands are accessed indirectly through R2.
• Counter value n is loaded from mem. location N to R1 and uses
the immediate addressing mode to place the address value
NUM1, which is the address of the first number in the list, into
R2.
• Then it clears R0 to 0.

111. 1.5.3 Indirection and Pointers1.5.3 Indirection and Pointers
• Consider the C-language statement: A = *B
where B is a pointer
• Move B, R1
Move (R1), A
• Using Indirect addressing through memory:
Move (B), A

112. 1.5.4 Indexing and Arrays1.5.4 Indexing and Arrays
• The index mode is useful in dealing with lists and
arrays.
5. Index mode :–
– the effective address of the operand is generated by adding
a constant value to the contents of a register.
– The register is referred as Index register
– Index mode can be symbolically represented as X(Ri),
where X denotes a constant value contained in the
instruction and Ri is the name of the register involved.
– The EA of the above instruction: EA = X + [Ri]
• The constant X may be given either as an explicit
number or as a symbolic name representing a
numerical value.

113. 1.5.4 Indexed Addressing1.5.4 Indexed Addressing
Operand1020
Add 1000(R1),R2
R1
R1
Add 20(R1),R2
Operand1020
201000
20 = offset
20 = offset
10001000
(a) Offset is given as a constant
(b) Offset is in the index register
The index register R1 contains
the address of a mem
location, and the value X
defines an offset
(displacement) from this
address to the location where
the operand is found.
The X corresponds to a memory
address, and the contents of the
index register define the offset
(displacement) of the operand.

114. Example – Student Record ListExample – Student Record List
A list of students' marks.
Student 1
Student 2
Test 3
Test 2
Test 1
Student ID
Test 3
Test 2
Student ID
nN
LIST
Test 1LIST + 4
LIST + 8
LIST + 12
LIST + 16
•
•
•
Compute the sum of all scores obtained on each of the tests

115. Example – Student Record ListExample – Student Record List
• Compute the sum of all scores obtained on each of the tests and store these
three sums in memory locations SUM1, SUM2, and SUM3.
LOOP
Move #LIST,R0
Add
Move
Add
12(R0),R3
#16,R0
Clear R1
Clear R3
4(R0),R1
Clear R2
Add 8(R0),R2
N,R4
Add
Decrement R4
LOOP
Move R1,SUM1
Move R2,SUM2
Move R3,SUM3
Branch>0
R0 doesn’t’ change

116. 1.5.5 Indexing and Arrays1.5.5 Indexing and Arrays
• In general, the Index mode facilitates access to an
operand whose location is defined relative to a
reference point within the data structure in which the
operand appears.
• In the above eg:, the ID locations of successive
student records are the reference points.
• Several variations:
6. Base with index mode:-
– (Ri, Rj): EA = [Ri] + [Rj]
7. Base with index and offset mode:-
– X(Ri, Rj): EA = X + [Ri] + [Rj]

117. 1.5.6 Relative Addressing1.5.6 Relative Addressing
8. Relative mode :–
– the effective address is determined by the Index
mode using the program counter in place of the
general-purpose register.
– X(PC) – means X bytes away from the location
presently pointed to by the PC.
– Addressed location is identified ‘relative’ to the
PC.

118. Relative AddressingRelative Addressing
• Consider the instruction: Branch>0 LOOP
– This location is computed by specifying it as an offset from the
current value of PC.
– Since the branch target may be either before or after the branch
instruction, the offset is given as a signed number.
-16(PC)

119. 1.5.7 Additional Modes1.5.7 Additional Modes
9. Auto increment mode :–
– the effective address of the operand is the contents of a register
specified in the instruction.
– After accessing the operand, the contents of this register are
automatically incremented to point to the next item in a list.
– The auto increment mode is written as (Ri)+.
– The increment is 1 for byte-sized operands, 2 for 16-bit operands, and 4
for 32-bit operands.
R0Clear
R0,SUM
R1
(R2)+,R0
. The Auto increment addressing mode used in the program
Initialization
Move
LOOP Add
Decrement
LOOP
#NUM1,R2
N,R1Move
Move
Branch>0

120. 10. Autodecrement mode: -
• The contents of a register specified in the
instruction are first automatically decremented
and are then used as the EA of the operand.
• The auto decrement mode is written as -(Ri).
• Here the contents of the register are to be
decrement first before being used as the EA.
• In this mode, operands are accessed in
decreasing address order.
1.5.7 Additional Modes1.5.7 Additional Modes