1. Multiprocessor Architecture for Image Processing Under the guidance of Dr. Anshul Kumar Mayank Kumar 2006EE10331 Pushpendre Rastogi 2006EE50412
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8. Initial Architecture Camera Video ADC` Virtex II Pro RGB Conversion Power PC M1 M1 M1 M1 M1 M1 M1 M1 M1 M E M O R Y Video DAC MPMC Monitor Array Topology
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11. New Architecture Camera Video ADC` VIO_in Custom Memory Controller (Verilog Module) ` Array of Block Ram Array of Processor Network VIO_in Video DAC Monitor