SlideShare une entreprise Scribd logo
1  sur  11
CPU Registers
BY: SAHIL BANSAL
MCA(FIRST YEAR)
Computer Registers
A register is a very small amount of very fast memory that is built into
the CPU (central processing unit) in order to speed up its operations by
providing quick access to commonly used values.
Small, permanent storage locations within the CPU used for a
particular purpose
Manipulated directly by the Control Unit
Wired for specific function
Size in bits or bytes (not MB like memory)
Can hold data, an address or an instruction
Use of Registers
 Scratchpad for currently executing program
 Holds data needed quickly or frequently
 Stores information about status of CPU and currently executing
program
 Address of next program instruction
 Signals from external devices
 Registers are normally measured by the number of bits they can hold.
 Registers are used to store data temporarily during the execution of a
program.
 Some of the registers are accessible to the user through instructions.
 Data and instructions must be put into the system. So we need registers
for this.
Register basic Operations
 Fetch: The Fetch Operation is used for taking the instructions those
are given by the user and the Instructions those are stored into the
Main Memory will be fetch by using Registers.
 Decode: The Decode Operation is used for interpreting the
Instructions means the Instructions are decoded means the CPU will
find out which Operation is to be performed on the Instructions.
 Execute: The Execute Operation is performed by the CPU. And
Results those are produced by the CPU are then Stored into the
Memory and after that they are displayed on the user Screen.
Registers are divided in 5 major
categories:
 General Purpose Registers
 Pointer Registers
 Index Registers
 Segment Registers
 Flag Registers
General Purpose Registers:
There are four General Purpose Registers named as follows:
1. AX (Accumulator Register): commonly used for arithmetic & logic data
transfer.
2. BX (Base Address Register): used to save the address of memory
location.
3. CX (Count Register): keeps record of iterations while a LOOP instruction
is running.
4. DX (Data Register): holds data of the instruction currently being
executed.
Pointer Registers:
There are three pointer registers that are used to point toward some
memory address.
BP (Base Pointer): points to the base element of the stack.
SP (Stack Pointer): always points to the top element of the stack.
IP (Instruction Pointer): stores the address of the next instruction to be
executed.
Index Registers:
Index registers are used for indexed addressing and sometimes also
used in addition and subtraction. There are two sets of index registers:
SI (Source Index): used as source index for string operations.
DI (Destination Index): used as destination index for string operations.
Segment Registers:
Segments are specific areas defined in a program for containing data,
code and stack. There are three main segments:
Code Segment: it contains all the instructions to be executed.
Data Segment: it contains data, constants and work areas.
Stack Segment: it contains data and return addresses of procedures
or subroutines. It is implemented as a 'stack' data structure.
Flag Registers:
These registers are programmable. It can be used to store and transfer the data
from the registers by using instruction.
The common flag bits are:
Overflow Flag (OF)
 Direction Flag (DF)
 Interrupt Flag (IF)
 Trap Flag (TF)
Sign Flag (SF)
 Auxiliary Carry Flag (AF)
 Parity Flag (PF)
Carry Flag (CF)
Thank You

Contenu connexe

Tendances

Input output organization
Input output organizationInput output organization
Input output organization
abdulugc
 
Virtual memory
Virtual memoryVirtual memory
Virtual memory
Anuj Modi
 
Cache memory
Cache memoryCache memory
Cache memory
Anuj Modi
 
instruction cycle ppt
instruction cycle pptinstruction cycle ppt
instruction cycle ppt
sheetal singh
 
Control Units : Microprogrammed and Hardwired:control unit
Control Units : Microprogrammed and Hardwired:control unitControl Units : Microprogrammed and Hardwired:control unit
Control Units : Microprogrammed and Hardwired:control unit
abdosaidgkv
 
Computer organiztion5
Computer organiztion5Computer organiztion5
Computer organiztion5
Umang Gupta
 

Tendances (20)

General register organization (computer organization)
General register organization  (computer organization)General register organization  (computer organization)
General register organization (computer organization)
 
Stack organization
Stack organizationStack organization
Stack organization
 
Input output organization
Input output organizationInput output organization
Input output organization
 
Computer Organization and Architecture.
Computer Organization and Architecture.Computer Organization and Architecture.
Computer Organization and Architecture.
 
instruction format and addressing modes
instruction format and addressing modesinstruction format and addressing modes
instruction format and addressing modes
 
Computer architecture addressing modes and formats
Computer architecture addressing modes and formatsComputer architecture addressing modes and formats
Computer architecture addressing modes and formats
 
Virtual memory
Virtual memoryVirtual memory
Virtual memory
 
Cache memory
Cache memoryCache memory
Cache memory
 
Memory organization (Computer architecture)
Memory organization (Computer architecture)Memory organization (Computer architecture)
Memory organization (Computer architecture)
 
Assembly language programming_fundamentals 8086
Assembly language programming_fundamentals 8086Assembly language programming_fundamentals 8086
Assembly language programming_fundamentals 8086
 
Internal architecture-of-8086
Internal architecture-of-8086Internal architecture-of-8086
Internal architecture-of-8086
 
Register organization, stack
Register organization, stackRegister organization, stack
Register organization, stack
 
instruction cycle ppt
instruction cycle pptinstruction cycle ppt
instruction cycle ppt
 
Interrupts
InterruptsInterrupts
Interrupts
 
Computer arithmetic
Computer arithmeticComputer arithmetic
Computer arithmetic
 
Modes of transfer
Modes of transferModes of transfer
Modes of transfer
 
Lecture 3 instruction set
Lecture 3  instruction setLecture 3  instruction set
Lecture 3 instruction set
 
Control Units : Microprogrammed and Hardwired:control unit
Control Units : Microprogrammed and Hardwired:control unitControl Units : Microprogrammed and Hardwired:control unit
Control Units : Microprogrammed and Hardwired:control unit
 
Computer organiztion5
Computer organiztion5Computer organiztion5
Computer organiztion5
 
Processor organization & register organization
Processor organization & register organizationProcessor organization & register organization
Processor organization & register organization
 

En vedette (13)

Memory management
Memory managementMemory management
Memory management
 
Docker allocating resources
Docker allocating resourcesDocker allocating resources
Docker allocating resources
 
Booting & shut down,
Booting & shut down,Booting & shut down,
Booting & shut down,
 
Kernel I/O subsystem
Kernel I/O subsystemKernel I/O subsystem
Kernel I/O subsystem
 
Disk allocation methods
Disk allocation methodsDisk allocation methods
Disk allocation methods
 
Cpu registers
Cpu registersCpu registers
Cpu registers
 
5. boot process
5. boot process5. boot process
5. boot process
 
Operating systems
Operating systemsOperating systems
Operating systems
 
Spring Boot with Quartz
Spring Boot with QuartzSpring Boot with Quartz
Spring Boot with Quartz
 
Understanding The Boot Process
Understanding The Boot ProcessUnderstanding The Boot Process
Understanding The Boot Process
 
File access methods.54
File access methods.54File access methods.54
File access methods.54
 
File organization
File organizationFile organization
File organization
 
Boot process: BIOS vs UEFI
Boot process: BIOS vs UEFIBoot process: BIOS vs UEFI
Boot process: BIOS vs UEFI
 

Similaire à Registers

Unit 3 assembler and processor
Unit 3   assembler and processorUnit 3   assembler and processor
Unit 3 assembler and processor
Abha Damani
 
Please send the answers to my email. Mirre06@hotmail.comSomeone se.pdf
Please send the answers to my email. Mirre06@hotmail.comSomeone se.pdfPlease send the answers to my email. Mirre06@hotmail.comSomeone se.pdf
Please send the answers to my email. Mirre06@hotmail.comSomeone se.pdf
ebrahimbadushata00
 
computer organization and assembly Regitster.ppt
computer organization and assembly Regitster.pptcomputer organization and assembly Regitster.ppt
computer organization and assembly Regitster.ppt
ssuser7b3003
 
the-cpu-design-central-processing-unit-design-1
the-cpu-design-central-processing-unit-design-1the-cpu-design-central-processing-unit-design-1
the-cpu-design-central-processing-unit-design-1
Basel Mansour
 
Pai unit 1_l1-l2-l3-l4_upload
Pai unit 1_l1-l2-l3-l4_uploadPai unit 1_l1-l2-l3-l4_upload
Pai unit 1_l1-l2-l3-l4_upload
Yogesh Deshpande
 

Similaire à Registers (20)

Register & Memory
Register & MemoryRegister & Memory
Register & Memory
 
Presentation1
Presentation1Presentation1
Presentation1
 
Unit 3 assembler and processor
Unit 3   assembler and processorUnit 3   assembler and processor
Unit 3 assembler and processor
 
Introduction to CPU registers
Introduction to CPU registersIntroduction to CPU registers
Introduction to CPU registers
 
SAQIB ALI.pptx
SAQIB ALI.pptxSAQIB ALI.pptx
SAQIB ALI.pptx
 
Please send the answers to my email. Mirre06@hotmail.comSomeone se.pdf
Please send the answers to my email. Mirre06@hotmail.comSomeone se.pdfPlease send the answers to my email. Mirre06@hotmail.comSomeone se.pdf
Please send the answers to my email. Mirre06@hotmail.comSomeone se.pdf
 
Computer Architecture
Computer ArchitectureComputer Architecture
Computer Architecture
 
microprocessor
 microprocessor microprocessor
microprocessor
 
Computer architecture instruction formats
Computer architecture instruction formatsComputer architecture instruction formats
Computer architecture instruction formats
 
computer organization and assembly Regitster.ppt
computer organization and assembly Regitster.pptcomputer organization and assembly Regitster.ppt
computer organization and assembly Regitster.ppt
 
the-cpu-design-central-processing-unit-design-1
the-cpu-design-central-processing-unit-design-1the-cpu-design-central-processing-unit-design-1
the-cpu-design-central-processing-unit-design-1
 
Pai unit 1_l1-l2-l3-l4_upload
Pai unit 1_l1-l2-l3-l4_uploadPai unit 1_l1-l2-l3-l4_upload
Pai unit 1_l1-l2-l3-l4_upload
 
Microprocessor
MicroprocessorMicroprocessor
Microprocessor
 
intel 8086 introduction
intel 8086 introductionintel 8086 introduction
intel 8086 introduction
 
Various type of register
Various type of registerVarious type of register
Various type of register
 
Processor Organization and Architecture
Processor Organization and ArchitectureProcessor Organization and Architecture
Processor Organization and Architecture
 
Cao 2012
Cao 2012Cao 2012
Cao 2012
 
Amp
AmpAmp
Amp
 
Introduction to Computers Lecture # 8
Introduction to Computers Lecture # 8Introduction to Computers Lecture # 8
Introduction to Computers Lecture # 8
 
Microprocessors
MicroprocessorsMicroprocessors
Microprocessors
 

Dernier

Spellings Wk 3 English CAPS CARES Please Practise
Spellings Wk 3 English CAPS CARES Please PractiseSpellings Wk 3 English CAPS CARES Please Practise
Spellings Wk 3 English CAPS CARES Please Practise
AnaAcapella
 

Dernier (20)

Towards a code of practice for AI in AT.pptx
Towards a code of practice for AI in AT.pptxTowards a code of practice for AI in AT.pptx
Towards a code of practice for AI in AT.pptx
 
Understanding Accommodations and Modifications
Understanding  Accommodations and ModificationsUnderstanding  Accommodations and Modifications
Understanding Accommodations and Modifications
 
Sensory_Experience_and_Emotional_Resonance_in_Gabriel_Okaras_The_Piano_and_Th...
Sensory_Experience_and_Emotional_Resonance_in_Gabriel_Okaras_The_Piano_and_Th...Sensory_Experience_and_Emotional_Resonance_in_Gabriel_Okaras_The_Piano_and_Th...
Sensory_Experience_and_Emotional_Resonance_in_Gabriel_Okaras_The_Piano_and_Th...
 
Mehran University Newsletter Vol-X, Issue-I, 2024
Mehran University Newsletter Vol-X, Issue-I, 2024Mehran University Newsletter Vol-X, Issue-I, 2024
Mehran University Newsletter Vol-X, Issue-I, 2024
 
Python Notes for mca i year students osmania university.docx
Python Notes for mca i year students osmania university.docxPython Notes for mca i year students osmania university.docx
Python Notes for mca i year students osmania university.docx
 
Wellbeing inclusion and digital dystopias.pptx
Wellbeing inclusion and digital dystopias.pptxWellbeing inclusion and digital dystopias.pptx
Wellbeing inclusion and digital dystopias.pptx
 
Graduate Outcomes Presentation Slides - English
Graduate Outcomes Presentation Slides - EnglishGraduate Outcomes Presentation Slides - English
Graduate Outcomes Presentation Slides - English
 
Beyond_Borders_Understanding_Anime_and_Manga_Fandom_A_Comprehensive_Audience_...
Beyond_Borders_Understanding_Anime_and_Manga_Fandom_A_Comprehensive_Audience_...Beyond_Borders_Understanding_Anime_and_Manga_Fandom_A_Comprehensive_Audience_...
Beyond_Borders_Understanding_Anime_and_Manga_Fandom_A_Comprehensive_Audience_...
 
Spellings Wk 3 English CAPS CARES Please Practise
Spellings Wk 3 English CAPS CARES Please PractiseSpellings Wk 3 English CAPS CARES Please Practise
Spellings Wk 3 English CAPS CARES Please Practise
 
TỔNG ÔN TẬP THI VÀO LỚP 10 MÔN TIẾNG ANH NĂM HỌC 2023 - 2024 CÓ ĐÁP ÁN (NGỮ Â...
TỔNG ÔN TẬP THI VÀO LỚP 10 MÔN TIẾNG ANH NĂM HỌC 2023 - 2024 CÓ ĐÁP ÁN (NGỮ Â...TỔNG ÔN TẬP THI VÀO LỚP 10 MÔN TIẾNG ANH NĂM HỌC 2023 - 2024 CÓ ĐÁP ÁN (NGỮ Â...
TỔNG ÔN TẬP THI VÀO LỚP 10 MÔN TIẾNG ANH NĂM HỌC 2023 - 2024 CÓ ĐÁP ÁN (NGỮ Â...
 
Single or Multiple melodic lines structure
Single or Multiple melodic lines structureSingle or Multiple melodic lines structure
Single or Multiple melodic lines structure
 
How to setup Pycharm environment for Odoo 17.pptx
How to setup Pycharm environment for Odoo 17.pptxHow to setup Pycharm environment for Odoo 17.pptx
How to setup Pycharm environment for Odoo 17.pptx
 
ICT role in 21st century education and it's challenges.
ICT role in 21st century education and it's challenges.ICT role in 21st century education and it's challenges.
ICT role in 21st century education and it's challenges.
 
REMIFENTANIL: An Ultra short acting opioid.pptx
REMIFENTANIL: An Ultra short acting opioid.pptxREMIFENTANIL: An Ultra short acting opioid.pptx
REMIFENTANIL: An Ultra short acting opioid.pptx
 
General Principles of Intellectual Property: Concepts of Intellectual Proper...
General Principles of Intellectual Property: Concepts of Intellectual  Proper...General Principles of Intellectual Property: Concepts of Intellectual  Proper...
General Principles of Intellectual Property: Concepts of Intellectual Proper...
 
Key note speaker Neum_Admir Softic_ENG.pdf
Key note speaker Neum_Admir Softic_ENG.pdfKey note speaker Neum_Admir Softic_ENG.pdf
Key note speaker Neum_Admir Softic_ENG.pdf
 
HMCS Vancouver Pre-Deployment Brief - May 2024 (Web Version).pptx
HMCS Vancouver Pre-Deployment Brief - May 2024 (Web Version).pptxHMCS Vancouver Pre-Deployment Brief - May 2024 (Web Version).pptx
HMCS Vancouver Pre-Deployment Brief - May 2024 (Web Version).pptx
 
UGC NET Paper 1 Mathematical Reasoning & Aptitude.pdf
UGC NET Paper 1 Mathematical Reasoning & Aptitude.pdfUGC NET Paper 1 Mathematical Reasoning & Aptitude.pdf
UGC NET Paper 1 Mathematical Reasoning & Aptitude.pdf
 
Spatium Project Simulation student brief
Spatium Project Simulation student briefSpatium Project Simulation student brief
Spatium Project Simulation student brief
 
Kodo Millet PPT made by Ghanshyam bairwa college of Agriculture kumher bhara...
Kodo Millet  PPT made by Ghanshyam bairwa college of Agriculture kumher bhara...Kodo Millet  PPT made by Ghanshyam bairwa college of Agriculture kumher bhara...
Kodo Millet PPT made by Ghanshyam bairwa college of Agriculture kumher bhara...
 

Registers

  • 1. CPU Registers BY: SAHIL BANSAL MCA(FIRST YEAR)
  • 2. Computer Registers A register is a very small amount of very fast memory that is built into the CPU (central processing unit) in order to speed up its operations by providing quick access to commonly used values. Small, permanent storage locations within the CPU used for a particular purpose Manipulated directly by the Control Unit Wired for specific function Size in bits or bytes (not MB like memory) Can hold data, an address or an instruction
  • 3. Use of Registers  Scratchpad for currently executing program  Holds data needed quickly or frequently  Stores information about status of CPU and currently executing program  Address of next program instruction  Signals from external devices  Registers are normally measured by the number of bits they can hold.  Registers are used to store data temporarily during the execution of a program.  Some of the registers are accessible to the user through instructions.  Data and instructions must be put into the system. So we need registers for this.
  • 4. Register basic Operations  Fetch: The Fetch Operation is used for taking the instructions those are given by the user and the Instructions those are stored into the Main Memory will be fetch by using Registers.  Decode: The Decode Operation is used for interpreting the Instructions means the Instructions are decoded means the CPU will find out which Operation is to be performed on the Instructions.  Execute: The Execute Operation is performed by the CPU. And Results those are produced by the CPU are then Stored into the Memory and after that they are displayed on the user Screen.
  • 5. Registers are divided in 5 major categories:  General Purpose Registers  Pointer Registers  Index Registers  Segment Registers  Flag Registers
  • 6. General Purpose Registers: There are four General Purpose Registers named as follows: 1. AX (Accumulator Register): commonly used for arithmetic & logic data transfer. 2. BX (Base Address Register): used to save the address of memory location. 3. CX (Count Register): keeps record of iterations while a LOOP instruction is running. 4. DX (Data Register): holds data of the instruction currently being executed.
  • 7. Pointer Registers: There are three pointer registers that are used to point toward some memory address. BP (Base Pointer): points to the base element of the stack. SP (Stack Pointer): always points to the top element of the stack. IP (Instruction Pointer): stores the address of the next instruction to be executed.
  • 8. Index Registers: Index registers are used for indexed addressing and sometimes also used in addition and subtraction. There are two sets of index registers: SI (Source Index): used as source index for string operations. DI (Destination Index): used as destination index for string operations.
  • 9. Segment Registers: Segments are specific areas defined in a program for containing data, code and stack. There are three main segments: Code Segment: it contains all the instructions to be executed. Data Segment: it contains data, constants and work areas. Stack Segment: it contains data and return addresses of procedures or subroutines. It is implemented as a 'stack' data structure.
  • 10. Flag Registers: These registers are programmable. It can be used to store and transfer the data from the registers by using instruction. The common flag bits are: Overflow Flag (OF)  Direction Flag (DF)  Interrupt Flag (IF)  Trap Flag (TF) Sign Flag (SF)  Auxiliary Carry Flag (AF)  Parity Flag (PF) Carry Flag (CF)