VINEYARD Spynq framework -SAMOS 2017

Christoforos Kachris, Elias Koromilas, Ioannis Stamelos, Dimitrios Soudris
kachris@microlab.ntua.gr
ICCS-National Technical University of Athens
SAMOS, July 2017
SPynq: Acceleration of Machine Learning
Applications over Spark on Pynq

www.vineyard-h2020.eu
Network traffic in the data centers
2
Christoforos Kachris, NTUA, Greece

Power consumption in the data centers
3
• Currently Data
Centers consume
huge amounts of
energy
• Servers consume
around 30% of the
total power budget of
the IT infrastructure

Diverse Data Center Demands
4

Flexibility versus Performance
Christoforos Kachris, NTUA, Greece 5
CPU: High flexibility, lower efficiency Accelerators: High throughput, higher efficiency
GPUs and FPGAs can provide massive parallelism and higher efficiency
than CPUs for certain categories of applications

Processor versus FPGAs
• FPGAs are customized to the application requirements
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[Source: National Instruments: Smart Grid Ready Instrumentation”

FPGA – GPUs - CPUs
• Higher Performance
• Higher Performance/Watt
• Lower flexibility (higher programming complexity)
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[Source: Xilinx, 2016]

How FPGA works
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module filter1 (clock, rst, strm_in, strm_out)
for (i=0; i<NUMUNITS; i=i+1)
always@(posedge clock)
integer i,j; //index for loops
tmp_kernel[j] = k[i*OFFSETX];
FPGA handles compute-
intensive, deeply pipelined,
hardware-accelerated
operations
CPU handles the rest
application

Flexibility versus Performance
Christoforos Kachris, NTUA, Greece 9
What if we could combine the performance of accelerators
with the flexibility of general purpose processors?

FPGAs in Data Center
• Intel: “Two orders of magnitude faster than GPU by 2020”
($16.7 billion bet)
Broadwel Xeon with Arria 10
• Microsoft Bing with Altera Stratix V
• IBM SupperVessel with Power8 + Xilinx
• Xilinx SDAccel on Nimbix Cloud
• Google has released TPU only for Tensorflow – ISCA 2017
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Apache Spark
The largest open source project in
data processing.
• Structured Data
• Streaming Analytics
• Machine Learning
• Graph Computation
Provides an interface for
programming entire clusters with
implicit data parallelism and fault-
tolerance.
11

Spark integration on Heterogeneous MPSoC
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Logistic regression

Pynq: Python Productivity for Zynq
• An open-source project from Xilinx that
makes it easy to design embedded
systems with Zynq MPSoCs.
• The APSoC is programmed using
Python.
• The code is developed and tested
directly on the PYNQ-Z1 board.
• The programmable logic circuits are
imported as hardware libraries and
programmed through their APIs in
essentially the same way as the
software libraries.
13

Spark integration on Heterogeneous MPSoC
14
Logistic regression

Spynq: Spark on Pynq integration
15

A use case on Logistic regression
LR is used for building predictive
models for many complex
pattern-matching and
classification problems.
It can be applied widely in such
diverse areas as
• bioinformatics,
• finance and
• data analytics.
One of the most popular Machine
Learning techniques.
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Logistic regression accelerator
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Available on github:
https://github.com/AcceleratedCloud/SDSoC
https://github.com/AcceleratedCloud/SPynq
C. Kachris, E. Koromilas, I. Stamoulias, National Technical University of Athens, GR

Spark cluster
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Mlib acceleration interface
19

Spark implementation
20

Gradients kernel accelerator
21

Speedup
• Xeon vs Pynq
22
• ARM vs Pynq

Power consumption
• SW
23
• SW/HW

Energy efficiency • Up to 21x more
energy efficient
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Performance evaluation
25
Spark acceleration on FPGAs: A use case on machine learning in Pynq
Elias Koromilas, Ioannis Stamelos, Christoforos Kachris, Dimitrios Soudris
International Conference on Modern Circuits and Systems Technologies (MOCAST), Thessaloniki, Greece, May 2017
Best paper award

Available on github
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Cluster of Zynq (Pynq devices) running Spark
27

SW on Intel Xeon
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Accel on FPGA MPSoC

VINEYARD Framework
29
• Accelerators stored
in an AppStore
• Cloud users request
accelerators based
on applications
requirements
• Decouple Hardware
– Software
designers
Cloud computing Applications
VINEYARD Cloud Resource Manager
3rd party IP
developersLibrary of Hardware
accelerators as IP
Blocks
Heterogeneous Data Center
DFE
Processors Dataflow Proc.+FPGA
IP Accelerator’s
App store
Cloud tenants
Acc
Acc
Acc
Acc
DFE
DFE
DFE
Accelerator Controller
Accelerator Virtualization
Scheduler
Accelerator API
Performance
Energy

Main goals
VINEYARD AIMS TO
• Build an integrated platform for energy-efficient data
centres based on novel programmable hardware
accelerators
• Develop a high-level programming framework and big
data infrastructure for allowing end-users to seamlessly
utilize these accelerators in heterogeneous computing
systems by employing typical data-centre programming
frameworks (i.e. Spark.).
• VINEYARD also foster the establishment of an
ecosystem that will empower open innovation based on
hardware accelerators as data-centre plugins for
marketplace, thereby facilitating innovative enterprises
(large industries, SMEs, and creative start-ups) to
develop novel solutions using VINEYARDS’s leading
edge developments.
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• Speedup your application seamlessly
• An integrated framework for the utilization of hardware
accelerators in HPC and data center seamlessly
Contact detais: kachris@microlab.ntua.gr

VINEYARD Spynq framework -SAMOS 2017

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