METHODOLOGY TO EVALUATE RADIATED EMISSION FROM HIGH DENSITY MULTILAYER PCB (HDT 1999)

1. Alessandro ARNULFO
Carla GIACHINO
Marianna DI IANNI
Ilaria PIERI
METHODOLOGY TO EVALUATE RADIATED
EMISSION FROM HIGH DENSITY MULTILAYER PCB
Paris, 13-14th October 1999

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MERITA ESPRIT-ESD PROJET
The requests of BULL (co-ordinator of ESPRIT-ESD MERITA project)
BULL needed an high performance software tool
to simulate high speed PCB taking into account
EMC phenomena as bouncing on power plane
and evaluation of power current loop
This current flows through package power
pins of component and causes radiation

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CAD
Extraction
Sim. Set Up
Creation of
SPRINT netlist
SPRINT
Display
Results
SUBCIRCUITS of each
copper area are linked to
the other circuit elements.
Estimation of
current loops
Extraction of
copper areas and
planes shape
Possibility to model planes
or not and to evaluate
current loops or not
PRESTO_POWER ver 1.0 New features implemented
in PRESTO_POWER ver 1.1
PRESTO_POWER flow

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• Power plane modelling
- ground bouncing (noise propagation)
- filtering (bypass C placing optimisation )
• Gridding algorithm
• Current loop (identification and evaluation)
• Conclusions
NEXT STEPS

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Power planes modelling is necessary to
simulate effects such as:
• noise propagation and ground bounce
influence on signals
• simulation of power plane filtering effect
• optimisation of bypass capacitors
placement on PCB
• current loop identification and evaluation
POWER PLANES MODELLING

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Power planes modelling is
necessary to simulate the
noise propagation and
ground bounce effect on
signals
NOISE PROPAGATION
& GROUND BOUNCE

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Gate
Very large
power
supply
inductance
Power supply
input drops to zero
The gate may no
longer work or
break into
oscillation
POWER PLANE FILTERING
POWER
SOURCE

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- Bypass capacitor insertion
- Filtering through interplane capacitance between
power planes
SOLUTIONS:
Gate
POWER
SOURCE
POWER PLANE FILTERING

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Power planes modelling is
necessary to:
• simulate the power planes
filtering effect
• optimise bypass capacitors
placement on PCB
POWER PLANE FILTERING

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The model, used to describe the area, is a grid of
losses transmission lines. This requires a mesh
with square cells. This choice guarantees the
same propagation delay for all transmission line.
GRID OF LOSSY
TRASMISSION LINE
UNIFORM Td

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Flexibility:
each metal area can have a
different, optimised grid step
Parameters related to the grid step:
• Tstep : minimum time resolution
• max N_row : user-defined grid row limits
• max N_col : user-defined grid column limits
MESH GENERATOR
5V
3.3V

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Propagation speed
(cross-section of PCB)
Tstep (set up in simulation)
dstep (spatial resolution)
Single cell must
have dimensions
multiple of dstep
micro-grid
dstep
GRID CHOICE ANALISY

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Result after the
meshing algorithm.
The rectangular
boundary is gridded
with a regular mesh.
0%88%100% 0%
AN EXAMPLE OF GRIDDED AREA
ZOOM
IN

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POWER PLANE MODEL (ZOOM)
grid on which is built
TL network
grid_stepdstep
micro-grid linked to tstep

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User can choose to model:
• POWER NET: PLANES
SPLITTED PLANES
• SIGNAL NET
Areas connections topology:
• SEGMENT - AREA
• VIA - AREA
• PIN - AREA
POWER PLANES MODELLING

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The user can choose to model or
not signal and/or power areas
Gridding settings
AREAS SETTING
USER INTERFACE

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POWER PLANES MODELLING
FOR MERITA PROJECT
When several gates switch
simultaneously, a large amount of noise
is injected into power and ground pins
The power planes model is used to
evaluate noise voltage on power and
ground planes and to evaluate the
bypass loop current

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SIGNAL AND BYPASS
CURRENT LOOPS
BYPASS LOOP
current flows between the power pins
of ICs and bypass capacitance.
SIGNAL LOOP
current flows on lines driven
by output pins with their
return on ground plane.

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BYPASS CURRENT LOOP PATH
VCC
GND
IC Lsocket & LpinLsocket & Lpin
Interplane cap.
EMC
noise
The electromagnetic noise coming from the bypass loop is due to the
current that reaches the PCB surface through the Integrated Circuit
package and is closed through interplane or decoupling capacitance

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COMPARISON BETWEEN
SIMULATION AND MEASUREMENT
Frequency [MHz]
Normalisedonpeakcurrentloop
[dB]
Current noise spectra simulated
EM noise spectra measured
Radiated
emission
spectra emitted
from a bypass
loop of DIP IC
on a 4-layer
standard PCB
with two internal
power planes
(Vcc, Gnd)
0
-20
-40
0
-20
-40

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CONCLUSION
MOST IMPORTANT ACHIEVEMENT
Copper areas modelling integration in
PRESTO_POWER
FUTURE STEP
Taking into account coupling effects
between copper area